void init_dsi(BOOL isDsiPoweredOn)
{
DSI_CHECK_RET(DSI_Init(isDsiPoweredOn));
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
0)); //max_return_size
//initialize DSI_PHY
DSI_PHY_clk_switch(TRUE);
DSI_PHY_TIMCONFIG(lcm_params);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
if(lcm_params->dsi.mode != CMD_MODE)
{
DSI_Config_VDO_Timing(lcm_params);
DSI_CHECK_RET(DSI_PS_Control(lcm_params->dsi.PS, lcm_params->width * dsiTmpBufBpp));
}
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
}
// protected by sem_early_suspend
DISP_STATUS dsi_capture_framebuffer(UINT32 pvbuf, UINT32 bpp)
{
DSI_CHECK_RET(DSI_WaitForNotBusy());
DDMS_capturing=1;
if(lcm_params->dsi.mode == CMD_MODE)
{
LCD_CHECK_RET(LCD_EnableDCtoDsi(FALSE));
#ifndef MT65XX_NEW_DISP
LCD_CHECK_RET(LCD_Capture_Framebuffer(pvbuf, bpp));
#else
DSI_CHECK_RET(DSI_Capture_Framebuffer(pvbuf, bpp, true));//cmd mode
#endif
}
else
{
#ifndef MT65XX_NEW_DISP
DPI_CHECK_RET(DPI_Capture_Framebuffer(pvbuf, bpp));
#else
DSI_CHECK_RET(DSI_Capture_Framebuffer(pvbuf, bpp, false));//video mode
#endif
}
if(lcm_params->dsi.mode == CMD_MODE)
{
LCD_CHECK_RET(LCD_EnableDCtoDsi(TRUE));
}
DDMS_capturing=0;
return DISP_STATUS_OK;
}
UINT32 mt65xx_disp_get_lcd_time(void)
{
#if 0
UINT32 time0, time1, lcd_time;
mt65xx_disp_update(0, 0, CFG_DISPLAY_WIDTH, CFG_DISPLAY_HEIGHT);
LCD_CHECK_RET(LCD_WaitForNotBusy());
time0 = gpt4_tick2time_us(gpt4_get_current_tick());
LCD_CHECK_RET(LCD_StartTransfer(FALSE));
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode==CMD_MODE) {
DSI_clk_HS_mode(1);
DSI_CHECK_RET(DSI_EnableClk());
}
else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode!=CMD_MODE) {
DSI_clk_HS_mode(1);
DPI_CHECK_RET(DPI_EnableClk());
DSI_CHECK_RET(DSI_EnableClk());
}
LCD_CHECK_RET(LCD_WaitForNotBusy());
time1 = gpt4_tick2time_us(gpt4_get_current_tick());
lcd_time = time1 - time0;
printf("lcd one %d \n", lcd_time);
if(0 != lcd_time)
return (100000000/lcd_time);
else
#endif
return (6000);
}
DISP_STATUS DISP_UpdateScreen(UINT32 x, UINT32 y, UINT32 width, UINT32 height)
{
LCD_CHECK_RET(LCD_WaitForNotBusy());
if ((lcm_drv->update) &&
((lcm_params->type==LCM_TYPE_DBI) || ((lcm_params->type==LCM_TYPE_DSI) && (lcm_params->dsi.mode==CMD_MODE))))
{
lcm_drv->update(x, y, width, height);
}
LCD_CHECK_RET(LCD_SetRoiWindow(x, y, width, height));
LCD_CHECK_RET(LCD_FBSetStartCoord(x, y));
LCD_CHECK_RET(LCD_StartTransfer(FALSE));
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode==CMD_MODE) {
DSI_clk_HS_mode(1);
DSI_CHECK_RET(DSI_EnableClk());
}
else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode!=CMD_MODE) {
DSI_clk_HS_mode(1);
DPI_CHECK_RET(DPI_EnableClk());
DSI_CHECK_RET(DSI_EnableClk());
}
return DISP_STATUS_OK;
}
void init_dsi(BOOL isDsiPoweredOn)
{
//xuecheng's workaround for 82 dsi video mode
if (lcm_params->dsi.mode == CMD_MODE)
{
DSI_PHY_clk_setting(lcm_params);
}
// pr_debug("[DSI] %s, line:%d\n", __func__, __LINE__);
DSI_CHECK_RET(DSI_Init(isDsiPoweredOn));
dsi_IsGlitchWorkaroundEnabled();
if(0 < lcm_params->dsi.compatibility_for_nvk)
{
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
FALSE,
0)); //max_return_size
// DSI_set_noncont_clk(false,0);
// DSI_Detect_glitch_enable(true);
}
else
{
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
(BOOL)(1 - lcm_params->dsi.cont_clock),
0)); //max_return_size
}
//initialize DSI_PHY
DSI_PHY_clk_switch(TRUE);
DSI_PHY_TIMCONFIG(lcm_params);
DSI_CHECK_RET(DSI_PS_Control(lcm_params->dsi.PS, lcm_params->height, lcm_params->width * dsiTmpBufBpp));
if(lcm_params->dsi.mode != CMD_MODE)
{
DSI_Config_VDO_Timing(lcm_params);
DSI_Set_VM_CMD(lcm_params);
// if(0 < lcm_params->dsi.compatibility_for_nvk)
// DSI_Config_VDO_FRM_Mode();
}
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
}
// protected by sem_flipping, sem_early_suspend, sem_overlay_buffer, sem_update_screen
static DISP_STATUS dsi_update_screen(BOOL isMuextLocked)
{
disp_drv_dsi_init_context();
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
//DSI_CHECK_RET(DSI_handle_TE());
DSI_SetMode(lcm_params->dsi.mode);
#ifndef MT65XX_NEW_DISP
LCD_CHECK_RET(LCD_StartTransfer(FALSE, isMuextLocked));
#endif
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE && !DDMS_capturing) {
//if(1 != lcm_params->dsi.compatibility_for_nvk)
if(1)
{
DSI_clk_HS_mode(1);
}
#ifndef MT65XX_NEW_DISP
DSI_CHECK_RET(DSI_Start());
#else
DSI_CHECK_RET(DSI_StartTransfer(isMuextLocked));
#endif
}
else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE && !DDMS_capturing)
{
DSI_clk_HS_mode(1);
#ifndef MT65XX_NEW_DISP
DPI_CHECK_RET(DPI_EnableClk());
DSI_CHECK_RET(DSI_Start());
#else
DSI_CHECK_RET(DSI_StartTransfer(isMuextLocked));
#endif
#ifndef BUILD_UBOOT
is_video_mode_running = true;
if(lcm_params->dsi.noncont_clock)
DSI_set_noncont_clk(true, lcm_params->dsi.noncont_clock_period);
if(lcm_params->dsi.lcm_int_te_monitor)
DSI_set_int_TE(true, lcm_params->dsi.lcm_int_te_period);
#endif
}
if (DDMS_capturing)
DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "[DISP] kernel - dsi_update_screen. DDMS is capturing. Skip one frame. \n");
return DISP_STATUS_OK;
}
void init_dsi(BOOL isDsiPoweredOn)
{
DSI_CHECK_RET(DSI_Init(isDsiPoweredOn));
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
0)); //max_return_size
//initialize DSI_PHY
#ifdef MT65XX_NEW_DISP
DSI_PLL_Select(lcm_params->dsi.pll_select);
#ifdef LVDS_SSC
#if(LVDS_SSC)
if((lcm_params->dsi.pll_select) && (lcm_params->dsi.mode != CMD_MODE)){
lcd_fps = lcd_fps * (100 - LVDS_SSC/2) / 100;
printk("init_dsi: lcd_fps = %d\n", lcd_fps);
}
#endif
#endif
#endif
DSI_PHY_clk_switch(TRUE);
DSI_PHY_TIMCONFIG(lcm_params);
#ifndef MT65XX_NEW_DISP
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
if (lcm_params->dsi.mode == CMD_MODE)
{
DSI_PHY_clk_setting(lcm_params);
}
DSI_CHECK_RET(DSI_PS_Control(lcm_params->dsi.PS, lcm_params->height, lcm_params->width * dsiTmpBufBpp));
#endif
if(lcm_params->dsi.mode != CMD_MODE)
{
DSI_Config_VDO_Timing(lcm_params);
#ifndef MT65XX_NEW_DISP
DSI_CHECK_RET(DSI_PS_Control(lcm_params->dsi.PS, lcm_params->width * dsiTmpBufBpp));
#endif
}
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
}
void init_dsi(BOOL isDsiPoweredOn)
{
DSI_PHY_clk_setting(lcm_params);
// DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "%s, line:%d\n", __func__, __LINE__);
DSI_CHECK_RET(DSI_Init(isDsiPoweredOn));
//if(1 == lcm_params->dsi.compatibility_for_nvk){
if(0){
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
0)); //max_return_size
DSI_set_noncont_clk(false,0);
}
else
{
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
0)); //max_return_size
}
//initialize DSI_PHY
DSI_PHY_clk_switch(TRUE, lcm_params);
DSI_PHY_TIMCONFIG(lcm_params);
DSI_CHECK_RET(DSI_PS_Control(lcm_params->dsi.PS, lcm_params->height, lcm_params->width * dsiTmpBufBpp));
if(lcm_params->dsi.mode != CMD_MODE)
{
DSI_Config_VDO_Timing(lcm_params);
DSI_Set_VM_CMD(lcm_params);
//if(1 == lcm_params->dsi.compatibility_for_nvk)
if(0)
DSI_Config_VDO_FRM_Mode();
}
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
}
DISP_STATUS DISP_SetBacklight_mode(UINT32 mode)
{
DISP_STATUS ret = DISP_STATUS_OK;
disp_drv_init_context();
LCD_WaitForNotBusy();
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
if (!lcm_drv->set_backlight) {
ret = DISP_STATUS_NOT_IMPLEMENTED;
goto End;
}
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
DSI_SetMode(CMD_MODE);
lcm_drv->set_backlight_mode(mode);
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
DSI_SetMode(lcm_params->dsi.mode);
End:
return ret;
}
// protected by sem_early_suspend
DISP_STATUS dsi_capture_framebuffer(UINT32 pvbuf, UINT32 bpp)
{
DSI_CHECK_RET(DSI_WaitForNotBusy());
DDMS_capturing=1;
if(lcm_params->dsi.mode == CMD_MODE)
{
LCD_CHECK_RET(LCD_EnableDCtoDsi(FALSE));
LCD_CHECK_RET(LCD_Capture_Framebuffer(pvbuf, bpp));
}
else
{
DPI_CHECK_RET(DPI_Capture_Framebuffer(pvbuf, bpp));
}
if(lcm_params->dsi.mode == CMD_MODE)
{
LCD_CHECK_RET(LCD_EnableDCtoDsi(TRUE));
}
DDMS_capturing=0;
return DISP_STATUS_OK;
}
static ssize_t layer_debug_read(struct file *file,
char __user *ubuf, size_t count, loff_t *ppos)
{
int ret;
MTKFB_LAYER_DBG_OPTIONS *dbgopt = (MTKFB_LAYER_DBG_OPTIONS *)file->private_data;
UINT32 aligned_buffer;
if(dbgopt->working_buf == 0)
{
DISP_LOG_PRINT(ANDROID_LOG_INFO, "DBG", "No working buffer is available \n");
return 0;
}
///if LCD layer is enabled
if(!LCD_IsLayerEnable(dbgopt->layer_index))
{
DISP_LOG_PRINT(ANDROID_LOG_INFO, "DBG", "The layer %d is not enabled \n", dbgopt->layer_index);
return 0;
}
aligned_buffer = (dbgopt->working_buf + 32) & 0xFFFFFFC0;
if(*ppos == 0)
{
extern struct semaphore sem_flipping;
extern struct semaphore sem_early_suspend;
extern struct semaphore sem_update_screen;
extern BOOL is_early_suspended;
ret = down_interruptible(&sem_flipping);
ret = down_interruptible(&sem_early_suspend);
if (is_early_suspended) {
up(&sem_early_suspend);
up(&sem_flipping);
return 0;
}
ret = down_interruptible(&sem_update_screen);
DISP_LOG_PRINT(ANDROID_LOG_INFO, "DBG", "This is layer %d capturing \n", dbgopt->layer_index);
DISP_LOG_PRINT(ANDROID_LOG_INFO, "DBG", "This layer width:%d , height:%d\n", LCD_REG->LAYER[dbgopt->layer_index].SIZE.WIDTH, LCD_REG->LAYER[dbgopt->layer_index].SIZE.HEIGHT);
if(lcm_params->type == LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
{
DSI_CHECK_RET(DSI_WaitForNotBusy());
LCD_CHECK_RET(LCD_EnableDCtoDsi(FALSE));
}
LCD_Capture_Layerbuffer(dbgopt->layer_index,aligned_buffer,16);
if(lcm_params->type == LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
{
LCD_CHECK_RET(LCD_EnableDCtoDsi(TRUE));
}
up(&sem_update_screen);
up(&sem_early_suspend);
up(&sem_flipping);
}
return simple_read_from_buffer(ubuf, count, ppos, (void *)aligned_buffer, DISP_GetScreenWidth()*DISP_GetScreenHeight()*2);
}
int disphal_panel_enable(const LCM_DRIVER *lcm_drv, struct mutex* pLcmCmdMutex, BOOL enable)
{
if (enable)
{
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DSI_SetMode(CMD_MODE);
}
mutex_lock(pLcmCmdMutex);
//#ifdef MTK_DISP_CONFIG_SUPPORT
if(get_fbconfig_start_lcm_config())
{
fbconfig_apply_new_lcm_setting();
//do not call lcm_init if you have ever started LCM config until you reset lcm config ;
}
else
//#endif
lcm_drv->resume();
mutex_unlock(pLcmCmdMutex);
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
//DSI_clk_HS_mode(1);
DSI_WaitForNotBusy();
DSI_SetMode(lcm_params->dsi.mode);
}
}
else
{
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DPI_CHECK_RET(DPI_DisableClk());
//msleep(200);
DSI_Reset();
DSI_clk_HS_mode(0);
DSI_SetMode(CMD_MODE);
}
mutex_lock(pLcmCmdMutex);
//#ifdef MTK_DISP_CONFIG_SUPPORT
if(get_fbconfig_start_lcm_config())
{
fbconfig_apply_new_lcm_setting();
//do not call lcm_init if you have ever started LCM config until you reset lcm config ;
}
else
//#endif
lcm_drv->suspend();
mutex_unlock(pLcmCmdMutex);
}
return 0;
}
// protected by sem_flipping, sem_early_suspend, sem_overlay_buffer, sem_update_screen
static DISP_STATUS dsi_update_screen(void)
{
disp_drv_dsi_init_context();
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
//DSI_CHECK_RET(DSI_handle_TE());
DSI_SetMode(lcm_params->dsi.mode);
LCD_CHECK_RET(LCD_StartTransfer(FALSE));
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE && !DDMS_capturing) {
DSI_clk_HS_mode(1);
DSI_CHECK_RET(DSI_EnableClk());
}
else if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE && !DDMS_capturing)
{
#ifndef BUILD_UBOOT
spin_lock(&g_handle_esd_lock);
#endif
DSI_clk_HS_mode(1);
DPI_CHECK_RET(DPI_EnableClk());
DSI_CHECK_RET(DSI_EnableClk());
#ifndef BUILD_UBOOT
dsi_vdo_streaming = true;
if(lcm_params->dsi.noncont_clock)
DSI_set_noncont_clk(true, lcm_params->dsi.noncont_clock_period);
if(lcm_params->dsi.lcm_int_te_monitor)
DSI_set_int_TE(true, lcm_params->dsi.lcm_int_te_period);
spin_unlock(&g_handle_esd_lock);
#endif
}
if (DDMS_capturing)
DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "[DISP] kernel - dsi_update_screen. DDMS is capturing. Skip one frame. \n");
return DISP_STATUS_OK;
}
DISP_STATUS DISP_SetInterruptCallback(DISP_INTERRUPT_EVENTS eventID, DISP_INTERRUPT_CALLBACK_STRUCT *pCBStruct)
{
UINT32 offset;
ASSERT(pCBStruct != NULL);
if(eventID >= DISP_LCD_INTERRUPT_EVENTS_START && eventID <= DISP_LCD_INTERRUPT_EVENTS_END )
{
///register callback
offset = eventID - DISP_LCD_INTERRUPT_EVENTS_START;
DISP_CallbackArray[offset].pFunc = pCBStruct->pFunc;
DISP_CallbackArray[offset].pParam = pCBStruct->pParam;
LCD_CHECK_RET(LCD_SetInterruptCallback(_DISP_InterruptCallbackProxy));
LCD_CHECK_RET(LCD_EnableInterrupt(eventID));
}
else if(eventID >= DISP_DSI_INTERRUPT_EVENTS_START && eventID <= DISP_DSI_INTERRUPT_EVENTS_END )
{
///register callback
offset = eventID - DISP_DSI_INTERRUPT_EVENTS_START + DISP_LCD_INTERRUPT_EVENTS_NUMBER;
DISP_CallbackArray[offset].pFunc = pCBStruct->pFunc;
DISP_CallbackArray[offset].pParam = pCBStruct->pParam;
DSI_CHECK_RET(DSI_SetInterruptCallback(_DISP_InterruptCallbackProxy));
DSI_CHECK_RET(DSI_EnableInterrupt(eventID));
}
else if(eventID >= DISP_DPI_INTERRUPT_EVENTS_START && eventID <= DISP_DPI_INTERRUPT_EVENTS_END )
{
offset = eventID - DISP_DPI_INTERRUPT_EVENTS_START + DISP_LCD_INTERRUPT_EVENTS_NUMBER + DISP_DSI_INTERRUPT_EVENTS_NUMBER;
DISP_CallbackArray[offset].pFunc = pCBStruct->pFunc;
DISP_CallbackArray[offset].pParam = pCBStruct->pParam;
DPI_CHECK_RET(DPI_SetInterruptCallback(_DISP_InterruptCallbackProxy));
DPI_CHECK_RET(DPI_EnableInterrupt(eventID));
}
else
{
printk("Invalid event id: %d\n", eventID);
ASSERT(0);
return DISP_STATUS_ERROR; ///TODO: error log
}
return DISP_STATUS_OK;
}
DISP_STATUS DISP_PanelEnable(BOOL enable)
{
static BOOL s_enabled = FALSE;
disp_drv_init_context();
if (!lcm_drv->suspend || !lcm_drv->resume) {
return DISP_STATUS_NOT_IMPLEMENTED;
}
if (enable && !s_enabled) {
s_enabled = TRUE;
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DSI_SetMode(CMD_MODE);
}
lcm_drv->resume();
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
//DSI_clk_HS_mode(1);
DSI_SetMode(lcm_params->dsi.mode);
//DPI_CHECK_RET(DPI_EnableClk());
//DSI_CHECK_RET(DSI_EnableClk());
}
}
else if (!enable && s_enabled)
{
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
s_enabled = FALSE;
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DPI_CHECK_RET(DPI_DisableClk());
udelay(200*1000);
DSI_Reset();
DSI_clk_HS_mode(0);
DSI_SetMode(CMD_MODE);
}
lcm_drv->suspend();
}
return DISP_STATUS_OK;
}
int disphal_panel_enable(const LCM_DRIVER *lcm_drv, struct mutex* pLcmCmdMutex, BOOL enable)
{
if (enable)
{
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DSI_SetMode(CMD_MODE);
}
mutex_lock(pLcmCmdMutex);
lcm_drv->resume();
if(lcm_drv->check_status)
lcm_drv->check_status();
DSI_LP_Reset();
mutex_unlock(pLcmCmdMutex);
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
//DSI_clk_HS_mode(1);
DSI_WaitForNotBusy();
DSI_SetMode(lcm_params->dsi.mode);
}
}
else
{
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DPI_CHECK_RET(DPI_DisableClk());
//msleep(200);
//DSI_Reset();
DSI_clk_HS_mode(0);
DSI_SetMode(CMD_MODE);
}
mutex_lock(pLcmCmdMutex);
lcm_drv->suspend();
mutex_unlock(pLcmCmdMutex);
}
return 0;
}
DISP_STATUS DISP_SetPWM(UINT32 divider)
{
DISP_STATUS ret = DISP_STATUS_OK;
disp_drv_init_context();
LCD_WaitForNotBusy();
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
if (!lcm_drv->set_pwm) {
ret = DISP_STATUS_NOT_IMPLEMENTED;
goto End;
}
lcm_drv->set_pwm(divider);
End:
return ret;
}
DISP_STATUS disphal_change_updatespeed(unsigned int speed)
{
DISP_STATUS ret = DISP_STATUS_OK;
if(LCM_TYPE_DBI == lcm_params->type)
{//DBI
LCD_CHECK_RET(LCD_Change_WriteCycle(ctrl_if, speed));
}
else if(LCM_TYPE_DPI == lcm_params->type)
{//DPI
DPI_CHECK_RET(DPI_Change_CLK(speed));
}
else if(LCM_TYPE_DSI == lcm_params->type)
{// DSI
DSI_CHECK_RET(DSI_Change_CLK(speed));
}
else
{
ret = DISP_STATUS_ERROR;
}
return ret;
}
DISP_STATUS disphal_fm_desense(unsigned long freq)
{
DISP_STATUS ret = DISP_STATUS_OK;
if(LCM_TYPE_DBI == lcm_params->type)
{//DBI
LCD_CHECK_RET(LCD_FM_Desense(ctrl_if, freq));
}
else if(LCM_TYPE_DPI == lcm_params->type)
{//DPI
DPI_CHECK_RET(DPI_FM_Desense(freq));
}
else if(LCM_TYPE_DSI == lcm_params->type)
{// DSI
DSI_CHECK_RET(DSI_FM_Desense(freq));
}
else
{
ret = DISP_STATUS_ERROR;
}
return ret;
}
DISP_STATUS disphal_reset_update(void)
{
DISP_STATUS ret = DISP_STATUS_OK;
if(LCM_TYPE_DBI == lcm_params->type)
{//DBI
LCD_CHECK_RET(LCD_Reset_WriteCycle(ctrl_if));
}
else if(LCM_TYPE_DPI == lcm_params->type)
{//DPI
DPI_CHECK_RET(DPI_Reset_CLK());
}
else if(LCM_TYPE_DSI == lcm_params->type)
{// DSI
DSI_CHECK_RET(DSI_Reset_CLK());
}
else
{
ret = DISP_STATUS_ERROR;
}
return ret;
}
BOOL DISP_EsdRecover(void)
{
BOOL result = FALSE;
DISP_LOG("DISP_EsdRecover enter");
if(lcm_drv->esd_recover == NULL)
{
return FALSE;
}
if (down_interruptible(&sem_update_screen)) {
DISP_LOG("ERROR: Can't get sem_update_screen in DISP_EsdRecover()\n");
return FALSE;
}
if(is_lcm_in_suspend_mode)
{
up(&sem_update_screen);
return FALSE;
}
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI)
{
DSI_CHECK_RET(DSI_WaitForNotBusy());
}
DISP_LOG("DISP_EsdRecover do LCM recover");
// do necessary configuration reset for LCM re-init
if(disp_drv->esd_reset)
disp_drv->esd_reset();
/// LCM recover
result = lcm_drv->esd_recover();
up(&sem_update_screen);
return result;
}
BOOL DISP_EsdCheck(void)
{
BOOL result = FALSE;
disp_drv_init_context();
if(lcm_drv->esd_check == NULL)
{
return FALSE;
}
#if defined(CONFIG_ARCH_MT6575)
if(get_chip_eco_ver()==CHIP_E1 && lcm_params->type==LCM_TYPE_DSI)
{
///DSI read is inavailable for E1
return FALSE;
}
#endif
if (down_interruptible(&sem_update_screen)) {
DISP_LOG("ERROR: Can't get sem_update_screen in DISP_EsdCheck()\n");
return FALSE;
}
if(is_lcm_in_suspend_mode)
{
up(&sem_update_screen);
return FALSE;
}
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI)
DSI_CHECK_RET(DSI_WaitForNotBusy());
result = lcm_drv->esd_check();
up(&sem_update_screen);
return result;
}
DISP_STATUS DISP_UpdateScreen(UINT32 x, UINT32 y, UINT32 width, UINT32 height)
{
DISP_LOG("update screen, (%d,%d),(%d,%d)\n", x, y, width, height);
if (down_interruptible(&sem_update_screen)) {
DISP_LOG("ERROR: Can't get sem_update_screen in DISP_UpdateScreen()\n");
return DISP_STATUS_ERROR;
}
#if defined(MTK_LCD_HW_3D_SUPPORT)
LCD_CHECK_RET(DISP_Set3DPWM( DISP_Is3DEnabled(), DISP_is3DLandscapeMode() ));
#endif
// if LCM is powered down, LCD would never recieve the TE signal
//
if (is_lcm_in_suspend_mode || is_engine_in_suspend_mode) goto End;
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
if (lcm_drv->update) {
lcm_drv->update(x, y, width, height);
}
LCD_CHECK_RET(LCD_SetRoiWindow(x, y, width, height));
LCD_CHECK_RET(LCD_FBSetStartCoord(x, y));
if (-1 != direct_link_layer) {
//MT6516IDP_EnableDirectLink(); // FIXME
} else {
disp_drv->update_screen();
}
End:
up(&sem_update_screen);
return DISP_STATUS_OK;
}
unsigned int disphal_check_lcm(UINT32 color)
{
unsigned int ret = 0;
if(LCM_TYPE_DBI == lcm_params->type){//DBI not support
LCD_Check_LCM(color);
}
else if(LCM_TYPE_DPI == lcm_params->type){//DPI
ret = DPI_Check_LCM();
}
else if(LCM_TYPE_DSI == lcm_params->type){ //dsi
ret = DSI_Check_LCM(color);
if(lcm_params->dsi.mode != CMD_MODE){
DSI_SetMode(lcm_params->dsi.mode);
DSI_clk_HS_mode(1);
DSI_CHECK_RET(DSI_StartTransfer(FALSE));
}
}
else
{
printk("DISP_AutoTest():unknown interface\n");
ret = 0;
}
return ret;
}
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
disp_drv_dsi_init_context();
if(lcm_params->dsi.mode == CMD_MODE) {
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(1);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_WaitForNotBusy();
DSI_clk_HS_mode(0);
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_Reset();
LCD_CHECK_RET(LCD_PowerOn());
#else
DSI_PHY_clk_switch(1);
#ifndef MT65XX_NEW_DISP
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
if(lcm_params->dsi.pll_select == 1)
{
ASSERT(0 == enable_pll(LVDSPLL,"mtk_dsi"));
}
DSI_PHY_clk_setting(lcm_params);
DSI_CHECK_RET(DSI_PowerOn());
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
// DSI_clk_HS_mode(1);
#endif
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
#ifndef MT65XX_NEW_DISP
Wait_WakeUp();
LCD_CHECK_RET(LCD_PowerOn());
#endif
#endif
} else {
#ifndef MT65XX_NEW_DISP
LCD_CHECK_RET(LCD_PowerOff());
#endif
DSI_clk_HS_mode(0);
DSI_lane0_ULP_mode(1);
DSI_clk_ULP_mode(1);
// DSI_CHECK_RET(DSI_PowerOff());
DSI_PHY_clk_switch(0);
DSI_CHECK_RET(DSI_PowerOff());
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
if(lcm_params->dsi.pll_select == 1)
ASSERT(0 == disable_pll(LVDSPLL,"mtk_dsi"));
}
} else {
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(1);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_clk_HS_mode(0);
DSI_Reset();
DPI_CHECK_RET(DPI_PowerOn());
LCD_CHECK_RET(LCD_PowerOn());
#else
DSI_PHY_clk_switch(1);
#ifndef MT65XX_NEW_DISP
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
needStartDSI = true;
if(lcm_params->dsi.pll_select == 1)
{
ASSERT(0 == enable_pll(LVDSPLL,"mtk_dsi"));
}
DSI_PHY_clk_setting(lcm_params);
DSI_CHECK_RET(DSI_PowerOn());
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_clk_HS_mode(0);
#endif
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
#ifndef MT65XX_NEW_DISP
Wait_WakeUp();
DPI_CHECK_RET(DPI_PowerOn());
LCD_CHECK_RET(LCD_PowerOn());
#endif
#endif
} else {
#ifndef BUILD_UBOOT
is_video_mode_running = false;
#ifndef MT65XX_NEW_DISP
if(lcm_params->dsi.noncont_clock)
DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);
if(lcm_params->dsi.lcm_int_te_monitor)
DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);
#endif
#endif
#ifndef MT65XX_NEW_DISP
LCD_CHECK_RET(LCD_PowerOff());
DPI_CHECK_RET(DPI_PowerOff());
#endif
#if 1
DSI_lane0_ULP_mode(1);
DSI_clk_ULP_mode(1);
DSI_CHECK_RET(DSI_PowerOff());
#endif
DSI_PHY_clk_switch(0);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
if(lcm_params->dsi.pll_select == 1)
ASSERT(0 == disable_pll(LVDSPLL,"mtk_dsi"));
}
}
return DISP_STATUS_OK;
}
DISP_STATUS DISP_PanelEnable(BOOL enable)
{
static BOOL s_enabled = TRUE;
DISP_STATUS ret = DISP_STATUS_OK;
DISP_LOG("panel is %s\n", enable?"enabled":"disabled");
if (down_interruptible(&sem_update_screen)) {
DISP_LOG("ERROR: Can't get sem_update_screen in DISP_PanelEnable()\n");
return DISP_STATUS_ERROR;
}
disp_drv_init_context();
is_lcm_in_suspend_mode = enable ? FALSE : TRUE;
if (!lcm_drv->suspend || !lcm_drv->resume) {
ret = DISP_STATUS_NOT_IMPLEMENTED;
goto End;
}
if (enable && !s_enabled) {
s_enabled = TRUE;
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DSI_SetMode(CMD_MODE);
}
lcm_drv->resume();
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
//DSI_clk_HS_mode(1);
DSI_SetMode(lcm_params->dsi.mode);
//DPI_CHECK_RET(DPI_EnableClk());
//DSI_CHECK_RET(DSI_EnableClk());
msleep(200);
}
}
else if (!enable && s_enabled)
{
LCD_CHECK_RET(LCD_WaitForNotBusy());
if(lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode == CMD_MODE)
DSI_CHECK_RET(DSI_WaitForNotBusy());
s_enabled = FALSE;
if (lcm_params->type==LCM_TYPE_DSI && lcm_params->dsi.mode != CMD_MODE)
{
DPI_CHECK_RET(DPI_DisableClk());
//msleep(200);
DSI_Reset();
DSI_clk_HS_mode(0);
DSI_SetMode(CMD_MODE);
}
lcm_drv->suspend();
}
End:
up(&sem_update_screen);
return ret;
}
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
disp_drv_dsi_init_context();
if(lcm_params->dsi.mode == CMD_MODE)
{
if (enable)
{
// enable MMSYS CG
DSI_CHECK_RET(DSI_PowerOn());
// initialize clock setting
DSI_PHY_clk_setting(lcm_params);
// restore dsi register
DSI_CHECK_RET(DSI_RestoreRegisters());
// enable sleep-out mode
DSI_CHECK_RET(DSI_SleepOut());
// enter HS mode
DSI_PHY_clk_switch(1);
// enter wakeup
DSI_CHECK_RET(DSI_Wakeup());
// enable clock
DSI_CHECK_RET(DSI_EnableClk());
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_Reset();
}
else
{
// backup dsi register
DSI_CHECK_RET(DSI_WaitForNotBusy());
DSI_CHECK_RET(DSI_BackupRegisters());
// enter ULPS mode
DSI_clk_ULP_mode(1);
DSI_lane0_ULP_mode(1);
DSI_clk_HS_mode(0);
// disable clock
DSI_CHECK_RET(DSI_DisableClk());
DSI_CHECK_RET(DSI_PowerOff());
// disable mipi pll
DSI_PHY_clk_switch(0);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
}
}
else
{
if (enable)
{
// enable MMSYS CG
DSI_CHECK_RET(DSI_PowerOn());
// initialize clock setting
DSI_PHY_clk_setting(lcm_params);
// restore dsi register
DSI_CHECK_RET(DSI_RestoreRegisters());
// enable sleep-out mode
DSI_CHECK_RET(DSI_SleepOut());
// enter HS mode
DSI_PHY_clk_switch(1);
// enter wakeup
DSI_CHECK_RET(DSI_Wakeup());
DSI_clk_HS_mode(0);
// enable clock
DSI_CHECK_RET(DSI_EnableClk());
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_Reset();
needStartDSI = true;
}
else
{
is_video_mode_running = false;
// backup dsi register
DSI_CHECK_RET(DSI_WaitForNotBusy());
DSI_CHECK_RET(DSI_BackupRegisters());
// enter ULPS mode
DSI_clk_ULP_mode(1);
DSI_lane0_ULP_mode(1);
// disable clock
DSI_CHECK_RET(DSI_DisableClk());
DSI_CHECK_RET(DSI_PowerOff());
// disable mipi pll
DSI_PHY_clk_switch(0);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
}
}
return DISP_STATUS_OK;
}
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
disp_drv_dsi_init_context();
if(lcm_params->dsi.mode == CMD_MODE) {
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(TRUE, lcm_params);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_WaitForNotBusy();
DSI_clk_HS_mode(0);
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_Reset();
LCD_CHECK_RET(LCD_PowerOn());
#else
#ifndef MT65XX_NEW_DISP
DSI_PHY_clk_switch(TRUE, lcm_params);
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
// enable MMSYS CG
DSI_CHECK_RET(DSI_PowerOn());
// initialize clock setting
DSI_PHY_clk_setting(lcm_params);
// initialize dsi timing
DSI_PHY_TIMCONFIG(lcm_params);
// restore dsi register
DSI_CHECK_RET(DSI_RestoreRegisters());
// enable sleep-out mode
DSI_CHECK_RET(DSI_SleepOut());
// enter HS mode
DSI_PHY_clk_switch(TRUE, lcm_params);
// enter wakeup
DSI_CHECK_RET(DSI_Wakeup());
// enable clock
DSI_CHECK_RET(DSI_EnableClk());
// engine reset
DSI_Reset();
#endif
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
#ifndef MT65XX_NEW_DISP
Wait_WakeUp();
#endif
#endif
}
else {
// backup dsi register
DSI_CHECK_RET(DSI_WaitForEngineNotBusy());
DSI_CHECK_RET(DSI_BackupRegisters());
// enter ULPS mode
DSI_clk_ULP_mode(1);
DSI_lane0_ULP_mode(1);
mdelay(1);
// disable engine clock
DSI_CHECK_RET(DSI_DisableClk());
// disable CG
DSI_CHECK_RET(DSI_PowerOff());
// disable mipi pll
DSI_PHY_clk_switch(FALSE, lcm_params);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
}
}
else {
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(TRUE, lcm_params);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_clk_HS_mode(0);
DSI_Reset();
DPI_CHECK_RET(DPI_PowerOn());
LCD_CHECK_RET(LCD_PowerOn());
#else
#ifndef MT65XX_NEW_DISP
DSI_PHY_clk_switch(TRUE, lcm_params);
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
needStartDSI = true;
// enable MMSYS CG
DSI_CHECK_RET(DSI_PowerOn());
// initialize clock setting
DSI_PHY_clk_setting(lcm_params);
// initialize dsi timing
DSI_PHY_TIMCONFIG(lcm_params);
// restore dsi register
DSI_CHECK_RET(DSI_RestoreRegisters());
// enable sleep-out mode
DSI_CHECK_RET(DSI_SleepOut());
// enter HS mode
DSI_PHY_clk_switch(TRUE, lcm_params);
// enter wakeup
DSI_CHECK_RET(DSI_Wakeup());
// enable clock
DSI_CHECK_RET(DSI_EnableClk());
// engine reset
DSI_Reset();
#endif
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
#ifndef MT65XX_NEW_DISP
Wait_WakeUp();
#endif
#endif
}
else {
#ifndef BUILD_UBOOT
is_video_mode_running = false;
if(lcm_params->dsi.noncont_clock)
DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);
if(lcm_params->dsi.lcm_int_te_monitor)
DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);
#endif
// backup dsi register
DSI_CHECK_RET(DSI_WaitForEngineNotBusy());
DSI_CHECK_RET(DSI_BackupRegisters());
// enter ULPS mode
DSI_clk_ULP_mode(1);
DSI_lane0_ULP_mode(1);
mdelay(1);
// disable engine clock
DSI_CHECK_RET(DSI_DisableClk());
// disable CG
DSI_CHECK_RET(DSI_PowerOff());
// disable mipi pll
DSI_PHY_clk_switch(FALSE, lcm_params);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
}
}
return DISP_STATUS_OK;
}
// protected by sem_early_suspend, sem_update_screen
static DISP_STATUS dsi_enable_power(BOOL enable)
{
disp_drv_dsi_init_context();
if(lcm_params->dsi.mode == CMD_MODE) {
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(1);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_WaitForNotBusy();
DSI_clk_HS_mode(0);
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_Reset();
LCD_CHECK_RET(LCD_PowerOn());
#else
DSI_PHY_clk_switch(1);
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
Wait_WakeUp();
LCD_CHECK_RET(LCD_PowerOn());
#endif
} else {
LCD_CHECK_RET(LCD_PowerOff());
DSI_clk_HS_mode(0);
DSI_lane0_ULP_mode(1);
DSI_clk_ULP_mode(1);
DSI_CHECK_RET(DSI_PowerOff());
DSI_PHY_clk_switch(0);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
}
} else {
#if 0
#ifndef BUILD_UBOOT
spin_lock(&g_handle_esd_lock);
#endif
#endif
if (enable) {
#if 0
// Switch bus to MIPI TX.
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
DSI_PHY_clk_switch(1);
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_PowerOn());
DSI_clk_ULP_mode(0);
DSI_lane0_ULP_mode(0);
DSI_clk_HS_mode(0);
DSI_Reset();
DPI_CHECK_RET(DPI_PowerOn());
LCD_CHECK_RET(LCD_PowerOn());
#else
DSI_PHY_clk_switch(1);
DSI_CHECK_RET(DSI_PowerOn());
if(Need_Wait_ULPS())
Wait_ULPS_Mode();
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
Wait_WakeUp();
DPI_CHECK_RET(DPI_PowerOn());
LCD_CHECK_RET(LCD_PowerOn());
#endif
} else {
#ifndef BUILD_UBOOT
dsi_vdo_streaming = false;
if(lcm_params->dsi.noncont_clock)
DSI_set_noncont_clk(false, lcm_params->dsi.noncont_clock_period);
if(lcm_params->dsi.lcm_int_te_monitor)
DSI_set_int_TE(false, lcm_params->dsi.lcm_int_te_period);
#endif
LCD_CHECK_RET(LCD_PowerOff());
DPI_CHECK_RET(DPI_PowerOff());
DSI_lane0_ULP_mode(1);
DSI_clk_ULP_mode(1);
DSI_CHECK_RET(DSI_PowerOff());
DSI_PHY_clk_switch(0);
// Switch bus to GPIO, then power level will be decided by GPIO setting.
DSI_CHECK_RET(DSI_enable_MIPI_txio(FALSE));
}
#if 0
#ifndef BUILD_UBOOT
spin_unlock(&g_handle_esd_lock);
#endif
#endif
}
return DISP_STATUS_OK;
}