void init_dsi(BOOL isDsiPoweredOn)
{
//xuecheng's workaround for 82 dsi video mode
if (lcm_params->dsi.mode == CMD_MODE)
{
DSI_PHY_clk_setting(lcm_params);
}
// pr_debug("[DSI] %s, line:%d\n", __func__, __LINE__);
DSI_CHECK_RET(DSI_Init(isDsiPoweredOn));
dsi_IsGlitchWorkaroundEnabled();
if(0 < lcm_params->dsi.compatibility_for_nvk)
{
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
FALSE,
0)); //max_return_size
// DSI_set_noncont_clk(false,0);
// DSI_Detect_glitch_enable(true);
}
else
{
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
(BOOL)(1 - lcm_params->dsi.cont_clock),
0)); //max_return_size
}
//initialize DSI_PHY
DSI_PHY_clk_switch(TRUE);
DSI_PHY_TIMCONFIG(lcm_params);
DSI_CHECK_RET(DSI_PS_Control(lcm_params->dsi.PS, lcm_params->height, lcm_params->width * dsiTmpBufBpp));
if(lcm_params->dsi.mode != CMD_MODE)
{
DSI_Config_VDO_Timing(lcm_params);
DSI_Set_VM_CMD(lcm_params);
// if(0 < lcm_params->dsi.compatibility_for_nvk)
// DSI_Config_VDO_FRM_Mode();
}
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
}
void init_dsi(BOOL isDsiPoweredOn)
{
DSI_PHY_clk_setting(lcm_params);
// DISP_LOG_PRINT(ANDROID_LOG_INFO, "DSI", "%s, line:%d\n", __func__, __LINE__);
DSI_CHECK_RET(DSI_Init(isDsiPoweredOn));
//if(1 == lcm_params->dsi.compatibility_for_nvk){
if(0){
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
0)); //max_return_size
DSI_set_noncont_clk(false,0);
}
else
{
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
0)); //max_return_size
}
//initialize DSI_PHY
DSI_PHY_clk_switch(TRUE, lcm_params);
DSI_PHY_TIMCONFIG(lcm_params);
DSI_CHECK_RET(DSI_PS_Control(lcm_params->dsi.PS, lcm_params->height, lcm_params->width * dsiTmpBufBpp));
if(lcm_params->dsi.mode != CMD_MODE)
{
DSI_Config_VDO_Timing(lcm_params);
DSI_Set_VM_CMD(lcm_params);
//if(1 == lcm_params->dsi.compatibility_for_nvk)
if(0)
DSI_Config_VDO_FRM_Mode();
}
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
}
void init_dsi(BOOL isDsiPoweredOn)
{
DSI_CHECK_RET(DSI_Init(isDsiPoweredOn));
if(0 < lcm_params->dsi.compatibility_for_nvk){
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
FALSE,
0)); //max_return_size
// DSI_set_noncont_clk(false,0);
DSI_Detect_glitch_enable(true);
}
else
DSI_CHECK_RET(DSI_TXRX_Control(TRUE, //cksm_en
TRUE, //ecc_en
lcm_params->dsi.LANE_NUM, //ecc_en
0, //vc_num
FALSE, //null_packet_en
FALSE, //err_correction_en
FALSE, //dis_eotp_en
(BOOL)(1 - lcm_params->dsi.cont_clock),
0)); //max_return_size
//initialize DSI_PHY
#ifdef MT65XX_NEW_DISP
DSI_PLL_Select(lcm_params->dsi.pll_select);
#ifdef LVDS_SSC
#if(LVDS_SSC)
if((lcm_params->dsi.pll_select) && (lcm_params->dsi.mode != CMD_MODE)){
lcd_fps = lcd_fps * (100 - LVDS_SSC/2) / 100;
printk("init_dsi: lcd_fps = %d\n", lcd_fps);
}
#endif
#endif
#endif
DSI_PHY_clk_switch(TRUE);
DSI_PHY_TIMCONFIG(lcm_params);
#ifndef MT65XX_NEW_DISP
DSI_PHY_clk_setting(lcm_params->dsi.pll_div1, lcm_params->dsi.pll_div2, lcm_params->dsi.LANE_NUM);
#else
if (lcm_params->dsi.mode == CMD_MODE)
{
DSI_PHY_clk_setting(lcm_params);
}
DSI_CHECK_RET(DSI_PS_Control(lcm_params->dsi.PS, lcm_params->height, lcm_params->width * dsiTmpBufBpp));
#endif
if(lcm_params->dsi.mode != CMD_MODE)
{
DSI_Set_VM_CMD(lcm_params);
DSI_Config_VDO_Timing(lcm_params);
if(0 < lcm_params->dsi.compatibility_for_nvk)
DSI_Config_VDO_FRM_Mode();
#ifndef MT65XX_NEW_DISP
DSI_CHECK_RET(DSI_PS_Control(lcm_params->dsi.PS, lcm_params->width * dsiTmpBufBpp));
#endif
}
DSI_CHECK_RET(DSI_enable_MIPI_txio(TRUE));
}