C++ (Cpp) DeAssertGpuResetSignal Examples

Example #1

File: sunxi_init.c Project: newsy5/OrangePI-Kernel

IMG_VOID RgxResume(IMG_VOID)
{
	RgxEnablePower();
	
	mdelay(2);
	
	/* set external isolation invalid */
	sunxi_smc_writel(0, SUNXI_R_PRCM_VBASE + GPU_PWROFF_GATING);
	
	DeAssertGpuResetSignal();

	RgxEnableClock();
	
	/* delay for internal power stability */
	sunxi_smc_writel(0x100, SUNXI_GPU_CTRL_VBASE + 0x18);
}

Example #2

File: sunxi_init.c Project: tank0412/android_kernel_ONDA_kylin_mb976a9

PVRSRV_ERROR RgxResume(IMG_VOID)
{
	RgxEnablePower();
	
	mdelay(2);
	
	/* set external isolation invalid */
	writel(0, SUNXI_R_PRCM_VBASE + GPU_PWROFF_GATING);

	RgxEnableClock();
	
	/* wait until gpu pll is stable */
	while(!(readl(SUNXI_CCM_PLL_VBASE + 0x9c) & 0x100));
	
	DeAssertGpuResetSignal();
	
	return PVRSRV_OK;
}

Example #3

File: sunxi_init.c Project: xwliu/Cubietruck_Plus-kernel-source

PVRSRV_ERROR AwSysPrePowerState(PVRSRV_SYS_POWER_STATE eNewPowerState)
{
	if(eNewPowerState == PVRSRV_SYS_POWER_STATE_ON)
	{
		RgxEnablePower();
	
		mdelay(2);
	
		/* set external isolation invalid */
		writel(0, SUNXI_R_PRCM_VBASE + GPU_PWROFF_GATING);
	
		DeAssertGpuResetSignal();
		
		RgxEnableClock();
		
		/* set delay for internal power stability */
		writel(0x100, SUNXI_GPU_CTRL_VBASE + 0x18);
	}
	
	return PVRSRV_OK;
}

Example #4

File: sysutils_linux.c Project: GREYFOXRGR/BPI-M3-bsp

/*!
******************************************************************************

 @Function  EnableSystemClocks

 @Description Setup up the clocks for the graphics device to work.

 @Return   PVRSRV_ERROR

******************************************************************************/
PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
{
	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;

	PVR_TRACE(("EnableSystemClocks: Enabling System Clocks"));
	if (!psSysSpecData->bSysClocksOneTimeInit)
	{
		if(NULL != private_data.regulator_id)
		{
			private_data.regulator = regulator_get(NULL,private_data.regulator_id);
			if (IS_ERR(private_data.regulator))
			{
				PVR_DPF((PVR_DBG_ERROR, "Failed to get gpu regulator!"));
			}
		}

		if(regulator_enable(private_data.regulator))
		{
			PVR_DPF((PVR_DBG_ERROR, "Failed to enable gpu external power!"));
		}

#ifdef CONFIG_CPU_BUDGET_THERMAL
        private_data.tempctrl_data.count = sizeof(tf_table)/sizeof(tf_table[0]);
#endif /* CONFIG_CPU_BUDGET_THERMAL */

		ParseFex();

		private_data.max_freq = vf_data.extreme.freq;

		GetGpuClk();

		SetGpuClkParent();

		SetGpuVol(vf_data.normal.vol);

		SetClkVal(vf_data.normal.freq);

		mutex_init(&psSysSpecData->sPowerLock);

		atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);

		psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;

		mutex_init(&private_data.dvfs_lock);

		sysfs_create_group(&gpsPVRLDMDev->dev.kobj, &gpu_attribute_group);

	#ifdef CONFIG_CPU_BUDGET_THERMAL
        register_budget_cooling_notifier(&gpu_throttle_notifier);
    #endif /* CONFIG_CPU_BUDGET_THERMAL */
	}

	EnableGpuPower();
	
	/* Delay for gpu power stability */
	mdelay(2);

	/* Set gpu power off gating invalid */
	SetBit(private_data.poweroff_gate.bit, 0, private_data.poweroff_gate.addr);

	DeAssertGpuResetSignal();

	return PVRSRV_OK;
}