/****************************************************************************
* Write Data to the chip
* ----------------------------------------------------------------------
* Parameters:
* -----------
* struct DibBridgeContext *pContext
* uint16_t Addr: Address to write
* uint8_t ByteMode: Transfer Mode
* 0: 16 bits wide register write
* 1: 8 bits wide FIFO write
* uint32_t Cnt: Number of Bytes
* uint8_t *pBuf: Data Buffer
* ----------------------------------------------------------------------
* Return Code:
* -----------
* DIBSTATUS_SUCCESS
* DIBSTATUS_ERROR
****************************************************************************/
DIBSTATUS DibBridgeTargetWrite(struct DibBridgeContext *pContext, uint32_t FmtAddr, uint8_t ByteMode, uint32_t Cnt, uint8_t *pBuf)
{
DIBSTATUS rc = DIBSTATUS_SUCCESS;
SDIO_CMD sdiocmd;
/* In word Mode the write count has to be even */
if((ByteMode == DIBBRIDGE_BIT_MODE_16) && (Cnt & 1))
{
DIB_DEBUG(PORT_LOG, (CRB "-E- DibBridgeTargetWrite: Odd byte count" CRA));
return DIBSTATUS_INVALID_PARAMETER;
}
/* Get semaphore to avoid concurrent access */
DibAcquireLock(&pContext->DibTargetAccessLock);
/* For 32 bit architectures, we need to write high 16 bytes before transfer */
if(DibBridgeGetArch(pContext) == DIBBRIDGE_BIT_MODE_32)
{
/* Use CMD52 to configure address for 32 bits platforms. Note, cmd53 is not working here */
sdiocmd.cmd = SDIO_CMD_52;
sdiocmd.addr = 0x10000 | ((FmtAddr>>16) & 0xFFFF);
sdiocmd.fct = 1;
sdiocmd.buffer = &ByteMode;
sdiocmd.rw = SDIO_CMD_WRITE;
SdioCmd52(pContext,&sdiocmd);
}
/****************************************************************************
* Write Data to the chip
* ----------------------------------------------------------------------
* Parameters:
* -----------
* struct DibBridgeContext *pContext
* uint16_t Addr: Address to write
* uint8_t ByteMode: Transfer Mode
* 0: 16 bits wide register write
* 1: 8 bits wide FIFO write
* uint32_t Cnt: Number of Bytes
* uint8_t *pBuf: Data Buffer
* ----------------------------------------------------------------------
* Return Code:
* -----------
* DIBSTATUS_SUCCESS
* DIBSTATUS_ERROR
****************************************************************************/
DIBSTATUS DibBridgeTargetWrite(struct DibBridgeContext *pContext, uint32_t Addr, uint8_t ByteMode, uint32_t Cnt, uint8_t *pBuf)
{
DIBSTATUS rc = DIBSTATUS_SUCCESS;
/* In word Mode the write count has to be even */
if((ByteMode == DIBBRIDGE_BIT_MODE_16) && (Cnt & 1))
{
DIB_DEBUG(PORT_LOG, (CRB "-E- DibBridgeTargetWrite: Odd byte count" CRA));
return DIBSTATUS_INVALID_PARAMETER;
}
/* Get semaphore to avoid concurrent access */
DibAcquireLock(&pContext->DibTargetAccessLock);
/**************************************************************/
/********* 16 bits Architecture Dibcom Chips: *****************/
/**************************************************************/
/********* Dib7070, Dib7078, Dib9080, Dib9090 *****************/
/**************************************************************/
if(DibBridgeGetArch(pContext) == DIBBRIDGE_BIT_MODE_16)
{
/* write address on the bus */
SramWrite(pContext,DIB16_ADDR_MSB, Addr >> 8);
SramWrite(pContext,DIB16_ADDR_LSB, Addr & 0xff);
/* write the data on the bus */
if(ByteMode == DIBBRIDGE_BIT_MODE_8)
{
while(Cnt)
{
Cnt--;
SramWrite(pContext,DIB16_DATA_LSB, *(pBuf++));
}
}
else
{
Cnt >>= 1; /* number of WORDS */
while(Cnt)
{
Cnt--;
SramWrite(pContext,DIB16_DATA_MSB, *(pBuf++));
SramWrite(pContext,DIB16_DATA_LSB, *(pBuf++));
}
}
}
/****************************************************************************
* Write Data to the chip
* ----------------------------------------------------------------------
* Parameters:
* -----------
* struct DibBridgeContext *pContext
* uint16_t Addr: Address to write
* uint8_t ByteMode: Transfer Mode
* 0: 16 bits wide register write
* 1: 8 bits wide FIFO write
* uint32_t Cnt: Number of Bytes
* uint8_t *pBuf: Data Buffer
* ----------------------------------------------------------------------
* Return Code:
* -----------
* DIBSTATUS_SUCCESS
* DIBSTATUS_ERROR
****************************************************************************/
DIBSTATUS DibBridgeTargetWrite(struct DibBridgeContext *pContext, uint32_t Addr, uint8_t ByteMode, uint32_t Cnt, uint8_t *pBuf)
{
DIBSTATUS rc = DIBSTATUS_SUCCESS;
uint32_t status, nb_lack, device_address, curk;
uint32_t new_addr;
uint32_t k, n;
/* In word Mode the write count has to be even */
if((ByteMode == DIBBRIDGE_BIT_MODE_16) && (Cnt & 1))
{
DIB_DEBUG(PORT_LOG, (CRB "-E- DibBridgeTargetWrite: Odd byte count" CRA));
return DIBSTATUS_INVALID_PARAMETER;
}
/* Get semaphore to avoid concurrent access */
DibAcquireLock(&pContext->DibTargetAccessLock);
/* Add here the Code */
device_address = DEVICE_ADDRESS;
status = 0;
nb_lack = Cnt;
new_addr = Addr;
curk = 0;
/**************************************************************/
/********* 16 bits Architecture Dibcom Chips: *****************/
/**************************************************************/
/********* Dib7070, Dib7078, Dib9080, Dib9090 *****************/
/**************************************************************/
if(DibBridgeGetArch(pContext) == DIBBRIDGE_BIT_MODE_16)
{
while(nb_lack != 0)
{
pContext->BridgeTargetCtx.DataBuffer[0] = (new_addr>>8) & 0xFF;
pContext->BridgeTargetCtx.DataBuffer[1] = (new_addr ) & 0xFF;
if(nb_lack>I2C_MAX_RDWR_SIZE)
{
n = I2C_MAX_RDWR_SIZE;
}
else
{
n = nb_lack;
}
nb_lack -= n;
pContext->BridgeTargetCtx.DataBuffer[0] |= 0x10;
if(ByteMode == DIBBRIDGE_BIT_MODE_8)
{
pContext->BridgeTargetCtx.DataBuffer[0] |= 0x20;
}
for(k=0 ; k<n ; k++)
{
pContext->BridgeTargetCtx.DataBuffer[k+2] = pBuf[k+curk];
}
curk += n;
status |= I2CWrite(device_address, pContext->BridgeTargetCtx.DataBuffer, 2+n, ByteMode );
}
}
/**************************************************************/
/********* 32 bits Architecture Dibcom Chips: *****************/
/**************************************************************/
/******************* Dib29098, Dib10098 ***********************/
/**************************************************************/
else if(DibBridgeGetArch(pContext) == DIBBRIDGE_BIT_MODE_32)
