Example #1
0
static vmode_t nulldisp_validate_vmode(char *mode)
{
    const vinfo_t *info = get_valid_vinfo(mode);
    int viu1_select = aml_read_reg32(P_VPU_VIU_VENC_MUX_CTRL)&0x3;

	DisableVideoLayer();

    aml_set_reg32_bits (P_VPU_VIU_VENC_MUX_CTRL, (viu1_select+1)&0x3, 2, 2); //viu2_select should be different from viu1_select (to fix viu1 video smooth problem)

    if (info)
        return info->mode;

    return VMODE_MAX;
}
Example #2
0
static int osd1_init(logo_object_t *plogo)
{
	int hpd_state = 0;

	if(plogo->para.output_dev_type==output_osd1.idx)
	{
		DisableVideoLayer();
		if((plogo->platform_res[output_osd1.idx].mem_end - plogo->platform_res[output_osd1.idx].mem_start) ==0)
		{
			return OUTPUT_DEV_UNFOUND;
		}
		if(plogo->para.loaded)
		{
			osd_init_hw(plogo->para.loaded);
			if(plogo->para.vout_mode > VMODE_4K2K_SMPTE){
				plogo->para.vout_mode|=VMODE_LOGO_BIT_MASK;
			}
		}
#ifdef CONFIG_AM_HDMI_ONLY
		if(plogo->para.vout_mode > VMODE_4K2K_SMPTE) {
			set_current_vmode(plogo->para.vout_mode);
		}else{
			extern int read_hpd_gpio(void);
			hpd_state = read_hpd_gpio();
    		
			if (hpd_state == 0){
			    set_current_vmode(cvbsmode_hdmionly);
			}
			else{
			    set_current_vmode(hdmimode_hdmionly);
			}
		}
#else
		set_current_vmode(plogo->para.vout_mode);
#endif
		output_osd1.vinfo=get_current_vinfo();
		plogo->dev=&output_osd1;
		plogo->dev->window.x=0;
		plogo->dev->window.y=0;
		plogo->dev->window.w=plogo->dev->vinfo->width;
		plogo->dev->window.h=plogo->dev->vinfo->height;
		plogo->dev->output_dev.osd.mem_start=plogo->platform_res[LOGO_DEV_OSD1].mem_start;
		plogo->dev->output_dev.osd.mem_end=plogo->platform_res[LOGO_DEV_OSD1].mem_end;
		plogo->dev->output_dev.osd.color_depth=get_curr_color_depth(P_VIU_OSD2_BLK0_CFG_W0);//setup by uboot
		return OUTPUT_DEV_FOUND;
	}
	return OUTPUT_DEV_UNFOUND;
}
Example #3
0
static int osd1_init(logo_object_t *plogo)
{
#if defined(CONFIG_AM_HDMI_ONLY)
	int hpd_state = 0;
#endif
#if defined(CONFIG_AM_HDMI_ONLY) || (MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8)
	vmode_t cur_mode = plogo->para.vout_mode;
#endif

	if(plogo->para.output_dev_type==output_osd1.idx)
	{
		DisableVideoLayer();
		if((plogo->platform_res[output_osd1.idx].mem_end - plogo->platform_res[output_osd1.idx].mem_start) ==0)
		{
			return OUTPUT_DEV_UNFOUND;
		}
		if(plogo->para.loaded)
		{
			osd_init_hw(plogo->para.loaded);
			if(plogo->para.vout_mode > VMODE_4K2K_SMPTE){
				plogo->para.vout_mode|=VMODE_LOGO_BIT_MASK;
			}
		}
#ifdef CONFIG_AM_HDMI_ONLY
		if(plogo->para.vout_mode > VMODE_4K2K_SMPTE) {
			set_current_vmode(plogo->para.vout_mode);
		}else{
			extern int read_hpd_gpio(void);
			hpd_state = read_hpd_gpio();
    		
			if (hpd_state == 0){
			    cur_mode = cvbsmode_hdmionly;
			}
			else{
			    cur_mode = hdmimode_hdmionly;
			}
			set_current_vmode(cur_mode);
		}
#else
		set_current_vmode(plogo->para.vout_mode);
#endif

#if MESON_CPU_TYPE < MESON_CPU_TYPE_MESON8
		osd_init_scan_mode();
#endif
		output_osd1.vinfo=get_current_vinfo();
		plogo->dev=&output_osd1;
		plogo->dev->window.x=0;
		plogo->dev->window.y=0;
		plogo->dev->window.w=plogo->dev->vinfo->width;
		plogo->dev->window.h=plogo->dev->vinfo->height;
		plogo->dev->output_dev.osd.mem_start=plogo->platform_res[LOGO_DEV_OSD1].mem_start;
		plogo->dev->output_dev.osd.mem_end=plogo->platform_res[LOGO_DEV_OSD1].mem_end;
		plogo->dev->output_dev.osd.color_depth=get_curr_color_depth(P_VIU_OSD2_BLK0_CFG_W0);//setup by uboot
#if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8
		if((cur_mode != (plogo->para.vout_mode & VMODE_MODE_BIT_MASK)) && (cur_mode <= VMODE_4K2K_SMPTE)) {
		    set_osd_freescaler(LOGO_DEV_OSD1, plogo, cur_mode);
		}
#endif
		return OUTPUT_DEV_FOUND;
	}
	return OUTPUT_DEV_UNFOUND;
}