Example #1
0
/***************************************************************************//**
 * @brief
 *   Configure and enable External Bus Interface
 *
 * @param[in] ebiInit
 *   EBI configuration structure
 *
 * @note
 *   GPIO lines must be configured as PUSH_PULL for correct operation
 *   GPIO and EBI clocks must be enabled in the CMU
 ******************************************************************************/
void EBI_Init(const EBI_Init_TypeDef *ebiInit)
{
    uint32_t ctrl = EBI->CTRL;

#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
    /* Enable Independent Timing for devices that supports it */
    ctrl |= EBI_CTRL_ITS;

    /* Set polarity of address ready */
    EBI_BankPolaritySet(ebiInit->banks, ebiLineARDY, ebiInit->ardyPolarity);
    /* Set polarity of address latch enable */
    EBI_BankPolaritySet(ebiInit->banks, ebiLineALE, ebiInit->alePolarity);
    /* Set polarity of write enable */
    EBI_BankPolaritySet(ebiInit->banks, ebiLineWE, ebiInit->wePolarity);
    /* Set polarity of read enable */
    EBI_BankPolaritySet(ebiInit->banks, ebiLineRE, ebiInit->rePolarity);
    /* Set polarity of chip select lines */
    EBI_BankPolaritySet(ebiInit->banks, ebiLineCS, ebiInit->csPolarity);
    /* Set polarity of byte lane line */
    EBI_BankPolaritySet(ebiInit->banks, ebiLineBL, ebiInit->blPolarity);
#else
    /* Set polarity of address ready */
    EBI_PolaritySet(ebiLineARDY, ebiInit->ardyPolarity);
    /* Set polarity of address latch enable */
    EBI_PolaritySet(ebiLineALE, ebiInit->alePolarity);
    /* Set polarity of write enable */
    EBI_PolaritySet(ebiLineWE, ebiInit->wePolarity);
    /* Set polarity of read enable */
    EBI_PolaritySet(ebiLineRE, ebiInit->rePolarity);
    /* Set polarity of chip select lines */
    EBI_PolaritySet(ebiLineCS, ebiInit->csPolarity);
#endif

    /* Configure EBI mode and control settings  */
#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
    if (ebiInit->banks & EBI_BANK0)
    {
        ctrl &= ~(_EBI_CTRL_MODE_MASK|
                  _EBI_CTRL_ARDYEN_MASK|
                  _EBI_CTRL_ARDYTODIS_MASK|
                  _EBI_CTRL_BL_MASK|
                  _EBI_CTRL_NOIDLE_MASK|
                  _EBI_CTRL_BANK0EN_MASK);
        ctrl |= (ebiInit->mode << _EBI_CTRL_MODE_SHIFT);
        ctrl |= (ebiInit->ardyEnable << _EBI_CTRL_ARDYEN_SHIFT);
        ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTODIS_SHIFT);
        ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL_SHIFT);
        ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE_SHIFT);
        if ( ebiInit->enable)
        {
            ctrl |= EBI_CTRL_BANK0EN;
        }
    }
    if (ebiInit->banks & EBI_BANK1)
    {
        ctrl &= ~(_EBI_CTRL_BL1_MASK|
                  _EBI_CTRL_MODE1_MASK|
                  _EBI_CTRL_ARDY1EN_MASK|
                  _EBI_CTRL_ARDYTO1DIS_MASK|
                  _EBI_CTRL_NOIDLE1_MASK|
                  _EBI_CTRL_BANK1EN_MASK);
        ctrl |= (ebiInit->mode << _EBI_CTRL_MODE1_SHIFT);
        ctrl |= (ebiInit->ardyEnable << _EBI_CTRL_ARDY1EN_SHIFT);
        ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTO1DIS_SHIFT);
        ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL1_SHIFT);
        ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE1_SHIFT);
        if ( ebiInit->enable)
        {
            ctrl |= EBI_CTRL_BANK1EN;
        }
    }
    if (ebiInit->banks & EBI_BANK2)
    {
        ctrl &= ~(_EBI_CTRL_BL2_MASK|
                  _EBI_CTRL_MODE2_MASK|
                  _EBI_CTRL_ARDY2EN_MASK|
                  _EBI_CTRL_ARDYTO2DIS_MASK|
                  _EBI_CTRL_NOIDLE2_MASK|
                  _EBI_CTRL_BANK2EN_MASK);
        ctrl |= (ebiInit->mode << _EBI_CTRL_MODE2_SHIFT);
        ctrl |= (ebiInit->ardyEnable << _EBI_CTRL_ARDY2EN_SHIFT);
        ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTO2DIS_SHIFT);
        ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL2_SHIFT);
        ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE2_SHIFT);
        if ( ebiInit->enable)
        {
            ctrl |= EBI_CTRL_BANK2EN;
        }
    }
    if (ebiInit->banks & EBI_BANK3)
    {
        ctrl &= ~(_EBI_CTRL_BL3_MASK|
                  _EBI_CTRL_MODE3_MASK|
                  _EBI_CTRL_ARDY3EN_MASK|
                  _EBI_CTRL_ARDYTO3DIS_MASK|
                  _EBI_CTRL_NOIDLE3_MASK|
                  _EBI_CTRL_BANK3EN_MASK);
        ctrl |= (ebiInit->mode << _EBI_CTRL_MODE3_SHIFT);
        ctrl |= (ebiInit->ardyEnable << _EBI_CTRL_ARDY3EN_SHIFT);
        ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTO3DIS_SHIFT);
        ctrl |= (ebiInit->blEnable << _EBI_CTRL_BL3_SHIFT);
        ctrl |= (ebiInit->noIdle << _EBI_CTRL_NOIDLE3_SHIFT);
        if ( ebiInit->enable)
        {
            ctrl |= EBI_CTRL_BANK3EN;
        }
    }
#else
    ctrl &= ~(_EBI_CTRL_MODE_MASK|
              _EBI_CTRL_ARDYEN_MASK|
              _EBI_CTRL_ARDYTODIS_MASK|
              _EBI_CTRL_BANK0EN_MASK|
              _EBI_CTRL_BANK1EN_MASK|
              _EBI_CTRL_BANK2EN_MASK|
              _EBI_CTRL_BANK3EN_MASK);
    if ( ebiInit->enable)
    {
        if ( ebiInit->banks & EBI_BANK0 )
        {
            ctrl |= EBI_CTRL_BANK0EN;
        }
        if ( ebiInit->banks & EBI_BANK1 )
        {
            ctrl |= EBI_CTRL_BANK1EN;
        }
        if ( ebiInit->banks & EBI_BANK2 )
        {
            ctrl |= EBI_CTRL_BANK2EN;
        }
        if ( ebiInit->banks & EBI_BANK3 )
        {
            ctrl |= EBI_CTRL_BANK3EN;
        }
    }
    ctrl |= ebiInit->mode;
    ctrl |= (ebiInit->ardyEnable << _EBI_CTRL_ARDYEN_SHIFT);
    ctrl |= (ebiInit->ardyDisableTimeout << _EBI_CTRL_ARDYTODIS_SHIFT);
#endif

    /* Configure timing */
#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
    EBI_BankReadTimingSet(ebiInit->banks,
                          ebiInit->readSetupCycles,
                          ebiInit->readStrobeCycles,
                          ebiInit->readHoldCycles);
    EBI_BankReadTimingConfig(ebiInit->banks,
                             ebiInit->readPageMode,
                             ebiInit->readPrefetch,
                             ebiInit->readHalfRE);
    EBI_BankWriteTimingSet(ebiInit->banks,
                           ebiInit->writeSetupCycles,
                           ebiInit->writeStrobeCycles,
                           ebiInit->writeHoldCycles);
    EBI_BankWriteTimingConfig(ebiInit->banks,
                              ebiInit->writeBufferDisable,
                              ebiInit->writeHalfWE);
    EBI_BankAddressTimingSet(ebiInit->banks,
                             ebiInit->addrSetupCycles,
                             ebiInit->addrHoldCycles);
    EBI_BankAddressTimingConfig(ebiInit->banks,
                                ebiInit->addrHalfALE);
#else
    EBI_ReadTimingSet(ebiInit->readSetupCycles,
                      ebiInit->readStrobeCycles,
                      ebiInit->readHoldCycles);
    EBI_WriteTimingSet(ebiInit->writeSetupCycles,
                       ebiInit->writeStrobeCycles,
                       ebiInit->writeHoldCycles);
    EBI_AddressTimingSet(ebiInit->addrSetupCycles,
                         ebiInit->addrHoldCycles);
#endif

    /* Activate new configuration */
    EBI->CTRL = ctrl;

    /* Configure Adress Latch Enable */
    switch (ebiInit->mode)
    {
    case ebiModeD16A16ALE:
    case ebiModeD8A24ALE:
        /* Address Latch Enable */
        BITBAND_Peripheral(&(EBI->ROUTE), _EBI_ROUTE_ALEPEN_SHIFT, 1);
        break;
#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
    case ebiModeD16:
#endif
    case ebiModeD8A8:
        /* Make sure Address Latch is disabled */
        BITBAND_Peripheral(&(EBI->ROUTE), _EBI_ROUTE_ALEPEN_SHIFT, 0);
        break;
    }
#if defined(_EFM32_GIANT_FAMILY) || defined(_EFM32_WONDER_FAMILY)
    /* Limit pin enable */
    EBI->ROUTE = (EBI->ROUTE & ~_EBI_ROUTE_ALB_MASK) | ebiInit->aLow;
    EBI->ROUTE = (EBI->ROUTE & ~_EBI_ROUTE_APEN_MASK) | ebiInit->aHigh;
    /* Location */
    EBI->ROUTE = (EBI->ROUTE & ~_EBI_ROUTE_LOCATION_MASK) | ebiInit->location;

    /* Enable EBI BL pin if necessary */
    if(ctrl & (_EBI_CTRL_BL_MASK|_EBI_CTRL_BL1_MASK|_EBI_CTRL_BL2_MASK|_EBI_CTRL_BL3_MASK))
    {
        BITBAND_Peripheral(&(EBI->ROUTE), _EBI_ROUTE_BLPEN_SHIFT, ebiInit->blEnable);
    }
#endif
    /* Enable EBI pins EBI_WEn and EBI_REn */
    BITBAND_Peripheral(&(EBI->ROUTE), _EBI_ROUTE_EBIPEN_SHIFT, 1);

    /* Enable chip select lines */
    EBI_ChipSelectEnable(ebiInit->csLines, true);
}
Example #2
0
/***************************************************************************//**
 * @brief
 *   Configure and enable External Bus Interface
 *
 * @param[in] ebiInit
 *   EBI configuration structure
 *
 * @note
 *   GPIO lines must be configured as PUSH_PULL for correct operation
 *   GPIO and EBI clocks must be enabled in the CMU
 ******************************************************************************/
void EBI_Init(const EBI_Init_TypeDef *ebiInit)
{
  uint32_t ctrl = 0x00000000UL;

  /* Set polarity of address ready */
  EBI_PolaritySet(ebiLineARDY, ebiInit->ardyPolarity);
  /* Set polarity of address latch enable */
  EBI_PolaritySet(ebiLineALE, ebiInit->alePolarity);
  /* Set polarity of write enable */
  EBI_PolaritySet(ebiLineWE, ebiInit->wePolarity);
  /* Set polarity of read enable */
  EBI_PolaritySet(ebiLineRE, ebiInit->rePolarity);
  /* Set polarity of chip select lines */
  EBI_PolaritySet(ebiLineCS, ebiInit->csPolarity);

  /* Configure EBI mode */
  switch (ebiInit->mode)
  {
  case ebiModeD8A8:
    ctrl |= EBI_CTRL_MODE_D8A8;
    /* Make sure Address Latch is disabled */
    EBI->ROUTE &= ~(_EBI_ROUTE_ALEPEN_MASK);
    break;
  case ebiModeD16A16ALE:
    ctrl |= EBI_CTRL_MODE_D16A16ALE;
    /* Addres Latch Enable */
    EBI->ROUTE |= EBI_ROUTE_ALEPEN;
    break;
  case ebiModeD8A24ALE:
    ctrl |= EBI_CTRL_MODE_D8A24ALE;
    /* Addres Latch Enable */
    EBI->ROUTE |= EBI_ROUTE_ALEPEN;
    break;
  default:
    break;
  }
  /* Configure use of adress ready */
  if (ebiInit->ardyEnable)
  {
    ctrl |= (1 << _EBI_CTRL_ARDYEN_SHIFT);
  }
  /* Configure timeout disable, when address ready is enabled */
  if (ebiInit->ardyDisableTimeout)
  {
    ctrl |= (1 << _EBI_CTRL_ARDYTODIS_SHIFT);
  }
  EBI->CTRL = ctrl;

  /* Configure timing */
  EBI_ReadTimingSet(ebiInit->readSetupCycles,
                    ebiInit->readStrobeCycles,
                    ebiInit->readHoldCycles);
  EBI_WriteTimingSet(ebiInit->writeSetupCycles,
                     ebiInit->writeStrobeCycles,
                     ebiInit->writeHoldCycles);
  EBI_AddressTimingSet(ebiInit->addrSetupCycles,
                       ebiInit->addrHoldCycles);

  /* Enable chip select lines */
  EBI_ChipSelectEnable(ebiInit->csLines, true);
  /* Enable EBI pins ADxx, WEn, REn */
  EBI->ROUTE |= EBI_ROUTE_EBIPEN;

  /* Enable banks */
  if (ebiInit->enable)
  {
    EBI_BankEnable(ebiInit->banks, true);
  }
}