Example #1
0
/*******************************************************************************
* mvEthProtWinSet - Set access protection of Ethernet to target window.
*
* DESCRIPTION:
*       Each Ethernet port can be configured with access attributes for each 
*       of the Ethenret to target windows (address decode windows). This
*       function sets access attributes to a given window for the given channel.
*
* INPUTS:
*       ethPort   - ETH channel number. See MV_ETH_CHANNEL enumerator.
*       winNum - IETH to target address decode window number.
*       access - IETH access rights. See MV_ACCESS_RIGHTS enumerator.
*
* OUTPUT:
*       None.
*
* RETURN:
*       MV_ERROR in case window number is invalid or access right reserved.
*
*******************************************************************************/
MV_STATUS mvEthProtWinSet(MV_U32 portNo, MV_U32 winNum, MV_ACCESS_RIGHTS access)
{    
    MV_U32 protReg;

    /* Parameter checking   */
    if(portNo >= mvCtrlEthMaxPortGet())
    {
        mvOsPrintf("mvEthProtWinSet:ERR. Invalid port number %d\n", portNo);
        return MV_ERROR;
    }
    
    if (winNum >= ETH_MAX_DECODE_WIN)
    {
            mvOsPrintf("mvEthProtWinSet:ERR. Invalid winNum%d\n",winNum);
            return MV_ERROR;
    }

    if((access == ACC_RESERVED) || (access >= MAX_ACC_RIGHTS))
    {
        mvOsPrintf("mvEthProtWinSet:ERR. Inv access param %d\n", access);
        return MV_ERROR;
    }
    /* Read current protection register */
    protReg = MV_REG_READ(ETH_ACCESS_PROTECT_REG(portNo));
                          
    /* Clear protection window field */
    protReg &= ~(ETH_PROT_WIN_MASK(winNum));

    /* Set new protection field value */
    protReg |= (access << (ETH_PROT_WIN_OFFS(winNum)));
    
    /* Write protection register back   */
    MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(portNo), protReg);

    return MV_OK;
}               
Example #2
0
/* Configure EthDrv memory map registes. */
MV_STATUS 	mvEthWinInit (int port)
{
    MV_U32          winNum, status, winPrioIndex=0, i, regVal=0;
    MV_ETH_DEC_WIN  ethWin;
    MV_CPU_DEC_WIN  cpuAddrDecWin;
    static MV_U32   accessProtReg = 0;

#if (MV_ETH_VERSION <= 1)
    static MV_BOOL  isFirst = MV_TRUE;

    if(isFirst == MV_FALSE)
    {
        MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(port), accessProtReg);
        return MV_OK;
    }
    isFirst = MV_FALSE;
#endif /* MV_GIGA_ETH_VERSION */

    /* Initiate Ethernet address decode */

    /* First disable all address decode windows */
    for(winNum=0; winNum<ETH_MAX_DECODE_WIN; winNum++)
    {
        regVal |= MV_BIT_MASK(winNum);
    }
    MV_REG_WRITE(ETH_BASE_ADDR_ENABLE_REG(port), regVal);

   /* Go through all windows in user table until table terminator      */
    for (winNum=0; ((ethAddrDecPrioTap[winPrioIndex] != TBL_TERM) && 
                    (winNum < ETH_MAX_DECODE_WIN)); )
    {
        /* first get attributes from CPU If */
        status = mvCpuIfTargetWinGet(ethAddrDecPrioTap[winPrioIndex], 
                                     &cpuAddrDecWin);

        if(MV_NO_SUCH == status)
        {
            winPrioIndex++;
            continue;
        }
		if (MV_OK != status)
		{
			mvOsPrintf("mvEthWinInit: ERR. mvCpuIfTargetWinGet failed\n");
			return MV_ERROR;
		}

        if (cpuAddrDecWin.enable == MV_TRUE)
        {
            ethWin.addrWin.baseHigh = cpuAddrDecWin.addrWin.baseHigh;
            ethWin.addrWin.baseLow = cpuAddrDecWin.addrWin.baseLow;
            ethWin.addrWin.size = cpuAddrDecWin.addrWin.size;
            ethWin.enable = MV_TRUE;
            ethWin.target = ethAddrDecPrioTap[winPrioIndex];

            if(MV_OK != mvEthWinSet(port, winNum, &ethWin))
            {
                mvOsPrintf("mvEthWinInit: ERR. mvEthWinSet failed winNum=%d\n",
                           winNum);
                return MV_ERROR;
            }
            winNum++;
        }
        winPrioIndex ++;
    }

    /* set full access to all windows. */
    for(i=0; i<winNum; i++)
    {
        accessProtReg |= (FULL_ACCESS << (i*2));
    }
    MV_REG_WRITE(ETH_ACCESS_PROTECT_REG(port), accessProtReg);

    return MV_OK;
}
Example #3
0
/* Print important registers of Ethernet port */
void    ethPortRegs(int port)
{
    mvOsPrintf("\t ethGiga #%d port Registers:\n", port);

    mvOsPrintf("ETH_PORT_STATUS_REG                 : 0x%X = 0x%08x\n", 
                ETH_PORT_STATUS_REG(port), 
                MV_REG_READ( ETH_PORT_STATUS_REG(port) ) );

    mvOsPrintf("ETH_PORT_SERIAL_CTRL_REG            : 0x%X = 0x%08x\n", 
                ETH_PORT_SERIAL_CTRL_REG(port), 
                MV_REG_READ( ETH_PORT_SERIAL_CTRL_REG(port) ) );

    mvOsPrintf("ETH_PORT_CONFIG_REG                 : 0x%X = 0x%08x\n", 
                ETH_PORT_CONFIG_REG(port), 
                MV_REG_READ( ETH_PORT_CONFIG_REG(port) ) );    

    mvOsPrintf("ETH_PORT_CONFIG_EXTEND_REG          : 0x%X = 0x%08x\n", 
                ETH_PORT_CONFIG_EXTEND_REG(port), 
                MV_REG_READ( ETH_PORT_CONFIG_EXTEND_REG(port) ) );    

    mvOsPrintf("ETH_SDMA_CONFIG_REG                 : 0x%X = 0x%08x\n", 
                ETH_SDMA_CONFIG_REG(port), 
                MV_REG_READ( ETH_SDMA_CONFIG_REG(port) ) );    
    
    mvOsPrintf("ETH_MAX_TRANSMIT_UNIT               : 0x%X = 0x%08x\n", 
                ETH_MAX_TRANSMIT_UNIT_REG(port), 
                MV_REG_READ( ETH_MAX_TRANSMIT_UNIT_REG(port) ) );    
    
    mvOsPrintf("ETH_TX_FIFO_URGENT_THRESH_REG       : 0x%X = 0x%08x\n", 
                ETH_TX_FIFO_URGENT_THRESH_REG(port), 
                MV_REG_READ( ETH_TX_FIFO_URGENT_THRESH_REG(port) ) );    

    mvOsPrintf("ETH_RX_QUEUE_COMMAND_REG            : 0x%X = 0x%08x\n", 
                ETH_RX_QUEUE_COMMAND_REG(port), 
                MV_REG_READ( ETH_RX_QUEUE_COMMAND_REG(port) ) );    

    mvOsPrintf("ETH_TX_QUEUE_COMMAND_REG            : 0x%X = 0x%08x\n", 
                ETH_TX_QUEUE_COMMAND_REG(port), 
                MV_REG_READ( ETH_TX_QUEUE_COMMAND_REG(port) ) );    

    mvOsPrintf("ETH_INTR_CAUSE_REG                  : 0x%X = 0x%08x\n", 
                ETH_INTR_CAUSE_REG(port), 
                MV_REG_READ( ETH_INTR_CAUSE_REG(port) ) );    

    mvOsPrintf("ETH_INTR_EXTEND_CAUSE_REG           : 0x%X = 0x%08x\n", 
                ETH_INTR_CAUSE_EXT_REG(port), 
                MV_REG_READ( ETH_INTR_CAUSE_EXT_REG(port) ) );    

    mvOsPrintf("ETH_INTR_MASK_REG                   : 0x%X = 0x%08x\n", 
                ETH_INTR_MASK_REG(port), 
                MV_REG_READ( ETH_INTR_MASK_REG(port) ) );    

    mvOsPrintf("ETH_INTR_EXTEND_MASK_REG            : 0x%X = 0x%08x\n", 
                ETH_INTR_MASK_EXT_REG(port), 
                MV_REG_READ( ETH_INTR_MASK_EXT_REG(port) ) );    

    mvOsPrintf("ETH_ACCESS_PROTECT_REG              : 0x%X = 0x%08x\n", 
                ETH_ACCESS_PROTECT_REG(port),
                MV_REG_READ( ETH_ACCESS_PROTECT_REG(port) ) );       

    mvOsPrintf("ETH_UNIT_DEBUG_0_REG                : 0x%X = 0x%08x\n", 
                ETH_UNIT_DEBUG_0_REG, MV_REG_READ( ETH_UNIT_DEBUG_0_REG ) );    

    mvOsPrintf("ETH_UNIT_DEBUG_1_REG                : 0x%X = 0x%08x\n", 
                ETH_UNIT_DEBUG_1_REG, MV_REG_READ( ETH_UNIT_DEBUG_1_REG ) );    

    mvOsPrintf("ETH_PORT_DEBUG_0_REG                : 0x%X = 0x%08x\n", 
                ETH_PORT_DEBUG_0_REG(port), MV_REG_READ( ETH_PORT_DEBUG_0_REG(port)) );    

    mvOsPrintf("ETH_PORT_DEBUG_1_REG                : 0x%X = 0x%08x\n", 
                ETH_PORT_DEBUG_1_REG(port), MV_REG_READ( ETH_PORT_DEBUG_1_REG(port)) );    

    mvOsPrintf("ETH_RX_DESCR_STAT_CMD_REG           : 0x%X = 0x%08x\n", 
                ETH_RX_DESCR_STAT_CMD_REG(port, 0), 
                MV_REG_READ( ETH_RX_DESCR_STAT_CMD_REG(port, 0) ) );    

    mvOsPrintf("ETH_RX_BYTE_COUNT_REG               : 0x%X = 0x%08x\n", 
                ETH_RX_BYTE_COUNT_REG(port, 0), 
                MV_REG_READ( ETH_RX_BYTE_COUNT_REG(port, 0) ) );    

    mvOsPrintf("ETH_RX_BUF_PTR_REG                  : 0x%X = 0x%08x\n", 
                ETH_RX_BUF_PTR_REG(port, 0), 
                MV_REG_READ( ETH_RX_BUF_PTR_REG(port, 0) ) );    

    mvOsPrintf("ETH_RX_CUR_DESC_PTR_REG             : 0x%X = 0x%08x\n", 
                ETH_RX_CUR_DESC_PTR_REG(port, 0), 
                MV_REG_READ( ETH_RX_CUR_DESC_PTR_REG(port, 0) ) );    
}