static void etsec_instance_init(Object *obj) { eTSEC *etsec = ETSEC_COMMON(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); memory_region_init_io(&etsec->io_area, OBJECT(etsec), &etsec_ops, etsec, "eTSEC", 0x1000); sysbus_init_mmio(sbd, &etsec->io_area); sysbus_init_irq(sbd, &etsec->tx_irq); sysbus_init_irq(sbd, &etsec->rx_irq); sysbus_init_irq(sbd, &etsec->err_irq); }
static void etsec_realize(DeviceState *dev, Error **errp) { eTSEC *etsec = ETSEC_COMMON(dev); etsec->nic = qemu_new_nic(&net_etsec_info, &etsec->conf, object_get_typename(OBJECT(dev)), dev->id, etsec); qemu_format_nic_info_str(qemu_get_queue(etsec->nic), etsec->conf.macaddr.a); etsec->bh = qemu_bh_new(etsec_timer_hit, etsec); etsec->ptimer = ptimer_init(etsec->bh, PTIMER_POLICY_DEFAULT); ptimer_set_freq(etsec->ptimer, 100); }
static void etsec_reset(DeviceState *d) { eTSEC *etsec = ETSEC_COMMON(d); int i = 0; int reg_index = 0; /* Default value for all registers */ for (i = 0; i < ETSEC_REG_NUMBER; i++) { etsec->regs[i].name = "Reserved"; etsec->regs[i].desc = ""; etsec->regs[i].access = ACC_UNKNOWN; etsec->regs[i].value = 0x00000000; } /* Set-up known registers */ for (i = 0; eTSEC_registers_def[i].name != NULL; i++) { reg_index = eTSEC_registers_def[i].offset / 4; etsec->regs[reg_index].name = eTSEC_registers_def[i].name; etsec->regs[reg_index].desc = eTSEC_registers_def[i].desc; etsec->regs[reg_index].access = eTSEC_registers_def[i].access; etsec->regs[reg_index].value = eTSEC_registers_def[i].reset; } etsec->tx_buffer = NULL; etsec->tx_buffer_len = 0; etsec->rx_buffer = NULL; etsec->rx_buffer_len = 0; etsec->phy_status = MII_SR_EXTENDED_CAPS | MII_SR_LINK_STATUS | MII_SR_AUTONEG_CAPS | MII_SR_AUTONEG_COMPLETE | MII_SR_PREAMBLE_SUPPRESS | MII_SR_EXTENDED_STATUS | MII_SR_100T2_HD_CAPS | MII_SR_100T2_FD_CAPS | MII_SR_10T_HD_CAPS | MII_SR_10T_FD_CAPS | MII_SR_100X_HD_CAPS | MII_SR_100X_FD_CAPS | MII_SR_100T4_CAPS; }
static int create_devtree_etsec(SysBusDevice *sbdev, PlatformDevtreeData *data) { eTSEC *etsec = ETSEC_COMMON(sbdev); PlatformBusDevice *pbus = data->pbus; hwaddr mmio0 = platform_bus_get_mmio_addr(pbus, sbdev, 0); int irq0 = platform_bus_get_irqn(pbus, sbdev, 0); int irq1 = platform_bus_get_irqn(pbus, sbdev, 1); int irq2 = platform_bus_get_irqn(pbus, sbdev, 2); gchar *node = g_strdup_printf("/platform/ethernet@%"PRIx64, mmio0); gchar *group = g_strdup_printf("%s/queue-group", node); void *fdt = data->fdt; assert((int64_t)mmio0 >= 0); assert(irq0 >= 0); assert(irq1 >= 0); assert(irq2 >= 0); qemu_fdt_add_subnode(fdt, node); qemu_fdt_setprop_string(fdt, node, "device_type", "network"); qemu_fdt_setprop_string(fdt, node, "compatible", "fsl,etsec2"); qemu_fdt_setprop_string(fdt, node, "model", "eTSEC"); qemu_fdt_setprop(fdt, node, "local-mac-address", etsec->conf.macaddr.a, 6); qemu_fdt_setprop_cells(fdt, node, "fixed-link", 0, 1, 1000, 0, 0); qemu_fdt_add_subnode(fdt, group); qemu_fdt_setprop_cells(fdt, group, "reg", mmio0, 0x1000); qemu_fdt_setprop_cells(fdt, group, "interrupts", data->irq_start + irq0, 0x2, data->irq_start + irq1, 0x2, data->irq_start + irq2, 0x2); g_free(node); g_free(group); return 0; }