/*
* ======== EUSCI_A0_graceInit ========
* Initialize Config for the MSP430 eUSCI_A0
*/
void EUSCI_A0_graceInit(void)
{
/* USER CODE START (section: EUSCI_A0_graceInit_prologue) */
/* User initialization code */
/* USER CODE END (section: EUSCI_A0_graceInit_prologue) */
/* initialize UART for 115200 baud (based on a 8000000 Hz clock) */
if (STATUS_FAIL == EUSCI_A_UART_initAdvance(EUSCI_A0_BASE, EUSCI_A_UART_CLOCKSOURCE_SMCLK, 4, 5, 85,
EUSCI_A_UART_NO_PARITY, EUSCI_A_UART_LSB_FIRST, EUSCI_A_UART_ONE_STOP_BIT, EUSCI_A_UART_MODE, 1)) {
return;
}
/* enable eUSCI UART */
EUSCI_A_UART_enable(EUSCI_A0_BASE);
/* set deglitch time */
EUSCI_A_UART_selectDeglitchTime(EUSCI_A0_BASE, EUSCI_A_UART_DEGLITCH_TIME_200ns);
/* disable eUSCI UART transmit interrupt */
EUSCI_A_UART_disableInterrupt(EUSCI_A0_BASE, EUSCI_A_UART_TRANSMIT_INTERRUPT);
/* disable eUSCI UART receive interrupt */
EUSCI_A_UART_disableInterrupt(EUSCI_A0_BASE, EUSCI_A_UART_RECEIVE_INTERRUPT);
/* USER CODE START (section: EUSCI_A0_graceInit_epilogue) */
/* User code */
/* USER CODE END (section: EUSCI_A0_graceInit_epilogue) */
}
/**
* RIC
* Configure eUSCI A0 in UART mode with RX ringbuffer
*/
int uart_a0_init(event_handler_t uart_a0_rx_cmdline_handler) {
/*
* Short: A0_UART,1MHz-DCO-SMCLK/9600-N-1,normal
* Connection: P2.0 (TX) - Isolation Block
* P2.1 (RX) - Isolation Block
*
* Clock Source: SMCLK
* Clock Rate: DCO 1MHz
*
* Baud Rate: 9600 baud/s
* Parity: none
* Stop Bits: 1
* Flow Control: none
* Bit Order: LSB first
* UART Mode: normal
*
*/
int status = -1;
// eUSCI A0 as UART device on P2.0 (TX) and P2.1 (RX)
GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P2, GPIO_PIN0,
GPIO_SECONDARY_MODULE_FUNCTION);
GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P2, GPIO_PIN1,
GPIO_SECONDARY_MODULE_FUNCTION);
// configure parameters
EUSCI_A_UART_initParam eUSCI_initParam = {
EUSCI_A_UART_CLOCKSOURCE_SMCLK, // selectClockSource
6, // clockPrescalar UCBRx
8, // firstModReg UCBRFx
0x20, // secondModReg UCBRSx
EUSCI_A_UART_NO_PARITY, EUSCI_A_UART_LSB_FIRST,
EUSCI_A_UART_ONE_STOP_BIT, EUSCI_A_UART_MODE,
EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION };
/* Initialize the ring buffers */
rb_attr_t rx_rbf_attr = { sizeof(_uart_a0_rx_rbmem[0]), ARRAY_SIZE(
_uart_a0_rx_rbmem), _uart_a0_rx_rbmem };
rb_attr_t tx_rbf_attr = { sizeof(_uart_a0_tx_rbmem[0]), ARRAY_SIZE(
_uart_a0_tx_rbmem), _uart_a0_tx_rbmem };
if (ring_buffer_init(&_uart_a0_rx_ringbuffer_id, &rx_rbf_attr) == 0
&& ring_buffer_init(&_uart_a0_tx_ringbuffer_id, &tx_rbf_attr) == 0) {
// ring buffers have been initialized successfully, continue to
// register the events associated with UART RX and TX
_uart_a0_rx_ev = event_add(uart_a0_rx_cmdline_handler);
_uart_a0_tx_start_ev = event_add(uart_a0_tx_start_handler);
_uart_a0_tx_rdy_ev = event_add(uart_a0_tx_rdy_handler);
_uart_a0_tx_interrupt_pending_ev = event_add(
uart_a0_tx_interrupt_pending);
// write parameters to module and activate it
EUSCI_A_UART_init(EUSCI_A0_BASE, &eUSCI_initParam);
EUSCI_A_UART_enable(EUSCI_A0_BASE);
EUSCI_A_UART_enableInterrupt(EUSCI_A0_BASE,
EUSCI_A_UART_RECEIVE_INTERRUPT); // we need this order: module enable, then interrupt enable
status = 0;
}
return status;
}
