}; static struct extra_reg intel_snbep_extra_regs[] __read_mostly = { /* must define OFFCORE_RSP_X first, see intel_fixup_er() */ INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x3fffff8fffull, RSP_0), INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0x3fffff8fffull, RSP_1), INTEL_UEVENT_PEBS_LDLAT_EXTRA_REG(0x01cd), EVENT_EXTRA_END }; EVENT_ATTR_STR(mem-loads, mem_ld_nhm, "event=0x0b,umask=0x10,ldlat=3"); EVENT_ATTR_STR(mem-loads, mem_ld_snb, "event=0xcd,umask=0x1,ldlat=3"); EVENT_ATTR_STR(mem-stores, mem_st_snb, "event=0xcd,umask=0x2"); struct attribute *nhm_events_attrs[] = { EVENT_PTR(mem_ld_nhm), NULL, }; struct attribute *snb_events_attrs[] = { EVENT_PTR(mem_ld_snb), EVENT_PTR(mem_st_snb), NULL, }; static struct event_constraint intel_hsw_event_constraints[] = { FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */ FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */ FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */ INTEL_EVENT_CONSTRAINT(0x48, 0x4), /* L1D_PEND_MISS.* */ INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PREC_DIST */
.attrs = pmu_attrs, }; /* * Currently it only supports to report the power of each * processor/package. */ EVENT_ATTR_STR(power-pkg, power_pkg, "event=0x01"); EVENT_ATTR_STR(power-pkg.unit, power_pkg_unit, "mWatts"); /* Convert the count from micro-Watts to milli-Watts. */ EVENT_ATTR_STR(power-pkg.scale, power_pkg_scale, "1.000000e-3"); static struct attribute *events_attr[] = { EVENT_PTR(power_pkg), EVENT_PTR(power_pkg_unit), EVENT_PTR(power_pkg_scale), NULL, }; static struct attribute_group pmu_events_group = { .name = "events", .attrs = events_attr, }; PMU_FORMAT_ATTR(event, "config:0-7"); static struct attribute *formats_attr[] = { &format_attr_event.attr, NULL,