C++ (Cpp) EXYNOS4_GPF1 Examples

Example #1

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File: board-grande-lcd.c Project: Entropy512/I9300_N8013_Changes

int s6c1372_panel_gpio_init(void)
{
	int i, f3_end = 4;

	for (i = 0; i < 8; i++) {
		/* set GPF0,1,2[0:7] for RGB Interface and Data line (32bit) */
		s3c_gpio_cfgpin(EXYNOS4_GPF0(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF0(i), S3C_GPIO_PULL_NONE);
	}

	for (i = 0; i < 8; i++) {
		s3c_gpio_cfgpin(EXYNOS4_GPF1(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF1(i), S3C_GPIO_PULL_NONE);
	}

	for (i = 0; i < 8; i++) {
		s3c_gpio_cfgpin(EXYNOS4_GPF2(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF2(i), S3C_GPIO_PULL_NONE);
	}

	for (i = 0; i < f3_end; i++) {
		s3c_gpio_cfgpin(EXYNOS4_GPF3(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF3(i), S3C_GPIO_PULL_NONE);
	}

	return 0;
}

Example #2

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File: setup-fimd0.c Project: GeekOnTrip/android_kernel_c8690

void exynos4_fimd0_gpio_setup_24bpp(void)
{
	unsigned int reg = 0;
	
#if defined(CONFIG_LCD_WA101S) || defined(CONFIG_LCD_LTE480WV)
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4);
#elif defined(CONFIG_LCD_AMS369FG06)
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
#elif defined(CONFIG_LCD_LMS501KF03)
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
#endif
	/*
	 * Set DISPLAY_CONTROL register for Display path selection.
	 *
	 * DISPLAY_CONTROL[1:0]
	 * ---------------------
	 *  00 | MIE
	 *  01 | MDINE
	 *  10 | FIMD : selected
	 *  11 | FIMD
	 */
	reg = __raw_readl(S3C_VA_SYS + 0x0210);
	reg |= (1 << 1);
	__raw_writel(reg, S3C_VA_SYS + 0x0210);

#if 1	// TC4
	//LVDS_PWDN
	err = gpio_request(EXYNOS4_GPL1(0), "GPL1_0");
	if (err) {
		printk(KERN_ERR "failed to request GPL1 for "
			"lcd power control\n");
		return ;
	}
	gpio_direction_output(EXYNOS4_GPL1(0), 1);

	s3c_gpio_cfgpin(EXYNOS4_GPL1(0), S3C_GPIO_OUTPUT);
	gpio_free(EXYNOS4_GPL1(0));
#endif

	
}

Example #3

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File: board-lcd-evf.c Project: DutchDanny/android_kernel_samsung_lt01

static void lcd_gpio_cfg(int onoff)
{
	if (onoff) {
		lcd_gpio_setup(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV2);
		lcd_gpio_setup(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV2);
		lcd_gpio_setup(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV2);
		lcd_gpio_setup(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV2);
	}
	else {
		s3c_gpio_cfgall_range(EXYNOS4_GPF0(0), 8, S3C_GPIO_INPUT, S3C_GPIO_PULL_DOWN);
		s3c_gpio_cfgall_range(EXYNOS4_GPF1(0), 8, S3C_GPIO_INPUT, S3C_GPIO_PULL_DOWN);
		s3c_gpio_cfgall_range(EXYNOS4_GPF2(0), 8, S3C_GPIO_INPUT, S3C_GPIO_PULL_DOWN);
		s3c_gpio_cfgall_range(EXYNOS4_GPF3(0), 4, S3C_GPIO_INPUT, S3C_GPIO_PULL_DOWN);
	}
}

Example #4

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File: setup-fimd0.c Project: embeddedclass/tiny4412-kernel

void exynos4_fimd0_gpio_setup_24bpp(void)
{
	unsigned int reg;

	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV3);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV3);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV3);
	exynos4_fimd0_cfg_gpios(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV3);

	s5p_gpio_set_drvstr(EXYNOS4_GPF0(0), S5P_GPIO_DRVSTR_LV2);
	s5p_gpio_set_drvstr(EXYNOS4_GPF0(1), S5P_GPIO_DRVSTR_LV2);
	s5p_gpio_set_drvstr(EXYNOS4_GPF0(2), S5P_GPIO_DRVSTR_LV2);
	s5p_gpio_set_drvstr(EXYNOS4_GPF0(3), S5P_GPIO_DRVSTR_LV2);

	/*
	 * Set DISPLAY_CONTROL register for Display path selection.
	 *
	 * DISPLAY_CONTROL[1:0]
	 * ---------------------
	 *  00 | MIE
	 *  01 | MDINE
	 *  10 | FIMD : selected
	 *  11 | FIMD
	 */
	reg = __raw_readl(S3C_VA_SYS + 0x0210);
	reg |= (1 << 1);
	__raw_writel(reg, S3C_VA_SYS + 0x0210);
}

Example #5

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File: setup-fb-s5p.c Project: dadonking/xxICSKernel

void s3cfb_cfg_gpio(struct platform_device *pdev)
{
	s3cfb_gpio_setup_24bpp(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
	s3cfb_gpio_setup_24bpp(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
	s3cfb_gpio_setup_24bpp(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
	s3cfb_gpio_setup_24bpp(EXYNOS4_GPF3(0), 6, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV1);
}

Example #6

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File: setup-fb-s5p.c Project: dadonking/xxICSKernel

void s3cfb_cfg_gpio(struct platform_device *pdev)
{
	int i;
	u32 reg;

	for (i = 0; i < 8; i++) {
		s3c_gpio_cfgpin(EXYNOS4_GPF0(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF0(i), S3C_GPIO_PULL_NONE);
		s5p_gpio_set_drvstr(EXYNOS4_GPF0(i), S5P_GPIO_DRVSTR_LV4);
	}

	for (i = 0; i < 8; i++) {
		s3c_gpio_cfgpin(EXYNOS4_GPF1(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF1(i), S3C_GPIO_PULL_NONE);
		s5p_gpio_set_drvstr(EXYNOS4_GPF1(i), S5P_GPIO_DRVSTR_LV4);
	}

	for (i = 0; i < 8; i++) {
		s3c_gpio_cfgpin(EXYNOS4_GPF2(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF2(i), S3C_GPIO_PULL_NONE);
		s5p_gpio_set_drvstr(EXYNOS4_GPF2(i), S5P_GPIO_DRVSTR_LV4);
	}

	for (i = 0; i < 4; i++) {
		s3c_gpio_cfgpin(EXYNOS4_GPF3(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF3(i), S3C_GPIO_PULL_NONE);
		s5p_gpio_set_drvstr(EXYNOS4_GPF3(i), S5P_GPIO_DRVSTR_LV4);
	}

	/* Set FIMD0 bypass */
#ifdef CONFIG_FB_S5P_MDNIE
	reg = __raw_readl(S3C_VA_SYS + 0x0210);
	reg &= ~(1<<13);
	reg &= ~(1<<12);
	reg &= ~(3<<10);
	reg |= (1<<0);
	reg &= ~(1<<1);
	__raw_writel(reg, S3C_VA_SYS + 0x0210);
#else
	reg = __raw_readl(S3C_VA_SYS + 0x0210);
	reg |= (1<<1);
	__raw_writel(reg, S3C_VA_SYS + 0x0210);
#endif
}

Example #7

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File: board-grande-lcd.c Project: Entropy512/I9300_N8013_Changes

static int lcd_cfg_gpio(void)
{
	int i, f3_end = 4;

	for (i = 0; i < 8; i++) {
		/* set GPF0,1,2[0:7] for RGB Interface and Data line (32bit) */
		s3c_gpio_cfgpin(EXYNOS4_GPF0(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF0(i), S3C_GPIO_PULL_NONE);
	}
	for (i = 0; i < 8; i++) {
		s3c_gpio_cfgpin(EXYNOS4_GPF1(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF1(i), S3C_GPIO_PULL_NONE);
	}

	for (i = 0; i < 8; i++) {
		s3c_gpio_cfgpin(EXYNOS4_GPF2(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF2(i), S3C_GPIO_PULL_NONE);
	}

	for (i = 0; i < f3_end; i++) {
		s3c_gpio_cfgpin(EXYNOS4_GPF3(i), S3C_GPIO_SFN(2));
		s3c_gpio_setpull(EXYNOS4_GPF3(i), S3C_GPIO_PULL_NONE);
	}

	/* MLCD_RST */
	s3c_gpio_cfgpin(EXYNOS4_GPY4(5), S3C_GPIO_OUTPUT);
	s3c_gpio_setpull(EXYNOS4_GPY4(5), S3C_GPIO_PULL_NONE);

	/* LCD_nCS */
	s3c_gpio_cfgpin(EXYNOS4_GPY4(3), S3C_GPIO_OUTPUT);
	s3c_gpio_setpull(EXYNOS4_GPY4(3), S3C_GPIO_PULL_NONE);

	/* LCD_SCLK */
	s3c_gpio_cfgpin(EXYNOS4_GPY3(1), S3C_GPIO_OUTPUT);
	s3c_gpio_setpull(EXYNOS4_GPY3(1), S3C_GPIO_PULL_NONE);

	/* LCD_SDI */
	s3c_gpio_cfgpin(EXYNOS4_GPY3(3), S3C_GPIO_OUTPUT);
	s3c_gpio_setpull(EXYNOS4_GPY3(3), S3C_GPIO_PULL_NONE);

	return 0;
}

Example #8

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File: setup-fb-s5p.c Project: dadonking/xxICSKernel

void s3cfb_cfg_gpio_sleep(struct platform_device *pdev)
{
	int i;
/* Put all LCD pin into "INPUT-PULLDOWN" State to reduce sleep mode current */
	for (i = 0; i < 8; i++) {
		gpio_direction_input(EXYNOS4_GPF0(i));
		s3c_gpio_setpull(EXYNOS4_GPF0(i), S3C_GPIO_PULL_DOWN);
	}
	for (i = 0; i < 8; i++) {
		gpio_direction_input(EXYNOS4_GPF1(i));
		s3c_gpio_setpull(EXYNOS4_GPF1(i), S3C_GPIO_PULL_DOWN);
	}
	for (i = 0; i < 8; i++) {
		gpio_direction_input(EXYNOS4_GPF2(i));
		s3c_gpio_setpull(EXYNOS4_GPF2(i), S3C_GPIO_PULL_DOWN);
	}
	for (i = 0; i < 4; i++) {
		gpio_direction_input(EXYNOS4_GPF3(i));
		s3c_gpio_setpull(EXYNOS4_GPF3(i), S3C_GPIO_PULL_DOWN);
	}
}

Example #9

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File: setup-fb-s5p.c Project: Android-Dongyf/itop-kernel

void s3cfb_cfg_gpio(struct platform_device *pdev)
{
	int err;
	
	/* add by cym 20150120 */
#if 1
	err = gpio_request(EXYNOS4_GPC0(2), "VGA_EN");
        if (err) {
                printk(KERN_ERR "failed to request VGA_EN\n");
                return err;
        }

        gpio_direction_output(EXYNOS4_GPC0(2), 0);

        s3c_gpio_cfgpin(EXYNOS4_GPC0(2), S3C_GPIO_OUTPUT);
        gpio_free(EXYNOS4_GPC0(2));
	msleep(250);

        err = gpio_request(EXYNOS4_GPL0(4), "BK_VDD_EN");
        if (err) {
                printk(KERN_ERR "failed to request BK_VDD_EN\n");
                //return err;
        }

        gpio_direction_output(EXYNOS4_GPL0(4), 1);
        s3c_gpio_cfgpin(EXYNOS4_GPL0(4), S3C_GPIO_OUTPUT);
        gpio_free(EXYNOS4_GPL0(4));

        printk("(%s, %d): BK_VDD_ON\n", __FUNCTION__, __LINE__);
	msleep(100);
#endif
	s3cfb_gpio_setup_24bpp(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4);
	s3cfb_gpio_setup_24bpp(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4);
	s3cfb_gpio_setup_24bpp(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4);
	s3cfb_gpio_setup_24bpp(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2), S5P_GPIO_DRVSTR_LV4);
#if 1	// TC4
	//LVDS_PWDN
	err = gpio_request(EXYNOS4_GPL1(0), "GPL1_0");
	if (err) {
		printk(KERN_ERR "failed to request GPL1 for "
			"lcd power control\n");
		return err;
	}
	gpio_direction_output(EXYNOS4_GPL1(0), 1);

	s3c_gpio_cfgpin(EXYNOS4_GPL1(0), S3C_GPIO_OUTPUT);
	gpio_free(EXYNOS4_GPL1(0));

	printk("(%s, %d): LCD_PWDN ON\n", __FUNCTION__, __LINE__);
#endif
}

Example #10

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File: setup-fimd0.c Project: 0x000000FF/Linux4Edison

void exynos4_fimd0_gpio_setup_24bpp(void)
{
	unsigned int reg;

	s3c_gpio_cfgrange_nopull(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2));
	s3c_gpio_cfgrange_nopull(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2));
	s3c_gpio_cfgrange_nopull(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2));
	s3c_gpio_cfgrange_nopull(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2));

	/*
	 * Set DISPLAY_CONTROL register for Display path selection.
	 *
	 * DISPLAY_CONTROL[1:0]
	 * ---------------------
	 *  00 | MIE
	 *  01 | MDINE
	 *  10 | FIMD : selected
	 *  11 | FIMD
	 */
	reg = __raw_readl(S3C_VA_SYS + 0x0210);
	reg |= (1 << 1);
	__raw_writel(reg, S3C_VA_SYS + 0x0210);
}

Example #11

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File: board-grande-gpio.c Project: Entropy512/I9300_N8013_Changes

    {EXYNOS4_GPD1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},

    {EXYNOS4_GPF0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4_GPF0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4_GPF0(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
    {EXYNOS4_GPF0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    /* FOLDER_PMIC_SDA */
    {EXYNOS4_GPF0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP},
    {EXYNOS4_GPF0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    /* FOLDER_PMIC_SCL */
    {EXYNOS4_GPF0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP},
    /* SUB_PMIC_SDA */
    {EXYNOS4_GPF0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP},

    /* SUB_PMIC_SCL */
    {EXYNOS4_GPF1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP},
    {EXYNOS4_GPF1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4_GPF1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4_GPF1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
    {EXYNOS4_GPF1(7), S3C_GPIO_SLP_PREV,  S3C_GPIO_PULL_NONE}, /* NC */

    {EXYNOS4_GPF2(0), S3C_GPIO_SLP_PREV,  S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4_GPF2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF2(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* NC */
    {EXYNOS4_GPF2(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PCM_SEL */
    {EXYNOS4_GPF2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /*L_I2C_SCL*/

Example #12

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File: gpio-exynos4.c Project: Hackhao/tzos

		},
	}, {
		.base   = (S5P_VA_GPIO1 + 0x180),
		.eint_offset = 0x30,
		.group	= 7,
		.chip	= {
			.base	= EXYNOS4_GPF0(0),
			.ngpio	= EXYNOS4_GPIO_F0_NR,
			.label	= "GPF0",
		},
	}, {
		.base   = (S5P_VA_GPIO1 + 0x1A0),
		.eint_offset = 0x34,
		.group	= 8,
		.chip	= {
			.base	= EXYNOS4_GPF1(0),
			.ngpio	= EXYNOS4_GPIO_F1_NR,
			.label	= "GPF1",
		},
	}, {
		.base   = (S5P_VA_GPIO1 + 0x1C0),
		.eint_offset = 0x38,
		.group	= 9,
		.chip	= {
			.base	= EXYNOS4_GPF2(0),
			.ngpio	= EXYNOS4_GPIO_F2_NR,
			.label	= "GPF2",
		},
	}, {
		.base   = (S5P_VA_GPIO1 + 0x1E0),
		.eint_offset = 0x3C,

Example #13

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File: kona-01-gpio.c Project: DirtyDroidX/Kernel_Kona_att

	{EXYNOS4_GPD1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 3M_SDA_1.8V */
	{EXYNOS4_GPD1(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 3M_SCL_1.8V */
	{EXYNOS4_GPD1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPD1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},

	{EXYNOS4_GPF0(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_HSYNC */
	{EXYNOS4_GPF0(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_VSYNC */
	{EXYNOS4_GPF0(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_DE */
	{EXYNOS4_GPF0(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_PCLK */
	{EXYNOS4_GPF0(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_FREQ_SCL */
	{EXYNOS4_GPF0(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_FREQ_SDA */
	{EXYNOS4_GPF0(6),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4_GPF0(7),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */

	{EXYNOS4_GPF1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */

#if defined(CONFIG_QC_MODEM)
	{EXYNOS4_GPF1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MDM2AP_HSIC_READY */
#else
	{EXYNOS4_GPF1(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
#endif
	{EXYNOS4_GPF1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
#if defined(CONFIG_QC_MODEM)
	{EXYNOS4_GPF1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* TSP_VENDOR1 */
#else
	{EXYNOS4_GPF1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
#endif
	{EXYNOS4_GPF1(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4_GPF1(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
#if defined(CONFIG_QC_MODEM)

Example #14

0

Show file

File: baffin-gpio.c Project: HAXTC/android_kernel_samsung_n7000

	{EXYNOS4_GPD1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 8M_CAM_SDA_1.8V */
	{EXYNOS4_GPD1(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 8M_CAM_SCL_1.8V */
	{EXYNOS4_GPD1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* GSENSE_SDA_1.8V */
	{EXYNOS4_GPD1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* GSENSE_SCL_1.8V */

	{EXYNOS4_GPF0(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* RGB_SDA_1.8V_AP */
	{EXYNOS4_GPF0(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* RGB_SCL_1.8V_AP */
	{EXYNOS4_GPF0(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4_GPF0(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* GYRO_INT */
	{EXYNOS4_GPF0(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4_GPF0(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* LCD_BL_EN */
	{EXYNOS4_GPF0(6),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC	*/
	{EXYNOS4_GPF0(7),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* OTG_EN */

	{EXYNOS4_GPF1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* OLED_ID */
	{EXYNOS4_GPF1(1),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_DOWN}, /* ACTIVE_STATE_HSIC */
	{EXYNOS4_GPF1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* VT_CAM_ID */
	{EXYNOS4_GPF1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* ISP_RESET */
	{EXYNOS4_GPF1(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* FUEL_SCL_1.8V */
	{EXYNOS4_GPF1(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* FUEL_SDA_1.8V */
	{EXYNOS4_GPF1(6),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* PDA_ACTIVE */
	{EXYNOS4_GPF1(7),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* MICBIAS_EN */

	{EXYNOS4_GPF2(0),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* SUB_MICBIAS_EN */
	{EXYNOS4_GPF2(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MLCD_RST */
	{EXYNOS4_GPF2(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* AP_CMC_INT */
#if defined(CONFIG_MACH_BAFFIN_KOR_LGT)
	{EXYNOS4_GPF2(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* AUTO_DFS */
	{EXYNOS4_GPF2(4),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* CP_RST_1.8V */
#else

Example #15

0

Show file

File: q1-gpio.c Project: Forest1971/legacy_android_kernel_exynos4210

	{EXYNOS4210_GPE4(3), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4210_GPE4(4), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4210_GPE4(5), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4210_GPE4(6), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4210_GPE4(7), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},

	{EXYNOS4_GPF0(0), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF0(1), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF0(2), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF0(3), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF0(4), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF0(5), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF0(6), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF0(7), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},

	{EXYNOS4_GPF1(0), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF1(1), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF1(2), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF1(3), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF1(4), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF1(5), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF1(6), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF1(7), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},

	{EXYNOS4_GPF2(0), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF2(1), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF2(2), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF2(3), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF2(4), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF2(5), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF2(6), S3C_GPIO_SLP_INPUT,  S3C_GPIO_PULL_DOWN},

Example #16

0

Show file

File: zest-gpio.c Project: LuckJC/Adam-Kernel-GS3

    {EXYNOS4_GPD1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 5M_CAM_SDA_1.8V */
    {EXYNOS4_GPD1(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* 5M_CAM_SLC_1.8V */
    {EXYNOS4_GPD1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* GSENSE_SDA_1.8V */
    {EXYNOS4_GPD1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* GSENSE_SLC_1.8V */

    {EXYNOS4_GPF0(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* RGB_SDA_1.8V_AP */
    {EXYNOS4_GPF0(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* RGB_SLC_1.8V_AP */
    {EXYNOS4_GPF0(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},

    {EXYNOS4_GPF0(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* GYRO_INT */
    {EXYNOS4_GPF0(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MHL_SDA_1.8V */
    {EXYNOS4_GPF0(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF0(6),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MHL_SCL_1.8V */
    {EXYNOS4_GPF0(7),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */

    {EXYNOS4_GPF1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF1(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* ACTIVE_STATE_HSIC */
    {EXYNOS4_GPF1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF1(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* FUEL_SCL_1.8V */
    {EXYNOS4_GPF1(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* FUEL_SDA_1.8V */
    {EXYNOS4_GPF1(6),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* PDA_ACTIVE */
    {EXYNOS4_GPF1(7),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* MICBIAS_EN */

    {EXYNOS4_GPF2(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF2(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* MLCD_RST */
    {EXYNOS4_GPF2(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF2(3),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /* CP_PMIC_PWR_HOLD */
    {EXYNOS4_GPF2(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* TE */
    {EXYNOS4_GPF2(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
    {EXYNOS4_GPF2(6),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* S_LED_I2C_SCL */

Example #17

0

Show file

File: u1camera-gpio.c Project: 0x7678/SJKernel-gn2

	{EXYNOS4210_GPE4(3), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4210_GPE4(4), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4210_GPE4(5), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4210_GPE4(6), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4210_GPE4(7), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},

	{EXYNOS4_GPF0(0), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF0(1), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF0(2), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF0(3), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF0(4), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF0(5), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF0(6), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF0(7), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},

	{EXYNOS4_GPF1(0), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF1(1), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF1(2), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF1(3), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF1(4), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF1(5), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF1(6), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF1(7), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},

	{EXYNOS4_GPF2(0), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF2(1), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF2(2), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF2(3), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF2(4), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF2(5), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF2(6), S3C_GPIO_SLP_OUT0,  S3C_GPIO_PULL_NONE},

Example #18

0

Show file

File: gc2pd-gpio.c Project: CyanideL/android_kernel_samsung_smdk4x12

	{EXYNOS4_GPD1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPD1(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPD1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPD1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},

	{EXYNOS4_GPF0(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
	{EXYNOS4_GPF0(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
	{EXYNOS4_GPF0(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4_GPF0(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4_GPF0(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
	{EXYNOS4_GPF0(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4_GPF0(6),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */
	{EXYNOS4_GPF0(7),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */

	{EXYNOS4_GPF1(0),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
#if defined(CONFIG_MACH_GC1_USA_VZW) || defined(CONFIG_MACH_GC1_KOR_SKT) ||\
	defined(CONFIG_MACH_GC1_KOR_KT) || defined(CONFIG_MACH_GC1_KOR_LGT)
	/* MDM2AP_HSIC_READY */
	{EXYNOS4_GPF1(1),  S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
#elif defined(CONFIG_SEC_MODEM_SP7160LTE)
	{EXYNOS4_GPF1(1),  S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_DOWN}, /* ACTIVE_STATE */
#else
	{EXYNOS4_GPF1(1),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
#endif
	{EXYNOS4_GPF1(2),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
	{EXYNOS4_GPF1(3),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
	{EXYNOS4_GPF1(4),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
	{EXYNOS4_GPF1(5),  S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
#if defined(CONFIG_SEC_MODEM_M0) || defined(CONFIG_SEC_MODEM_SP7160LTE)
	/* GPF1(6) M0, C1, SP7160LTE, let cp know AP sleep status*/