static void mt_fh_hal_popod_save(void)
{
const unsigned int pll_id = FH_MAIN_PLLID;
FH_MSG_DEBUG("EN: %s",__func__);
//disable maipll SSC mode
if(g_fh_pll[pll_id].fh_status == FH_FH_ENABLE_SSC){
unsigned int fh_dds = 0;
unsigned int pll_dds = 0;
const unsigned int reg_cfg = g_reg_cfg[pll_id];
//only when SSC is enable, turn off MAINPLL hopping
fh_set_field(reg_cfg, FH_FRDDSX_EN, 0); //disable SSC mode
fh_set_field(reg_cfg, FH_SFSTRX_EN, 0); //disable dvfs mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 0); //disable hopping control
pll_dds = (DRV_Reg32(g_reg_dds[pll_id])) & MASK21b;
fh_dds = (DRV_Reg32(g_reg_mon[pll_id])) & MASK21b;
FH_MSG("Org pll_dds:%x fh_dds:%x",pll_dds,fh_dds);
wait_dds_stable(pll_dds, g_reg_mon[pll_id], 100);
//write back to ncpo
fh_write32(g_reg_pll_con1[pll_id],
(fh_read32(g_reg_dds[pll_id])&MASK21b)|(fh_read32(MAINPLL_CON1)&0xFFE00000)|(BIT32));
FH_MSG("MAINPLL_CON1: 0x%08x",(fh_read32(g_reg_pll_con1[pll_id])&MASK21b));
// switch to register control
fh_switch2fhctl(pll_id,0);
mb();
}
}
//armpll dfs mdoe
static int mt_fh_hal_dfs_armpll(unsigned int pll, unsigned int dds)
{
unsigned long flags = 0;
unsigned int reg_cfg = 0;
FH_MSG("%s for pll %d dds %d", __func__, pll, dds);
switch(pll){
case FH_ARMCA7_PLLID:
case FH_ARMCA15_PLLID:
reg_cfg = g_reg_cfg[pll];
FH_MSG("(PLL_CON1): 0x%x",(fh_read32(g_reg_pll_con1[pll])&MASK21b));
break;
default:
BUG_ON(1);
return 1;
};
//TODO: provelock issue spin_lock(&g_fh_lock);
spin_lock_irqsave(&g_fh_lock, flags);
fh_set_field(reg_cfg, FH_FRDDSX_EN, 0); //disable SSC mode
fh_set_field(reg_cfg, FH_SFSTRX_EN, 0); //disable dvfs mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 0); //disable hopping control
mt_fh_hal_dvfs(pll, dds);
fh_set_field(reg_cfg, FH_FRDDSX_EN, 0); //disable SSC mode
fh_set_field(reg_cfg, FH_SFSTRX_EN, 0); //disable dvfs mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 0); //disable hopping control
spin_unlock_irqrestore(&g_fh_lock, flags);
return 0;
}
static int fh_dramc_proc_write(struct file *file, const char *buffer, unsigned long count, void *data)
{
int len = 0;
int freq = 0;
char dramc[32];
len = (count < sizeof(dramc) - 1)?(count):(sizeof(dramc) - 1);
if (copy_from_user(dramc, buffer, len)){
FH_MSG("Error ret from %s %d", __func__, __LINE__);
return 1;
}
dramc[len] = '\0';
if (sscanf(dramc, "%d", &freq) == 1){
FH_MSG("%s %d", __func__, freq);
if (1333 == freq){
__fh_mpll_l2h();
}else if (1226 == freq){
__fh_mpll_h2l();
}
return count;
}
else{
FH_MSG("%s don't understand %s", __func__, dramc);
return -EINVAL;
}
}
//static int freqhopping_userdefine_proc_read(char *page, char **start, off_t off, int count, int *eof, void *data)
static int freqhopping_userdefine_proc_read(struct seq_file* m, void* v)
{
int i=0;
FH_MSG("EN: %s",__func__);
seq_printf(m, "user defined settings:\n");
seq_printf(m, "===============================================\r\n" );
seq_printf(m, " freq == delta t == delta f == up bond == low bond == dds ==\r\n" );
for(i = 0;i < g_drv_pll_count ; ++i) {
seq_printf(m, "%10d 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\r\n"
,g_fh_drv_usr_def[i].freq
,g_fh_drv_usr_def[i].dt
,g_fh_drv_usr_def[i].df
,g_fh_drv_usr_def[i].upbnd
,g_fh_drv_usr_def[i].lowbnd
,g_fh_drv_usr_def[i].dds);
}
return 0;
#if 0
char *p = page;
int len = 0;
int i=0;
FH_MSG("EN: %s",__func__);
p += sprintf(p, "user defined settings:\n");
p += sprintf(p, "===============================================\r\n" );
p += sprintf(p, " freq == delta t == delta f == up bond == low bond == dds ==\r\n" );
for(i=0;i<g_drv_pll_count ;i++) {
p += sprintf(p, "%10d 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\r\n"
,g_fh_drv_usr_def[i].freq
,g_fh_drv_usr_def[i].dt
,g_fh_drv_usr_def[i].df
,g_fh_drv_usr_def[i].upbnd
,g_fh_drv_usr_def[i].lowbnd
,g_fh_drv_usr_def[i].dds);
}
*start = page + off;
len = p - page;
if (len > off)
len -= off;
else
len = 0;
return len < count ? len : count;
#endif
}
//static int freqhopping_debug_proc_read(char *page, char **start, off_t off, int count, int *eof, void *data)
static int freqhopping_debug_proc_read(struct seq_file* m, void* v)
{
#if defined(PLATFORM_DEP_DEBUG_PROC_READ)
FH_IO_PROC_READ_T arg;
arg.m = m;
arg.v = v;
arg.pll = g_fh_drv_pll;
g_p_fh_hal_drv->ioctl(FH_IO_PROC_READ, &arg);
return 0;
#else
FH_MSG("EN: %s",__func__);
seq_printf(m, "\r\n[freqhopping debug flag]\r\n");
seq_printf(m, "===============================================\r\n" );
seq_printf(m, "id==ARMPLL==MAINPLL==MEMPLL==MSDCPLL==MMPLL==VENCPLL\r\n" );
seq_printf(m, " == %04d====%04d====%04d====%04d====%04d====%04d=\r\n" ,
g_fh_drv_pll[MT658X_FH_ARM_PLL].fh_status, g_fh_drv_pll[MT658X_FH_MAIN_PLL].fh_status,
g_fh_drv_pll[MT658X_FH_MEM_PLL].fh_status, g_fh_drv_pll[MT658X_FH_MSDC_PLL].fh_status,
g_fh_drv_pll[MT658X_FH_MM_PLL].fh_status, g_fh_drv_pll[MT658X_FH_VENC_PLL].fh_status);
seq_printf(m, " == %04d====%04d====%04d====%04d====%04d====%04d=\r\n" ,
g_fh_drv_pll[MT658X_FH_ARM_PLL].setting_id, g_fh_drv_pll[MT658X_FH_MAIN_PLL].setting_id,
g_fh_drv_pll[MT658X_FH_MEM_PLL].setting_id, g_fh_drv_pll[MT658X_FH_MSDC_PLL].setting_id,
g_fh_drv_pll[MT658X_FH_MM_PLL].setting_id, g_fh_drv_pll[MT658X_FH_VENC_PLL].setting_id);
return 0;
#if 0
char *p = page;
int len = 0;
FH_MSG("EN: %s",__func__);
p += sprintf(p, "\r\n[freqhopping debug flag]\r\n");
p += sprintf(p, "===============================================\r\n" );
p += sprintf(p, "id==ARMPLL==MAINPLL==MEMPLL==MSDCPLL==MMPLL==VENCPLL\r\n" );
p += sprintf(p, " == %04d====%04d====%04d====%04d====%04d====%04d=\r\n" ,
g_fh_drv_pll[MT658X_FH_ARM_PLL].fh_status, g_fh_drv_pll[MT658X_FH_MAIN_PLL].fh_status,
g_fh_drv_pll[MT658X_FH_MEM_PLL].fh_status, g_fh_drv_pll[MT658X_FH_MSDC_PLL].fh_status,
g_fh_drv_pll[MT658X_FH_MM_PLL].fh_status, g_fh_drv_pll[MT658X_FH_VENC_PLL].fh_status);
p += sprintf(p, " == %04d====%04d====%04d====%04d====%04d====%04d=\r\n" ,
g_fh_drv_pll[MT658X_FH_ARM_PLL].setting_id, g_fh_drv_pll[MT658X_FH_MAIN_PLL].setting_id,
g_fh_drv_pll[MT658X_FH_MEM_PLL].setting_id, g_fh_drv_pll[MT658X_FH_MSDC_PLL].setting_id,
g_fh_drv_pll[MT658X_FH_MM_PLL].setting_id, g_fh_drv_pll[MT658X_FH_VENC_PLL].setting_id);
*start = page + off;
len = p - page;
if (len > off)
len -= off;
else
len = 0;
return len < count ? len : count;
#endif
#endif
}
static int mt_fh_drv_probe(struct platform_device *dev)
{
int err = 0;
FH_MSG("EN: mt_fh_probe()");
if ((err = misc_register(&mt_fh_device)))
FH_MSG("register fh driver error!");
return err;
}
void mt_fh_popod_save(void)
{
if(!g_p_fh_hal_drv)
{
FH_MSG("[%s]: g_p_fh_hal_drv is uninitialized.", __func__);
return;
}
FH_MSG("EN: %s",__func__);
g_p_fh_hal_drv->mt_fh_popod_save();
}
static ssize_t freqhopping_userdefine_proc_write(struct file *file, const char *buffer, size_t count, loff_t *data)
{
int ret;
char kbuf[256];
size_t len = 0;
unsigned int p1,p2,p3,p4,p5,p6,p7;
struct freqhopping_ioctl fh_ctl;
p1 = p2 = p3 = p4 = p5 = p6 = p7 = 0;
FH_MSG("EN: %s",__func__);
len = min(count, (sizeof(kbuf)-1));
if (count == 0)return -1;
if(count > 255)count = 255;
ret = copy_from_user(kbuf, buffer, count);
if (ret < 0)return -1;
kbuf[count] = '\0';
sscanf(kbuf, "%x %x %x %x %x %x %x", &p1, &p2, &p3, &p4, &p5, &p6, &p7);
fh_ctl.pll_id = p2;
fh_ctl.ssc_setting.df = p3;
fh_ctl.ssc_setting.dt = p4;
fh_ctl.ssc_setting.upbnd = p5;
fh_ctl.ssc_setting.lowbnd = p6;
fh_ctl.ssc_setting.dds = p7;
fh_ctl.ssc_setting.freq = 0;
if( p1 == FH_CMD_ENABLE){
ret = mt_fh_enable_usrdef(&fh_ctl);
if(ret){
FH_MSG("__EnableUsrSetting() fail!");
}
}
else{
ret = mt_fh_disable_usrdef(&fh_ctl);
if(ret){
FH_MSG("__DisableUsrSetting() fail!");
}
}
FH_MSG("Exit: %s",__func__);
return count;
}
static ssize_t freqhopping_debug_proc_write(struct file *file, const char *buffer, size_t count, loff_t *data)
{
int ret;
char kbuf[256];
size_t len = 0;
unsigned int cmd,p1,p2,p3,p4,p5,p6,p7;
struct freqhopping_ioctl fh_ctl;
p1 = p2 = p3 = p4 = p5 = p6 = p7 = 0;
FH_MSG("EN: %s",__func__);
len = min(count, (sizeof(kbuf)-1));
if (count == 0)return -1;
if(count > 255)count = 255;
ret = copy_from_user(kbuf, buffer, count);
if (ret < 0)return -1;
kbuf[count] = '\0';
sscanf(kbuf, "%x %x %x %x %x %x %x %x", &cmd, &p1, &p2, &p3, &p4, &p5, &p6, &p7);
//ccyeh fh_ctl.opcode = p1;
fh_ctl.pll_id = p2;
//ccyeh removed fh_ctl.ssc_setting_id = p3;
fh_ctl.ssc_setting.dds = p3;
fh_ctl.ssc_setting.df = p4;
fh_ctl.ssc_setting.dt = p5;
fh_ctl.ssc_setting.upbnd = p6;
fh_ctl.ssc_setting.lowbnd = p7;
fh_ctl.ssc_setting.freq = 0;
if (cmd < FH_CMD_INTERNAL_MAX_CMD) {
mt_freqhopping_ioctl(NULL,cmd,(unsigned long)(&fh_ctl));
}
else if((cmd > FH_DCTL_CMD_ID) && (cmd < FH_DCTL_CMD_MAX))
{
mt_freqhopping_devctl(cmd, &fh_ctl);
}
else {
FH_MSG("CMD error!");
}
return count;
}
static int mt_freqhopping_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
//Get the structure of ioctl
int ret = 0;
struct freqhopping_ioctl *freqhopping_ctl = (struct freqhopping_ioctl *)arg;
FH_MSG("EN:CMD:%d pll id:%d",cmd,freqhopping_ctl->pll_id);
if(FH_CMD_ENABLE == cmd) {
ret = mt_fh_hal_ctrl_lock(freqhopping_ctl,true);
}else if(FH_CMD_DISABLE == cmd) {
ret = mt_fh_hal_ctrl_lock(freqhopping_ctl,false);
}
else if(FH_CMD_ENABLE_USR_DEFINED == cmd) {
ret = mt_fh_enable_usrdef(freqhopping_ctl);
}
else if(FH_CMD_DISABLE_USR_DEFINED == cmd) {
ret = mt_fh_disable_usrdef(freqhopping_ctl);
}else {
//Invalid command is not acceptable!!
WARN_ON(1);
}
//FH_MSG("Exit");
return ret;
}
static int mt_fh_drv_suspend(struct platform_device *dev, pm_message_t state)
{
// struct freqhopping_ioctl fh_ctl;
FH_MSG("-supd-");
return 0;
}
int freqhopping_config(unsigned int pll_id, unsigned long vco_freq, unsigned int enable)
{
struct freqhopping_ioctl fh_ctl;
unsigned int fh_status;
unsigned long flags=0;
unsigned int skip_flag=0;
//FH_MSG("conf() id: %d f: %d, e: %d",(int)pll_id, (int)vco_freq, (int)enable);
if( (g_p_fh_hal_drv->mt_fh_get_init()) == 0){
FH_MSG("Not init yet, init first.");
return 1;
}
g_p_fh_hal_drv->mt_fh_lock(&flags);
//backup
fh_status = g_fh_drv_pll[pll_id].fh_status;
g_fh_drv_pll[pll_id].curr_freq = vco_freq;
g_fh_drv_pll[pll_id].pll_status = (enable > 0) ? FH_PLL_ENABLE:FH_PLL_DISABLE;
//prepare freqhopping_ioctl
fh_ctl.pll_id = pll_id;
if(g_fh_drv_pll[pll_id].fh_status != FH_FH_DISABLE){
//FH_MSG("+fh");
g_p_fh_hal_drv->mt_fh_hal_ctrl(&fh_ctl,enable);
}
else{
skip_flag = 1;
//FH_MSG("-fh,skip");
}
//restore
g_fh_drv_pll[pll_id].fh_status = fh_status;
g_p_fh_hal_drv->mt_fh_unlock(&flags);
if(skip_flag)
FH_MSG("-fh,skip");
return 0;
}
static int mt_fh_drv_resume(struct platform_device *dev)
{
// struct freqhopping_ioctl fh_ctl;
FH_MSG("+resm+");
return 0;
}
int mt_l2h_dvfs_mempll(void)
{
if(!g_p_fh_hal_drv)
{
FH_MSG("[%s]: g_p_fh_hal_drv is uninitialized.", __func__);
return 1;
}
return(g_p_fh_hal_drv->mt_l2h_dvfs_mempll());
}
int mt_dfs_mmpll(unsigned int target_dds)
{
if(!g_p_fh_hal_drv)
{
FH_MSG("[%s]: g_p_fh_hal_drv is uninitialized.", __func__);
return 1;
}
return(g_p_fh_hal_drv->mt_dfs_mmpll(target_dds));
}
static int mt_fh_drv_remove(struct platform_device *dev)
{
int err = 0;
if ((err = misc_deregister(&mt_fh_device)))
FH_MSG("deregister fh driver error!");
return err;
}
static int mt_fh_disable_usrdef(struct freqhopping_ioctl* fh_ctl)
{
unsigned long flags = 0;
const unsigned int pll_id = fh_ctl->pll_id;
FH_MSG("EN: %s",__func__);
FH_MSG("id: %d",fh_ctl->pll_id);
if (fh_ctl->pll_id < FH_PLL_COUNT){
g_p_fh_hal_drv->mt_fh_lock(&flags);
memset(&g_fh_drv_usr_def[pll_id], 0,sizeof(g_fh_drv_usr_def[pll_id]));
g_fh_drv_pll[pll_id].user_defined = false;
g_p_fh_hal_drv->mt_fh_unlock(&flags);
}
//FH_MSG("Exit");
return 0;
}
//#define UINT_MAX (unsigned int)(-1)
static int fh_dumpregs_proc_read(struct seq_file* m, void* v)
{
int i = 0;
static unsigned int dds_max[FH_PLL_NUM] = {0};
static unsigned int dds_min[FH_PLL_NUM] = {
UINT_MAX, UINT_MAX, UINT_MAX, UINT_MAX, UINT_MAX,
UINT_MAX, UINT_MAX, UINT_MAX, UINT_MAX};
FH_MSG("EN: %s",__func__);
for(i = 0;i < FH_PLL_NUM; ++i) {
const unsigned int mon = DRV_Reg32(g_reg_mon[i]);
const unsigned int dds = mon & MASK21b;
seq_printf(m, "FHCTL%d CFG, UPDNLMT, DDS, MON\r\n",i);
seq_printf(m, "0x%08x 0x%08x 0x%08x 0x%08x\r\n",
DRV_Reg32(g_reg_cfg[i]), DRV_Reg32(g_reg_updnlmt[i]),
DRV_Reg32(g_reg_dds[i]), mon);
if (dds > dds_max[i])
dds_max[i] = dds;
if (dds < dds_min[i])
dds_min[i] = dds;
}
seq_printf(m, "\r\nFHCTL_HP_EN:\r\n0x%08x\r\n", DRV_Reg32(REG_FHCTL_HP_EN));
seq_printf(m, "\r\nPLL_CON0 :\r\n");
seq_printf(m, "ARMCA7:0x%08x ARMCA15:0x%08x MAIN:0x%08x M:0x%08x ",
DRV_Reg32(ARMCA7PLL_CON0), DRV_Reg32(ARMCA15PLL_CON0),
DRV_Reg32(MAINPLL_CON0), DRV_Reg32(MPLL_CON0));
seq_printf(m, "MSDC:0x%08x MM:0x%08x VENC:0x%08x TVD:0x%08x VCODEC:0x%08x\r\n",
DRV_Reg32(MSDCPLL_CON0), DRV_Reg32(MMPLL_CON0),
DRV_Reg32(VENCPLL_CON0), DRV_Reg32(TVDPLL_CON0),
DRV_Reg32(VCODECPLL_CON0));
seq_printf(m, "\r\nPLL_CON1 :\r\n");
seq_printf(m, "ARMCA7:0x%08x ARMCA15:0x%08x MAIN:0x%08x M:0x%08x ",
DRV_Reg32(ARMCA7PLL_CON1), DRV_Reg32(ARMCA15PLL_CON1),
DRV_Reg32(MAINPLL_CON1), DRV_Reg32(MPLL_CON1));
seq_printf(m, "MSDC:0x%08x MM:0x%08x VENC:0x%08x TVD:0x%08x VCODEC:0x%08x\r\n",
DRV_Reg32(MSDCPLL_CON1), DRV_Reg32(MMPLL_CON1),
DRV_Reg32(VENCPLL_CON1), DRV_Reg32(TVDPLL_CON1),
DRV_Reg32(VCODECPLL_CON1));
seq_printf(m, "\r\nRecorded dds range\r\n");
for(i = 0;i < FH_PLL_NUM; ++i) {
seq_printf(m, "Pll%d dds max 0x%06x, min 0x%06x\r\n",
i, dds_max[i], dds_min[i]);
}
return 0;
}
static int mt_fh_hal_dfs_mpll(unsigned int target_dds)
{
unsigned long flags = 0;
const unsigned int pll_id = FH_M_PLLID;
const unsigned int reg_cfg = g_reg_cfg[pll_id];
FH_MSG("%s, current dds(MPLL_CON1): 0x%x, target dds %d",
__func__,(fh_read32(g_reg_pll_con1[pll_id])&MASK21b),
target_dds);
spin_lock_irqsave(&g_fh_lock, flags);
if(g_fh_pll[pll_id].fh_status == FH_FH_ENABLE_SSC){
unsigned int pll_dds = 0;
unsigned int fh_dds = 0;
fh_set_field(reg_cfg, FH_FRDDSX_EN, 0); //disable SSC mode
fh_set_field(reg_cfg, FH_SFSTRX_EN, 0); //disable dvfs mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 0); //disable hopping control
pll_dds = (DRV_Reg32(g_reg_dds[pll_id])) & MASK21b;
fh_dds = (DRV_Reg32(g_reg_mon[pll_id])) & MASK21b;
FH_MSG(">p:f< %x:%x",pll_dds,fh_dds);
wait_dds_stable(pll_dds, g_reg_mon[pll_id], 100);
}
mt_fh_hal_dvfs(pll_id, target_dds);
if(g_fh_pll[pll_id].fh_status == FH_FH_ENABLE_SSC){
const struct freqhopping_ssc* p_setting = &ssc_mpll_setting[2];
fh_set_field(reg_cfg, FH_FRDDSX_EN, 0); //disable SSC mode
fh_set_field(reg_cfg, FH_SFSTRX_EN, 0); //disable dvfs mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 0); //disable hopping control
fh_sync_ncpo_to_fhctl_dds(pll_id);
FH_MSG("Enable mpll SSC mode");
FH_MSG("DDS: 0x%08x", (fh_read32(g_reg_dds[pll_id])&MASK21b));
fh_set_field(reg_cfg,MASK_FRDDSX_DYS,p_setting->df);
fh_set_field(reg_cfg,MASK_FRDDSX_DTS,p_setting->dt);
fh_write32(g_reg_updnlmt[pll_id],
(PERCENT_TO_DDSLMT((fh_read32(g_reg_dds[pll_id])&MASK21b), p_setting->lowbnd) << 16));
FH_MSG("UPDNLMT: 0x%08x", fh_read32(g_reg_updnlmt[pll_id]));
fh_switch2fhctl(pll_id, 1);
fh_set_field(reg_cfg, FH_FRDDSX_EN, 1); //enable SSC mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 1); //enable hopping control
FH_MSG("CFG: 0x%08x", fh_read32(reg_cfg));
}
spin_unlock_irqrestore(&g_fh_lock, flags);
return 0;
}
static int mt_fh_hal_ctrl_lock(struct freqhopping_ioctl* fh_ctl,bool enable)
{
int retVal=1;
unsigned long flags = 0;
FH_MSG("EN: _fctr_lck %d:%d",fh_ctl->pll_id,enable);
g_p_fh_hal_drv->mt_fh_lock(&flags);
retVal = g_p_fh_hal_drv->mt_fh_hal_ctrl(fh_ctl, enable);
g_p_fh_hal_drv->mt_fh_unlock(&flags);
return retVal;
}
static int fh_dvfs_proc_read(struct seq_file* m, void* v)
{
int i = 0;
FH_MSG("EN: %s",__func__);
seq_printf(m, "DVFS:\r\n");
seq_printf(m, "CFG: 0x3 is SSC mode; 0x5 is DVFS mode \r\n");
for(i = 0;i < FH_PLL_NUM; ++i){
seq_printf(m, "FHCTL%d: CFG:0x%08x DVFS:0x%08x\r\n",
i, DRV_Reg32(g_reg_cfg[i]), DRV_Reg32(g_reg_dvfs[i]));
}
return 0;
}
static void __ioctl(unsigned int ctlid, void* arg)
{
switch(ctlid){
case FH_IO_PROC_READ:
{
FH_IO_PROC_READ_T* tmp = (FH_IO_PROC_READ_T*)(arg);
__fh_debug_proc_read(tmp->m, tmp->v, tmp->pll);
}
break;
default:
FH_MSG("Unrecognized ctlid %d", ctlid);
break;
};
}
static int mt_fh_enable_usrdef(struct freqhopping_ioctl* fh_ctl)
{
unsigned long flags = 0;
const unsigned int pll_id = fh_ctl->pll_id;
FH_MSG("EN: %s",__func__);
FH_MSG("pll_id: %d",fh_ctl->pll_id);
if (fh_ctl->pll_id < FH_PLL_COUNT){
//we don't care the PLL status , we just change the flag & update the table
//the setting will be applied during the following FH enable
g_p_fh_hal_drv->mt_fh_lock(&flags);
memcpy(&g_fh_drv_usr_def[pll_id],&(fh_ctl->ssc_setting),sizeof(g_fh_drv_usr_def[pll_id]));
g_fh_drv_pll[pll_id].user_defined = true;
g_p_fh_hal_drv->mt_fh_unlock(&flags);
}
//FH_MSG("Exit");
return 0;
}
static void mt_fh_hal_popod_restore(void)
{
const unsigned int pll_id = FH_MAIN_PLLID;
FH_MSG_DEBUG("EN: %s",__func__);
//enable maipll SSC mode
if(g_fh_pll[pll_id].fh_status == FH_FH_ENABLE_SSC){
const struct freqhopping_ssc* p_setting = &ssc_mainpll_setting[2];
const unsigned int reg_cfg = g_reg_cfg[pll_id];
fh_set_field(reg_cfg, FH_FRDDSX_EN, 0); //disable SSC mode
fh_set_field(reg_cfg, FH_SFSTRX_EN, 0); //disable dvfs mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 0); //disable hopping control
fh_sync_ncpo_to_fhctl_dds(pll_id);
FH_MSG("Enable mainpll SSC mode");
FH_MSG("sync ncpo to DDS of FHCTL");
FH_MSG("FHCTL1_DDS: 0x%08x", (fh_read32(g_reg_dds[pll_id])&MASK21b));
fh_set_field(reg_cfg, MASK_FRDDSX_DYS, p_setting->df);
fh_set_field(reg_cfg, MASK_FRDDSX_DTS, p_setting->dt);
fh_write32(g_reg_updnlmt[pll_id],
(PERCENT_TO_DDSLMT((fh_read32(g_reg_dds[pll_id])&MASK21b), p_setting->lowbnd) << 16));
FH_MSG("REG_FHCTL2_UPDNLMT: 0x%08x", fh_read32(g_reg_updnlmt[pll_id]));
fh_switch2fhctl(pll_id,1);
fh_set_field(reg_cfg, FH_FRDDSX_EN, 1); //enable SSC mode
fh_set_field(reg_cfg, FH_FHCTLX_EN, 1); //enable hopping control
FH_MSG("REG_FHCTL2_CFG: 0x%08x", fh_read32(reg_cfg));
}
}
static int __fh_debug_proc_read(struct seq_file* m, void* v, fh_pll_t * pll)
{
FH_MSG("EN: %s",__func__);
seq_printf(m, "\r\n[freqhopping debug flag]\r\n");
seq_printf(m, "===============================================\r\n" );
seq_printf(m, "id=ARMCA7PLL=ARMCA15PLL=MAINPLL=MPLL=MSDCPLL=MMPLL=VENCPLL=TVDPLL=VCODECPLL\r\n" );
seq_printf(m, " =%9d==%10d==%4d==%3d==%4d==%2d==%4d==%3d==%5d=\r\n" ,
pll[FH_ARMCA7_PLLID].fh_status, pll[FH_ARMCA15_PLLID].fh_status,
pll[FH_MAIN_PLLID].fh_status, pll[FH_M_PLLID].fh_status,
pll[FH_MSDC_PLLID].fh_status, pll[FH_MM_PLLID].fh_status,
pll[FH_VENC_PLLID].fh_status, pll[FH_TVD_PLLID].fh_status,
pll[FH_VCODEC_PLLID].fh_status);
seq_printf(m, " =%9d==%10d==%4d==%3d==%4d==%2d==%4d==%3d==%5d=\r\n" ,
pll[FH_ARMCA7_PLLID].setting_id,pll[FH_ARMCA15_PLLID].setting_id,
pll[FH_MAIN_PLLID].setting_id, pll[FH_M_PLLID].setting_id,
pll[FH_MSDC_PLLID].setting_id, pll[FH_MM_PLLID].setting_id,
pll[FH_VENC_PLLID].setting_id, pll[FH_TVD_PLLID].setting_id,
pll[FH_VCODEC_PLLID].setting_id);
return 0;
}
static ssize_t freqhopping_status_proc_write(struct file *file, const char *buffer, size_t count, loff_t *data)
{
int ret;
char kbuf[256];
size_t len = 0;
unsigned int p1,p2,p3,p4,p5,p6;
struct freqhopping_ioctl fh_ctl;
p1 = p2 = p3 = p4 = p5 = p6 = 0;
FH_MSG("EN: %s",__func__);
len = min(count, (sizeof(kbuf)-1));
if (count == 0)return -1;
if(count > 255)count = 255;
ret = copy_from_user(kbuf, buffer, count);
if (ret < 0)return -1;
kbuf[count] = '\0';
sscanf(kbuf, "%x %x", &p1, &p2);
fh_ctl.pll_id = p2;
fh_ctl.ssc_setting.df= 0;
fh_ctl.ssc_setting.dt= 0;
fh_ctl.ssc_setting.upbnd= 0;
fh_ctl.ssc_setting.lowbnd= 0;
if( p1 == 0){
mt_freqhopping_ioctl(NULL,FH_CMD_DISABLE,(unsigned long)(&fh_ctl));
}
else{
mt_freqhopping_ioctl(NULL,FH_CMD_ENABLE,(unsigned long)(&fh_ctl));
}
return count;
}
static void wait_dds_stable(
unsigned int target_dds,
unsigned int reg_mon,
unsigned int wait_count)
{
unsigned int fh_dds = 0;
unsigned int i = 0;
fh_dds = DRV_Reg32(reg_mon) & MASK21b;
while((target_dds != fh_dds) && (i < wait_count)){
udelay(10);
#if 0
if(unlikely(i > 100)){
BUG_ON(1);
break;
}
#endif
fh_dds = (DRV_Reg32(reg_mon)) & MASK21b;
++i;
}
FH_MSG("target_dds = %d, fh_dds = %d, i = %d", target_dds, fh_dds, i);
}
static void mt_fh_drv_shutdown(struct platform_device *dev)
{
FH_MSG("mt_fh_shutdown");
}
void mt_fh_popod_restore(void)
{
FH_MSG("EN: %s",__func__);
g_p_fh_hal_drv->mt_fh_popod_restore();
}
static int freqhopping_debug_proc_init(void)
{
struct proc_dir_entry *prDebugEntry;
struct proc_dir_entry *prDramcEntry;
struct proc_dir_entry *prDumpregEntry;
struct proc_dir_entry *prStatusEntry;
struct proc_dir_entry *prUserdefEntry;
struct proc_dir_entry *fh_proc_dir = NULL;
//TODO: check the permission!!
FH_MSG("EN: %s",__func__);
fh_proc_dir = proc_mkdir("freqhopping", NULL);
if (!fh_proc_dir){
FH_MSG("proc_mkdir fail!");
return 1;
}
else{
/* /proc/freqhopping/freqhopping_debug */
//prDebugEntry = create_proc_entry("freqhopping_debug", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir);
prDebugEntry = proc_create("freqhopping_debug", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir, &freqhopping_debug_fops);
if(prDebugEntry)
{
//prDebugEntry->read_proc = freqhopping_debug_proc_read;
//prDebugEntry->write_proc = freqhopping_debug_proc_write;
FH_MSG("[%s]: successfully create /proc/freqhopping_debug", __func__);
}else{
FH_MSG("[%s]: failed to create /proc/freqhopping/freqhopping_debug", __func__);
return 1;
}
/* /proc/freqhopping/dramc */
//prDramcEntry = create_proc_entry("dramc", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir);
prDramcEntry = proc_create("dramc", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir, &dramc_fops);
if(prDramcEntry)
{
//prDramcEntry->read_proc = g_p_fh_hal_drv->proc.dramc_read;
//prDramcEntry->write_proc = g_p_fh_hal_drv->proc.dramc_write;
FH_MSG("[%s]: successfully create /proc/freqhopping/prDramcEntry", __func__);
}else{
FH_MSG("[%s]: failed to create /proc/freqhopping/prDramcEntry", __func__);
return 1;
}
/* /proc/freqhopping/dvfs */
//prDramcEntry = create_proc_entry("dvfs", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir);
prDramcEntry = proc_create("dvfs", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir, &dvfs_fops);
if(prDramcEntry)
{
//prDramcEntry->read_proc = g_p_fh_hal_drv->proc.dvfs_read;
//prDramcEntry->write_proc = g_p_fh_hal_drv->proc.dvfs_write;
FH_MSG("[%s]: successfully create /proc/freqhopping/dvfs", __func__);
}else{
FH_MSG("[%s]: failed to create /proc/freqhopping/dvfs", __func__);
return 1;
}
/* /proc/freqhopping/dumpregs */
//prDumpregEntry = create_proc_entry("dumpregs", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir);
prDumpregEntry = proc_create("dumpregs", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir, &dumpregs_fops);
if(prDumpregEntry)
{
//prDumpregEntry->read_proc = g_p_fh_hal_drv->proc.dumpregs_read;
//prDumpregEntry->write_proc = NULL;
FH_MSG("[%s]: successfully create /proc/freqhopping/dumpregs", __func__);
}else{
FH_MSG("[%s]: failed to create /proc/freqhopping/dumpregs", __func__);
return 1;
}
/* /proc/freqhopping/status */
//prStatusEntry = create_proc_entry("status", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir);
prStatusEntry = proc_create("status", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir, &status_fops);
if(prStatusEntry)
{
//prStatusEntry->read_proc = freqhopping_status_proc_read;
//prStatusEntry->write_proc = freqhopping_status_proc_write;
FH_MSG("[%s]: successfully create /proc/freqhopping/status", __func__);
}else{
FH_MSG("[%s]: failed to create /proc/freqhopping/status", __func__);
return 1;
}
/* /proc/freqhopping/userdefine */
//prUserdefEntry = create_proc_entry("userdef", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir);
prUserdefEntry = proc_create("userdef", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir, &userdef_fops);
if(prUserdefEntry)
{
//prUserdefEntry->read_proc = freqhopping_userdefine_proc_read;
//prUserdefEntry->write_proc = freqhopping_userdefine_proc_write;
FH_MSG("[%s]: successfully create /proc/freqhopping/userdef", __func__);
}else{
FH_MSG("[%s]: failed to create /proc/freqhopping/userdef", __func__);
return 1;
}
#if 0// MT_FH_CLK_GEN
/* /proc/freqhopping/clkgen */
prUserdefEntry = create_proc_entry("clkgen", S_IRUGO | S_IWUSR | S_IWGRP, fh_proc_dir);
if(prUserdefEntry)
{
prUserdefEntry->read_proc = g_p_fh_hal_drv->proc.clk_gen_read;
prUserdefEntry->write_proc = g_p_fh_hal_drv->proc.clk_gen_write;
FH_MSG("[%s]: successfully create /proc/freqhopping/clkgen", __func__);
}else{
FH_MSG("[%s]: failed to create /proc/freqhopping/clkgen", __func__);
return 1;
}
#endif //MT_FH_CLK_GEN
}
return 0 ;
}
