},{
/* ISP supports only GRBG order in 4212 */
.name = "RAW10(GRBG)",
.code = V4L2_MBUS_FMT_SGRBG10_1X10,
.fmt_reg = FLITE_REG_CIGCTRL_RAW10,
.is_yuv = 0,
},{
/* ISP supports only GRBG order in 4212 */
.name = "RAW12(GRBG)",
.code = V4L2_MBUS_FMT_SGRBG12_1X12,
.fmt_reg = FLITE_REG_CIGCTRL_RAW12,
.is_yuv = 0,
},{
.name = "User Defined(JPEG)",
.code = V4L2_MBUS_FMT_JPEG_1X8,
.fmt_reg = FLITE_REG_CIGCTRL_USER(1),
.is_yuv = 0,
},
};
static struct flite_dev *to_flite_dev(struct v4l2_subdev *sdev)
{
return container_of(sdev, struct flite_dev, sd);
}
inline struct flite_fmt const *find_flite_format(struct
v4l2_mbus_framefmt *mf)
{
int num_fmt = ARRAY_SIZE(flite_formats);
while (num_fmt--)
writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
}
static const u32 src_pixfmt_map[8][3] = {
{ V4L2_MBUS_FMT_YUYV8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_YCBYCR,
FLITE_REG_CIGCTRL_YUV422_1P },
{ V4L2_MBUS_FMT_YVYU8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_YCRYCB,
FLITE_REG_CIGCTRL_YUV422_1P },
{ V4L2_MBUS_FMT_UYVY8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_CBYCRY,
FLITE_REG_CIGCTRL_YUV422_1P },
{ V4L2_MBUS_FMT_VYUY8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_CRYCBY,
FLITE_REG_CIGCTRL_YUV422_1P },
{ V4L2_PIX_FMT_SGRBG8, 0, FLITE_REG_CIGCTRL_RAW8 },
{ V4L2_PIX_FMT_SGRBG10, 0, FLITE_REG_CIGCTRL_RAW10 },
{ V4L2_PIX_FMT_SGRBG12, 0, FLITE_REG_CIGCTRL_RAW12 },
{ V4L2_MBUS_FMT_JPEG_1X8, 0, FLITE_REG_CIGCTRL_USER(1) },
};
/* Set camera input pixel format and resolution */
void flite_hw_set_source_format(struct fimc_lite *dev, struct flite_frame *f)
{
enum v4l2_mbus_pixelcode pixelcode = dev->fmt->mbus_code;
unsigned int i = ARRAY_SIZE(src_pixfmt_map);
u32 cfg;
while (i-- >= 0) {
if (src_pixfmt_map[i][0] == pixelcode)
break;
}
if (i == 0 && src_pixfmt_map[i][0] != pixelcode) {
writel(cfg, dev->regs + FLITE_REG_CIGCTRL);
}
static const u32 src_pixfmt_map[8][3] = {
{ MEDIA_BUS_FMT_YUYV8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_YCBYCR,
FLITE_REG_CIGCTRL_YUV422_1P },
{ MEDIA_BUS_FMT_YVYU8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_YCRYCB,
FLITE_REG_CIGCTRL_YUV422_1P },
{ MEDIA_BUS_FMT_UYVY8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_CBYCRY,
FLITE_REG_CIGCTRL_YUV422_1P },
{ MEDIA_BUS_FMT_VYUY8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_CRYCBY,
FLITE_REG_CIGCTRL_YUV422_1P },
{ MEDIA_BUS_FMT_SGRBG8_1X8, 0, FLITE_REG_CIGCTRL_RAW8 },
{ MEDIA_BUS_FMT_SGRBG10_1X10, 0, FLITE_REG_CIGCTRL_RAW10 },
{ MEDIA_BUS_FMT_SGRBG12_1X12, 0, FLITE_REG_CIGCTRL_RAW12 },
{ MEDIA_BUS_FMT_JPEG_1X8, 0, FLITE_REG_CIGCTRL_USER(1) },
};
/* Set camera input pixel format and resolution */
void flite_hw_set_source_format(struct fimc_lite *dev, struct flite_frame *f)
{
u32 pixelcode = f->fmt->mbus_code;
int i = ARRAY_SIZE(src_pixfmt_map);
u32 cfg;
while (--i) {
if (src_pixfmt_map[i][0] == pixelcode)
break;
}
if (i == 0 && src_pixfmt_map[i][0] != pixelcode) {