void System_Init ( void ) { __set_PRIMASK ( 1 ); //¹Ø±Õ×ÜÖÐ¶Ï SYS_Init(); IO_Init(); FMC_Init(); // WDT_Init(); ReadInitPara(); UART1_Init(); ADC_Init(); TMR0_Init(); __set_PRIMASK ( 0 ); }
bool flash_io_driver_initialize(void) { uint32_t desiredConfig0 = 0xF8FFFF7E; uint32_t desiredConfig1 = APPLICATION_DATA_START; uint32_t config0; uint32_t config1; bool fail = false; critical_section_enter(); UNLOCKREG(); FMC_Init(); FMC_EnableAPUpdate(); LOCKREG(); if(FMC_Read(CONFIG0, &config0) != E_FMC_OK) { fail = true; } if(FMC_Read(CONFIG1, &config1) != E_FMC_OK) { fail = true; } if(fail || (desiredConfig0 != config0) || (desiredConfig1 != config1)) { FMC_EnableConfigUpdate(); if(FMC_WriteConfig(config0, config1) != E_FMC_OK) { fail = true; } else { fail = false; } FMC_DisableConfigUpdate(); } critical_section_exit(); return fail == false; }
void Peripherals_Init(void) { #ifdef NVIC_AUTOINIT NVIC_Init(); #endif /* NVIC_AUTOINIT */ #ifdef SIM_AUTOINIT SIM_Init(); #endif /* SIM_AUTOINIT */ #ifdef MCM_AUTOINIT MCM_Init(); #endif /* MCM_AUTOINIT */ #ifdef PMC_AUTOINIT PMC_Init(); #endif /* PMC_AUTOINIT */ #ifdef PORTA_AUTOINIT PORTA_Init(); #endif /* PORTA_AUTOINIT */ #ifdef PORTB_AUTOINIT PORTB_Init(); #endif /* PORTB_AUTOINIT */ #ifdef PORTC_AUTOINIT PORTC_Init(); #endif /* PORTC_AUTOINIT */ #ifdef PORTD_AUTOINIT PORTD_Init(); #endif /* PORTD_AUTOINIT */ #ifdef PORTE_AUTOINIT PORTE_Init(); #endif /* PORTE_AUTOINIT */ #ifdef ADC0_AUTOINIT ADC0_Init(); #endif /* ADC0_AUTOINIT */ #ifdef ADC1_AUTOINIT ADC1_Init(); #endif /* ADC1_AUTOINIT */ #ifdef AIPS0_AUTOINIT AIPS0_Init(); #endif /* AIPS0_AUTOINIT */ #ifdef AIPS1_AUTOINIT AIPS1_Init(); #endif /* AIPS1_AUTOINIT */ #ifdef AXBS_AUTOINIT AXBS_Init(); #endif /* AXBS_AUTOINIT */ #ifdef CAN0_AUTOINIT CAN0_Init(); #endif /* CAN0_AUTOINIT */ #ifdef CMP0_AUTOINIT CMP0_Init(); #endif /* CMP0_AUTOINIT */ #ifdef CMP1_AUTOINIT CMP1_Init(); #endif /* CMP1_AUTOINIT */ #ifdef CMP2_AUTOINIT CMP2_Init(); #endif /* CMP2_AUTOINIT */ #ifdef CMT_AUTOINIT CMT_Init(); #endif /* CMT_AUTOINIT */ #ifdef CRC_AUTOINIT CRC_Init(); #endif /* CRC_AUTOINIT */ #ifdef DAC0_AUTOINIT DAC0_Init(); #endif /* DAC0_AUTOINIT */ #ifdef DMAMUX_AUTOINIT DMAMUX_Init(); #endif /* DMAMUX_AUTOINIT */ #ifdef DMA_AUTOINIT DMA_Init(); #endif /* DMA_AUTOINIT */ #ifdef ENET_AUTOINIT ENET_Init(); #endif /* ENET_AUTOINIT */ #ifdef EWM_AUTOINIT EWM_Init(); #endif /* EWM_AUTOINIT */ #ifdef FB_AUTOINIT FB_Init(); #endif /* FB_AUTOINIT */ #ifdef FMC_AUTOINIT FMC_Init(); #endif /* FMC_AUTOINIT */ #ifdef FTFE_AUTOINIT FTFE_Init(); #endif /* FTFE_AUTOINIT */ #ifdef FTM0_AUTOINIT FTM0_Init(); #endif /* FTM0_AUTOINIT */ #ifdef FTM1_AUTOINIT FTM1_Init(); #endif /* FTM1_AUTOINIT */ #ifdef FTM2_AUTOINIT FTM2_Init(); #endif /* FTM2_AUTOINIT */ #ifdef FTM3_AUTOINIT FTM3_Init(); #endif /* FTM3_AUTOINIT */ #ifdef I2C0_AUTOINIT I2C0_Init(); #endif /* I2C0_AUTOINIT */ #ifdef I2C1_AUTOINIT I2C1_Init(); #endif /* I2C1_AUTOINIT */ #ifdef I2C2_AUTOINIT I2C2_Init(); #endif /* I2C2_AUTOINIT */ #ifdef I2S0_AUTOINIT I2S0_Init(); #endif /* I2S0_AUTOINIT */ #ifdef LLWU_AUTOINIT LLWU_Init(); #endif /* LLWU_AUTOINIT */ #ifdef LPTMR0_AUTOINIT LPTMR0_Init(); #endif /* LPTMR0_AUTOINIT */ #ifdef MPU_AUTOINIT MPU_Init(); #endif /* MPU_AUTOINIT */ #ifdef PDB0_AUTOINIT PDB0_Init(); #endif /* PDB0_AUTOINIT */ #ifdef PIT_AUTOINIT PIT_Init(); #endif /* PIT_AUTOINIT */ #ifdef PTA_AUTOINIT PTA_Init(); #endif /* PTA_AUTOINIT */ #ifdef PTB_AUTOINIT PTB_Init(); #endif /* PTB_AUTOINIT */ #ifdef PTC_AUTOINIT PTC_Init(); #endif /* PTC_AUTOINIT */ #ifdef PTD_AUTOINIT PTD_Init(); #endif /* PTD_AUTOINIT */ #ifdef PTE_AUTOINIT PTE_Init(); #endif /* PTE_AUTOINIT */ #ifdef RCM_AUTOINIT RCM_Init(); #endif /* RCM_AUTOINIT */ #ifdef RNG_AUTOINIT RNG_Init(); #endif /* RNG_AUTOINIT */ #ifdef RTC_AUTOINIT RTC_Init(); #endif /* RTC_AUTOINIT */ #ifdef SDHC_AUTOINIT SDHC_Init(); #endif /* SDHC_AUTOINIT */ #ifdef SMC_AUTOINIT SMC_Init(); #endif /* SMC_AUTOINIT */ #ifdef SPI0_AUTOINIT SPI0_Init(); #endif /* SPI0_AUTOINIT */ #ifdef SPI1_AUTOINIT SPI1_Init(); #endif /* SPI1_AUTOINIT */ #ifdef SPI2_AUTOINIT SPI2_Init(); #endif /* SPI2_AUTOINIT */ #ifdef SystemControl_AUTOINIT SystemControl_Init(); #endif /* SystemControl_AUTOINIT */ #ifdef SysTick_AUTOINIT SysTick_Init(); #endif /* SysTick_AUTOINIT */ #ifdef UART0_AUTOINIT UART0_Init(); #endif /* UART0_AUTOINIT */ #ifdef UART1_AUTOINIT UART1_Init(); #endif /* UART1_AUTOINIT */ #ifdef UART2_AUTOINIT UART2_Init(); #endif /* UART2_AUTOINIT */ #ifdef UART3_AUTOINIT UART3_Init(); #endif /* UART3_AUTOINIT */ #ifdef UART4_AUTOINIT UART4_Init(); #endif /* UART4_AUTOINIT */ #ifdef UART5_AUTOINIT UART5_Init(); #endif /* UART5_AUTOINIT */ #ifdef USB0_AUTOINIT USB0_Init(); #endif /* USB0_AUTOINIT */ #ifdef USBDCD_AUTOINIT USBDCD_Init(); #endif /* USBDCD_AUTOINIT */ #ifdef VREF_AUTOINIT VREF_Init(); #endif /* VREF_AUTOINIT */ #ifdef WDOG_AUTOINIT WDOG_Init(); #endif /* WDOG_AUTOINIT */ }
/** * @brief Main funcion * @param None * @retval 0: Success; <0: Failed */ int32_t main (void) { int32_t i32Err; uint32_t u32Data, i, u32ImageSize, j, *pu32Loader; uint8_t ch; UNLOCKREG(); /* Enable FMC ISP function */ FMC_Init(); /* Read Company ID */ u32Data = 0; FMC_ReadCID(&u32Data); if (u32Data != 0xda) { printf("Wrong CID: 0x%x\n", u32Data); goto lexit; } /* Check the signature to check if Simple LD code is finished or not */ if (inpw(KEY_ADDR) == SIGNATURE) { /* Just clear SIGNATURE and finish the sample code if Simple LD code has been executed. */ outpw(KEY_ADDR, 0); /* Read BS */ printf(" Boot Mode .................................. "); if (FMC_GetBootSelect() == E_FMC_APROM) printf("[APROM]\n"); else { printf("[LDROM]\n"); printf(" WARNING: The driver sample code must execute in AP mode!\n"); } goto lexit; } printf("\n\n"); printf("+-------------------------------------------------------------------------+\n"); printf("| NANO1xx Flash Memory Controller Driver Sample Code |\n"); printf("+-------------------------------------------------------------------------+\n"); printf(" NOTE: This sample must be applied to NANO1xx series equipped with 16KB RAM.\n"); /* Read BS */ printf(" Boot Mode .................................. "); if (FMC_GetBootSelect() == E_FMC_APROM) printf("[APROM]\n"); else { printf("[LDROM]\n"); printf(" WARNING: The driver sample code must execute in AP mode!\n"); goto lexit; } /* Read Data Flash base address */ u32Data = FMC_ReadDataFlashBaseAddr(); printf(" Data Flash Base Address .................... [0x%08x]\n", u32Data); /* Check the data in LD ROM to avoid overwrite them */ FMC_Read(LDROM_BASE, &u32Data); if (u32Data != 0xFFFFFFFF) { printf("\n WARNING: There is code in LD ROM.\n If you proceed, the code in LD ROM will be corrupted.\n"); printf(" Continue? [y/n]:"); ch = getchar(); putchar(ch); if (ch != 'y') goto lexit; printf("\n\n"); } /* Enable LDROM update */ FMC_EnableLDUpdate(); printf(" Erase LD ROM ............................... "); /* Page Erase LDROM */ for (i = 0; i < 4096; i += PAGE_SIZE) FMC_Erase(LDROM_BASE + i); /* Erase Verify */ i32Err = 0; for (i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4) { FMC_Read(i, &u32Data); if(u32Data != 0xFFFFFFFF) { printf(" u32Data = 0x%x\n", u32Data); i32Err = 1; } } if (i32Err) printf("[FAIL]\n"); else printf("[OK]\n"); printf(" Program LD ROM test ........................ "); /* Program LD ROM and read out data to compare it */ for (i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4) { FMC_Write(i, i); } i32Err = 0; for (i = LDROM_BASE; i < (LDROM_BASE+4096); i += 4) { FMC_Read(i, &u32Data); if(u32Data != i) { i32Err = 1; } } if (i32Err) printf("[FAIL]\n"); else printf("[OK]\n"); /* Check LD image size */ u32ImageSize = (uint32_t)&loaderImageLimit - (uint32_t)&loaderImageBase; if (u32ImageSize == 0) { printf(" ERROR: Loader Image is 0 bytes!\n"); goto lexit; } if (u32ImageSize > 4096) { printf(" ERROR: Loader Image is larger than 4KBytes!\n"); goto lexit; } printf(" Program Simple LD Code ..................... "); pu32Loader = (uint32_t *)&loaderImageBase; for (i = 0; i < u32ImageSize; i += PAGE_SIZE) { FMC_Erase(LDROM_BASE + i); for (j = 0; j < PAGE_SIZE; j += 4) { FMC_Write(LDROM_BASE + i + j, pu32Loader[(i + j) / 4]); } } /* Verify loader */ i32Err = 0; for (i = 0; i < u32ImageSize; i += PAGE_SIZE) { for(j = 0; j < PAGE_SIZE; j += 4) { FMC_Read(LDROM_BASE + i + j, &u32Data); if (u32Data != pu32Loader[(i+j)/4]) i32Err = 1; if (i + j >= u32ImageSize) break; } } if(i32Err) { printf("[FAIL]\n"); } else { printf("[OK]\n"); /* Reset CPU to boot to LD mode */ printf("\n >>> Reset to LD mode <<<\n"); FMC_BootSelect(E_FMC_LDROM); GCR->IPRST_CTL1 = GCR_IPRSTCTL1_CPU; } lexit: /* Disable FMC ISP function */ FMC_DeInit(); /* Lock protected registers */ LOCKREG(); printf("\nFMC Sample Code Completed.\n"); }