static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
int data)
{
struct ftmac100 *priv = netdev_priv(netdev);
unsigned int phycr;
int i;
phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
FTMAC100_PHYCR_REGAD(reg) |
FTMAC100_PHYCR_MIIWR;
data = FTMAC100_PHYWDATA_MIIWDATA(data);
iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
for (i = 0; i < 10; i++) {
phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
return;
udelay(100);
}
netdev_err(netdev, "mdio write timed out\n");
}
/******************************************************************************
* struct mii_if_info functions
*****************************************************************************/
static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
{
struct ftmac100 *priv = netdev_priv(netdev);
unsigned int phycr;
int i;
phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
FTMAC100_PHYCR_REGAD(reg) |
FTMAC100_PHYCR_MIIRD;
iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
for (i = 0; i < 10; i++) {
phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
return phycr & FTMAC100_PHYCR_MIIRDATA;
udelay(100);
}
netdev_err(netdev, "mdio read timed out\n");
return 0;
}
void ftMac100_InterruptHandler( void )
{
extern portBASE_TYPE xInsideISR;
int i, status, phycr;
/* Ensure the pbuf handling functions don't attempt to use critical
sections. */
xInsideISR++;
status = FTMAC100_OFFSET_ISR;
if( status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF) )
{
sys_sem_signal( &pgMac100If->rx_sem );
}
if( status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG) )
{
LWIP_DEBUGF( NETIF_DEBUG, ( "[ISR] = 0x%x: %s%s%s%s\n", status,
status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "") );
if( status & FTMAC100_INT_NORXBUF )
{
/* RX buffer unavailable */
#if LINK_STATS
LINK_STATS_INC( link.memerr );
#endif
}
if( status & FTMAC100_INT_RPKT_LOST )
{
/* received packet lost due to RX FIFO full */
#if LINK_STATS
LINK_STATS_INC( link.memerr );
#endif
}
if( status & FTMAC100_INT_PHYSTS_CHG )
{
/* PHY link status change */
phycr = FTMAC100_PHYCR_PHYAD(0) |
FTMAC100_PHYCR_REGAD(1) |
FTMAC100_PHYCR_MIIRD;
FTMAC100_OFFSET_PHYCR = phycr;
for (i = 0; i < 10; i++) {
phycr = FTMAC100_OFFSET_PHYCR;
if( (phycr & FTMAC100_PHYCR_MIIRD) == 0 )
break;
}
if( phycr & 0x4 )
netif_set_link_up( pgMac100If->netIf );
else
netif_set_link_down( pgMac100If->netIf );
}
}
xInsideISR--;
}
