int spi_txrx(int port, const uint8_t* outBuffer, int outLen, uint8_t* inBuffer, int inLen, int block)
{
if(port > (NUM_SPIPORTS - 1)) {
return -1;
}
SET_REG(SPIRegs[port].control, GET_REG(SPIRegs[port].control) | (1 << 2));
SET_REG(SPIRegs[port].control, GET_REG(SPIRegs[port].control) | (1 << 3));
spi_info[port].txBuffer = outBuffer;
if(outLen > MAX_TX_BUFFER)
spi_info[port].txCurrentLen = MAX_TX_BUFFER;
else
spi_info[port].txCurrentLen = outLen;
spi_info[port].txTotalLen = outLen;
spi_info[port].txDone = FALSE;
spi_info[port].rxBuffer = inBuffer;
spi_info[port].rxDone = FALSE;
spi_info[port].rxCurrentLen = 0;
spi_info[port].rxTotalLen = inLen;
spi_info[port].counter = 0;
spi_txdata(port, outBuffer, 0, spi_info[port].txCurrentLen);
SET_REG(SPIRegs[port].cnt, (inLen + ((1<<spi_info[port].wordSize)-1)) >> spi_info[port].wordSize);
SET_REG(SPIRegs[port].control, 1);
if(block) {
while(!spi_info[port].txDone || !spi_info[port].rxDone || GET_BITS(GET_REG(SPIRegs[port].status), 4, 4) != 0) {
// yield
}
return inLen;
} else {
return 0;
}
}
int spi_tx(int port, uint8_t* buffer, int len, int block, int unknown) {
if(port >= (NUM_SPIPORTS - 1)) {
return -1;
}
SET_REG(SPIRegs[port].control, GET_REG(SPIRegs[port].control) | (1 << 2));
SET_REG(SPIRegs[port].control, GET_REG(SPIRegs[port].control) | (1 << 3));
spi_info[port].txBuffer = buffer;
if(len > MAX_TX_BUFFER)
spi_info[port].txCurrentLen = MAX_TX_BUFFER;
else
spi_info[port].txCurrentLen = len;
spi_info[port].txTotalLen = len;
spi_info[port].txDone = FALSE;
if(unknown == 0) {
SET_REG(SPIRegs[port].unkReg2, 0);
}
int i;
for(i = 0; i < spi_info[port].txCurrentLen; i++) {
SET_REG(SPIRegs[port].txData, buffer[i]);
}
SET_REG(SPIRegs[port].control, 1);
if(block) {
while(!spi_info[port].txDone || GET_BITS(GET_REG(SPIRegs[port].status), 4, 4) != 0) {
// yield
}
return len;
} else {
return 0;
}
}
u32 de_get_mclk_src(__hdle clk_hdl)
{
u32 i;
u32 count;
u32 src_sel;
u32 reg_val;
clk_mod_para *hdl = (clk_mod_para*)clk_hdl;
count = sizeof(disp_clk_mod_tbl) / sizeof(clk_mod_para);
for(i = 0; i < count; i++)
{
if(disp_clk_mod_tbl[i].clk_id == hdl->clk_id)
{
reg_val = readl(disp_clk_mod_tbl[i].mod_adr);
src_sel = GET_BITS(disp_clk_mod_tbl[i].mod_src_shift, disp_clk_mod_tbl[i].mod_src_bit_num, reg_val);
if(src_sel == 0)
{
return SYS_CLK_PLL3;
}
else if(src_sel == 4)
{
return SYS_CLK_MIPIPLL;
}
else if(src_sel == 5)
{
return SYS_CLK_PLL10;
}
else
{
break;
}
}
}
__wrn("get mod clock src fail!\n");
return 0;
}
void gpio_pulldown_configure(int port, GPIOPDSetting setting)
{
uint32_t bit = 1 << GET_BITS(port, 0, 3);
switch(setting)
{
case GPIOPDDisabled:
GPIORegs[GET_BITS(port, 8, 5)].PUD1 &= ~bit;
GPIORegs[GET_BITS(port, 8, 5)].PUD2 &= ~bit;
break;
case GPIOPDUp:
GPIORegs[GET_BITS(port, 8, 5)].PUD1 |= bit;
GPIORegs[GET_BITS(port, 8, 5)].PUD2 &= ~bit;
break;
case GPIOPDDown:
GPIORegs[GET_BITS(port, 8, 5)].PUD1 &= ~bit;
GPIORegs[GET_BITS(port, 8, 5)].PUD2 |= bit;
break;
}
}
static int aac_sensor_read(struct file *filp, char __user *buf, size_t count, loff_t *f_pos)
{
struct sensor_device *dev;
//sensors_vec_t vec[ID_MAX];
int x=0,y=0,z=0,temp;
char data[255],*curr;
char bit;
int event;
int result;
dev=&sensor_priv;
event=wait_for_completion_timeout(&dev->data_comp,get_poll_time());
result = aac_sensor_query(dev,event); //get new data
down(&sensor_data_mutex);
curr=data;
if(result == 0){
if(event){
bit=GET_BITS(dev->values[MMA_TILT],MMA_TILT_ALERT);
if(!bit){
bit=GET_BITS(dev->values[3],MMA_TILT_POLA);
// board e2
#if defined(CONFIG_BOARD_E2)
if(bit==POLA_LEFT){
x=180;
}else if(bit==POLA_RIGHT){
x=0;
}else if(bit==POLA_UP){
x=270;
}else if(bit==POLA_DOWN){
x=90;
}else{
event=0;
}
#endif
//board 3e
#if defined(CONFIG_BOARD_E3)
if(bit==POLA_LEFT){
x=0;
}else if(bit==POLA_RIGHT){
x=180;
}else if(bit==POLA_UP){
x=270;
}else if(bit==POLA_DOWN){
x=90;
}else{
event=0;
}
#endif
//board g0
#if defined(CONFIG_BOARD_G0)||defined(CONFIG_BOARD_G0_3G)
if(bit==POLA_LEFT){
x=90;
}else if(bit==POLA_RIGHT){
x=270;
}else if(bit==POLA_UP){
x=180;
}else if(bit==POLA_DOWN){
x=0;
}else{
event=0;
}
#endif
//board h0
#if defined(CONFIG_BOARD_H0)
if(bit==POLA_LEFT){
x=180;
}else if(bit==POLA_RIGHT){
x=0;
}else if(bit==POLA_UP){
x=90;
}else if(bit==POLA_DOWN){
x=270;
}else{
event=0;
}
#endif
//board i0
#if defined(CONFIG_BOARD_I0)||defined(CONFIG_BOARD_K0)
if(bit==POLA_LEFT){
x=270;
}else if(bit==POLA_RIGHT){
x=90;
}else if(bit==POLA_UP){
x=0;
}else if(bit==POLA_DOWN){
x=180;
}else{
event=0;
}
#endif
//board j0
#if defined(CONFIG_BOARD_J0)||defined(CONFIG_BOARD_L0)
if(bit==POLA_LEFT){
x=270;
}else if(bit==POLA_RIGHT){
x=90;
}else if(bit==POLA_UP){
x=180;
}else if(bit==POLA_DOWN){
x=0;
}else{
event=0;
}
#endif
if(x==dev->orientation){
event=0;
}else{
dev->orientation=x;
}
}else{
event=0;
}
}
//ID_ACCELERATION
if(event==0){
x=dev->axis[0];
y=dev->axis[1];
z=dev->axis[2];
//board e2
#if defined(CONFIG_BOARD_E2)
temp=x;
x=y;y=temp;z=-z;
#endif
//board e3
#if defined(CONFIG_BOARD_E3)
temp=x;
x=x;y=y;z=-z;
#endif
// board g0
#if defined(CONFIG_BOARD_G0)||defined(CONFIG_BOARD_G0_3G)
temp=x;
x=y;y=temp;z=-z;
#endif
// board h0
#if defined(CONFIG_BOARD_H0)
temp=x;
x=y;y=temp;z=-z;
#endif
#if defined(CONFIG_BOARD_I0)||defined(CONFIG_BOARD_K0)
temp=x;
x=y;y=temp;z=-z;
#endif
#if defined(CONFIG_BOARD_J0)||defined(CONFIG_BOARD_L0)
temp=x;
x=y;y=-temp;z=-z;
#endif
sprintf(curr,"%s:%d:%d:%d ",
SENSER_NAME_AAC,
x,y,z);
curr+=strlen(curr);
//ID_ORIENTATION
}else {
y=z=0;
sprintf(curr,"%s:%d:%d:%d ",
SENSER_NAME_ORI,
x,y,z);
curr+=strlen(curr);
}
if(event){
sensor_debug("event %d x=%d y=%d z=%d\n",event,x,y,z);
sensor_debug("read data: %s (%d) x %d y %d z %d filt 0x%x status 0x%x\n",data,count,
dev->axis[0],dev->axis[1],dev->axis[2],
dev->values[MMA_TILT],
dev->values[MMA_INTSU]);
}
}
//time
sprintf(curr,"sync:%lld",
time_to_ns());
count=strlen(data);
up(&sensor_data_mutex);
if (copy_to_user(buf, data, count)) {
return -EFAULT;
}
return count;
}
static int sunxi_clk_factors_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate)
{
unsigned long reg;
struct clk_factors_value factor_val;
struct sunxi_clk_factors *factor = to_clk_factor(hw);
struct sunxi_clk_factors_config *config = factor->config;
unsigned long flags = 0;
if(!factor->get_factors)
return 0;
/* factor_val is initialized with its original value,
* it's factors(such as:M,N,K,P,d1,d2...) are Random Value.
* if donot judge the return value of "factor->get_factors",
* it may change the original register value.
*/
if(factor->get_factors(rate, parent_rate, &factor_val) < 0)
{
/* cannot get right factors for clk,just break */
WARN(1, "clk %s set rate failed! Because cannot get right factors for clk\n", hw->clk->name);
return 0;
}
if(factor->flags & CLK_RATE_FLAT_FACTORS)
return sunxi_clk_factors_set_flat_facotrs(factor, &factor_val);
if(factor->lock)
spin_lock_irqsave(factor->lock, flags);
sunxi_clk_disable_plllock(factor);
reg = factor_readl(factor, factor->reg);
if(config->sdmwidth)
{
factor_writel(factor, config->sdmval, (void __iomem *)config->sdmpat);
reg = SET_BITS(config->sdmshift, config->sdmwidth, reg, 1);
}
if(config->nwidth)
reg = SET_BITS(config->nshift, config->nwidth, reg, factor_val.factorn);
if(config->kwidth)
reg = SET_BITS(config->kshift, config->kwidth, reg, factor_val.factork);
if(config->mwidth)
reg = SET_BITS(config->mshift, config->mwidth, reg, factor_val.factorm);
if(config->pwidth)
reg = SET_BITS(config->pshift, config->pwidth, reg, factor_val.factorp);
if(config->d1width)
reg = SET_BITS(config->d1shift, config->d1width, reg, factor_val.factord1);
if(config->d2width)
reg = SET_BITS(config->d2shift, config->d2width, reg, factor_val.factord2);
if(config->frac) {
reg = SET_BITS(config->modeshift, 1, reg, factor_val.frac_mode);
reg = SET_BITS(config->outshift, 1, reg, factor_val.frac_freq);
}
if(config->updshift) //update for pll_ddr register
reg = SET_BITS(config->updshift, 1, reg, 1);
factor_writel(factor,reg, factor->reg);
#ifndef CONFIG_SUNXI_CLK_DUMMY_DEBUG
if(GET_BITS(config->enshift, 1, reg)) {
if (sunxi_clk_is_lock(factor)) {
if(factor->lock)
spin_unlock_irqrestore(factor->lock, flags);
WARN(1, "clk %s wait lock timeout\n", factor->hw.clk->name);
return -1;
}
}
#endif
if(factor->lock)
spin_unlock_irqrestore(factor->lock, flags);
return 0;
}
boolean decode_mcu_AC_first (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
phuff_entropy_ptr entropy = (phuff_entropy_ptr) cinfo->entropy;
int Se = cinfo->Se;
int Al = cinfo->Al;
register int s, k, r;
unsigned int EOBRUN;
JBLOCKROW block;
BITREAD_STATE_VARS;
d_derived_tbl * tbl;
/* Process restart marker if needed; may have to suspend */
if (cinfo->restart_interval)
{
if (entropy->restarts_to_go == 0)
if (! process_restart(cinfo))
return FALSE;
}
/* If we've run out of data, just leave the MCU set to zeroes.
* This way, we return uniform gray for the remainder of the segment.
*/
if (! entropy->pub.insufficient_data)
{
/* Load up working state.
* We can avoid loading/saving bitread state if in an EOB run.
*/
EOBRUN = entropy->saved.EOBRUN; /* only part of saved state we need */
/* There is always only one block per MCU */
if (EOBRUN > 0) /* if it's a band of zeroes... */
EOBRUN--; /* ...process it now (we do nothing) */
else
{
BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
block = MCU_data[0];
tbl = entropy->ac_derived_tbl;
for (k = cinfo->Ss; k <= Se; k++)
{
if ( ! br_state.HUFF_DECODE(s, bits_left, get_buffer, tbl) )
return FALSE;
r = s >> 4;
s &= 15;
if (s)
{
k += r;
if ( ! br_state.CHECK_BIT_BUFFER(s, bits_left, get_buffer) )
return FALSE;
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
/* Scale and output coefficient in natural (dezigzagged) order */
(*block)[jpeg_natural_order[k]] = (JCOEF) (s << Al);
}
else
{
if (r == 15) /* ZRL */
{
k += 15; /* skip 15 zeroes in band */
}
else /* EOBr, run length is 2^r + appended bits */
{
EOBRUN = 1 << r;
if (r) /* EOBr, r > 0 */
{
if ( ! br_state.CHECK_BIT_BUFFER(r, bits_left, get_buffer) )
return FALSE;
r = GET_BITS(r);
EOBRUN += r;
}
EOBRUN--; /* this band is processed at this moment */
break; /* force end-of-band */
}
}
}
BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
}
/* Completed MCU, so update state */
entropy->saved.EOBRUN = EOBRUN; /* only part of saved state we need */
}
/*!
\brief read the free data register
\param[in] none
\param[out] none
\retval 32-bit value of the free data register
*/
uint32_t crc_free_data_register_read(void)
{
uint32_t fdata;
fdata = GET_BITS(CRC_FDATA, 0, 7);
return (fdata);
}
METHODDEF boolean decode_mcu_AC_first(j_decompress_ptr cinfo, JBLOCKROW * MCU_data)
{
phuff_entropy_ptr entropy = (phuff_entropy_ptr) cinfo->entropy;
int Se = cinfo->Se;
int Al = cinfo->Al;
register int s, k, r;
unsigned int EOBRUN;
JBLOCKROW block;
BITREAD_STATE_VARS;
d_derived_tbl *tbl;
/* Process restart marker if needed; may have to suspend */
if(cinfo->restart_interval)
{
if(entropy->restarts_to_go == 0)
if(!process_restart(cinfo))
return FALSE;
}
/* Load up working state.
* We can avoid loading/saving bitread state if in an EOB run.
*/
EOBRUN = entropy->saved.EOBRUN; /* only part of saved state we care about */
/* There is always only one block per MCU */
if(EOBRUN > 0) /* if it's a band of zeroes... */
EOBRUN--; /* ...process it now (we do nothing) */
else
{
BITREAD_LOAD_STATE(cinfo, entropy->bitstate);
block = MCU_data[0];
tbl = entropy->ac_derived_tbl;
for(k = cinfo->Ss; k <= Se; k++)
{
HUFF_DECODE(s, br_state, tbl, return FALSE, label2);
r = s >> 4;
s &= 15;
if(s)
{
k += r;
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
/* Scale and output coefficient in natural (dezigzagged) order */
(*block)[jpeg_natural_order[k]] = (JCOEF) (s << Al);
}
else
{
if(r == 15)
{ /* ZRL */
k += 15; /* skip 15 zeroes in band */
}
else
{ /* EOBr, run length is 2^r + appended bits */
EOBRUN = 1 << r;
if(r)
{ /* EOBr, r > 0 */
CHECK_BIT_BUFFER(br_state, r, return FALSE);
r = GET_BITS(r);
EOBRUN += r;
}
EOBRUN--; /* this band is processed at this moment */
break; /* force end-of-band */
}
}
}
BITREAD_SAVE_STATE(cinfo, entropy->bitstate);
}
decode_mcu (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
__boundcheck_metadata_store((void *)(&entropy),(void *)((size_t)(&entropy)+sizeof(entropy)*8-1));
register int s, k, r;
int blkn;
__boundcheck_metadata_store((void *)(&blkn),(void *)((size_t)(&blkn)+sizeof(blkn)*8-1));
int ci;
__boundcheck_metadata_store((void *)(&ci),(void *)((size_t)(&ci)+sizeof(ci)*8-1));
JBLOCKROW block;
__boundcheck_metadata_store((void *)(&block),(void *)((size_t)(&block)+sizeof(block)*8-1));
BITREAD_STATE_VARS;
__boundcheck_metadata_store((void *)(&br_state),(void *)((size_t)(&br_state)+sizeof(br_state)*8-1));
savable_state state;
__boundcheck_metadata_store((void *)(&state),(void *)((size_t)(&state)+sizeof(state)*8-1));
d_derived_tbl * dctbl;
__boundcheck_metadata_store((void *)(&dctbl),(void *)((size_t)(&dctbl)+sizeof(dctbl)*8-1));
d_derived_tbl * actbl;
__boundcheck_metadata_store((void *)(&actbl),(void *)((size_t)(&actbl)+sizeof(actbl)*8-1));
jpeg_component_info * compptr;
__boundcheck_metadata_store((void *)(&compptr),(void *)((size_t)(&compptr)+sizeof(compptr)*8-1));
/* Process restart marker if needed; may have to suspend */
if (cinfo->restart_interval) {
if (entropy->restarts_to_go == 0)
if (! process_restart(cinfo))
return FALSE;
}
/* Load up working state */
BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
ASSIGN_STATE(state, entropy->saved);
/* Outer loop handles each block in the MCU */
for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
block = (*(JBLOCKROW *)(__boundcheck_ptr_reference(463,13,"decode_mcu",(void *)(&MCU_data[0]),(void *)(&MCU_data[blkn]))));
ci = cinfo->MCU_membership[_RV_insert_check(0,10,464,10,"decode_mcu",blkn)];
compptr = cinfo->cur_comp_info[_RV_insert_check(0,4,465,15,"decode_mcu",ci)];
dctbl = entropy->dc_derived_tbls[_RV_insert_check(0,4,466,13,"decode_mcu",compptr->dc_tbl_no)];
actbl = entropy->ac_derived_tbls[_RV_insert_check(0,4,467,13,"decode_mcu",compptr->ac_tbl_no)];
/* Decode a single block's worth of coefficients */
/* Section F.2.2.1: decode the DC coefficient difference */
HUFF_DECODE(s, br_state, dctbl, return FALSE, label1);
if (s) {
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
}
/* Shortcut if component's values are not interesting */
if (! compptr->component_needed)
goto skip_ACs;
/* Convert DC difference to actual value, update last_dc_val */
s += state.last_dc_val[_RV_insert_check(0,4,484,10,"decode_mcu",ci)];
state.last_dc_val[_RV_insert_check(0,4,485,5,"decode_mcu",ci)] = s;
/* Output the DC coefficient (assumes jpeg_natural_order[0] = 0) */
(*(JBLOCKROW)(__boundcheck_ptr_reference(487,7,"decode_mcu",(void *)(block),(void *)(block))))[0] = (JCOEF) s;
/* Do we need to decode the AC coefficients for this component? */
if (compptr->DCT_scaled_size > 1) {
/* Section F.2.2.2: decode the AC coefficients */
/* Since zeroes are skipped, output area must be cleared beforehand */
for (k = 1; k < DCTSIZE2; k++) {
HUFF_DECODE(s, br_state, actbl, return FALSE, label2);
r = s >> 4;
s &= 15;
if (s) {
k += r;
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
/* Output coefficient in natural (dezigzagged) order.
* Note: the extra entries in jpeg_natural_order[] will save us
* if k >= DCTSIZE2, which could happen if the data is corrupted.
*/
(*(JBLOCKROW)(__boundcheck_ptr_reference(509,6,"decode_mcu",(void *)(block),(void *)(block))))[(*(const int *)(__boundcheck_ptr_reference(509,13,"decode_mcu",(void *)(&jpeg_natural_order[0]),(void *)(&jpeg_natural_order[k]))))] = (JCOEF) s;
} else {
if (r != 15)
break;
k += 15;
}
}
} else {
static int xge_rx_poll(struct net_device *ndev, unsigned int budget)
{
struct xge_pdata *pdata = netdev_priv(ndev);
struct device *dev = &pdata->pdev->dev;
struct xge_desc_ring *rx_ring;
struct xge_raw_desc *raw_desc;
struct sk_buff *skb;
dma_addr_t dma_addr;
int processed = 0;
u8 head, rx_error;
int i, ret;
u32 data;
u16 len;
rx_ring = pdata->rx_ring;
head = rx_ring->head;
data = xge_rd_csr(pdata, DMARXSTATUS);
if (!GET_BITS(RXPKTCOUNT, data))
return 0;
for (i = 0; i < budget; i++) {
raw_desc = &rx_ring->raw_desc[head];
if (GET_BITS(E, le64_to_cpu(raw_desc->m0)))
break;
dma_rmb();
skb = rx_ring->pkt_info[head].skb;
rx_ring->pkt_info[head].skb = NULL;
dma_addr = rx_ring->pkt_info[head].dma_addr;
len = GET_BITS(PKT_SIZE, le64_to_cpu(raw_desc->m0));
dma_unmap_single(dev, dma_addr, XGENE_ENET_STD_MTU,
DMA_FROM_DEVICE);
rx_error = GET_BITS(D, le64_to_cpu(raw_desc->m2));
if (unlikely(rx_error)) {
pdata->stats.rx_errors++;
dev_kfree_skb_any(skb);
goto out;
}
skb_put(skb, len);
skb->protocol = eth_type_trans(skb, ndev);
pdata->stats.rx_packets++;
pdata->stats.rx_bytes += len;
napi_gro_receive(&pdata->napi, skb);
out:
ret = xge_refill_buffers(ndev, 1);
xge_wr_csr(pdata, DMARXSTATUS, 1);
xge_wr_csr(pdata, DMARXCTRL, 1);
if (ret)
break;
head = (head + 1) & (XGENE_ENET_NUM_DESC - 1);
processed++;
}
rx_ring->head = head;
return processed;
}
decode_mcus (j_decompress_ptr cinfo, JDIFFIMAGE diff_buf,
JDIMENSION MCU_row_num, JDIMENSION MCU_col_num, JDIMENSION nMCU)
{
j_lossless_d_ptr losslsd = (j_lossless_d_ptr) cinfo->codec;
lhuff_entropy_ptr entropy = (lhuff_entropy_ptr) losslsd->entropy_private;
unsigned int mcu_num;
int sampn, ci, yoffset, MCU_width, ptrn;
BITREAD_STATE_VARS;
/* Set output pointer locations based on MCU_col_num */
for (ptrn = 0; ptrn < entropy->num_output_ptrs; ptrn++) {
ci = entropy->output_ptr_info[ptrn].ci;
yoffset = entropy->output_ptr_info[ptrn].yoffset;
MCU_width = entropy->output_ptr_info[ptrn].MCU_width;
entropy->output_ptr[ptrn] =
diff_buf[ci][MCU_row_num + (JDIMENSION)yoffset] + MCU_col_num * (JDIMENSION)MCU_width;
}
/*
* If we've run out of data, zero out the buffers and return.
* By resetting the undifferencer, the output samples will be CENTERJSAMPLE.
*
* NB: We should find a way to do this without interacting with the
* undifferencer module directly.
*/
if (entropy->insufficient_data) {
for (ptrn = 0; ptrn < entropy->num_output_ptrs; ptrn++)
jzero_far((void FAR *) entropy->output_ptr[ptrn],
nMCU * (size_t)entropy->output_ptr_info[ptrn].MCU_width * SIZEOF(JDIFF));
(*losslsd->predict_process_restart) (cinfo);
}
else {
/* Load up working state */
BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
/* Outer loop handles the number of MCU requested */
for (mcu_num = 0; mcu_num < nMCU; mcu_num++) {
/* Inner loop handles the samples in the MCU */
for (sampn = 0; sampn < cinfo->data_units_in_MCU; sampn++) {
d_derived_tbl * dctbl = entropy->cur_tbls[sampn];
register int s, r;
/* Section H.2.2: decode the sample difference */
HUFF_DECODE(s, br_state, dctbl, return mcu_num, label1);
if (s) {
if (s == 16) /* special case: always output 32768 */
s = 32768;
else { /* normal case: fetch subsequent bits */
CHECK_BIT_BUFFER(br_state, s, return mcu_num);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
}
}
/* Output the sample difference */
*entropy->output_ptr[entropy->output_ptr_index[sampn]]++ = (JDIFF) s;
}
/* Completed MCU, so update state */
BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
}
}
return nMCU;
}
static void spiIRQHandler(uint32_t port) {
if(port >= (NUM_SPIPORTS - 1)) {
return;
}
uint32_t status = GET_REG(SPIRegs[port].status);
if(status & (1 << 3)) {
spi_info[port].counter++;
}
int i;
if(status & (1 << 1)) {
while(TRUE) {
// take care of tx
if(spi_info[port].txBuffer != NULL) {
if(spi_info[port].txCurrentLen < spi_info[port].txTotalLen) {
int toTX = spi_info[port].txTotalLen - spi_info[port].txCurrentLen;
int canTX = MAX_TX_BUFFER - TX_BUFFER_LEFT(status);
if(toTX > canTX)
toTX = canTX;
for(i = 0; i < toTX; i++) {
SET_REG(SPIRegs[port].txData, spi_info[port].txBuffer[spi_info[port].txCurrentLen + i]);
}
spi_info[port].txCurrentLen += toTX;
} else {
spi_info[port].txDone = TRUE;
spi_info[port].txBuffer = NULL;
}
}
dorx:
// take care of rx
if(spi_info[port].rxBuffer == NULL)
break;
int toRX = spi_info[port].rxTotalLen - spi_info[port].rxCurrentLen;
int canRX = GET_BITS(status, 8, 4);
if(toRX > canRX)
toRX = canRX;
for(i = 0; i < toRX; i++) {
spi_info[port].rxBuffer[spi_info[port].rxCurrentLen + i] = GET_REG(SPIRegs[port].rxData);
}
spi_info[port].rxCurrentLen += toRX;
if(spi_info[port].rxCurrentLen < spi_info[port].rxTotalLen)
break;
spi_info[port].rxDone = TRUE;
spi_info[port].rxBuffer = NULL;
}
} else if(status & (1 << 0)) {
// jump into middle of the loop to handle rx only, stupidly
goto dorx;
}
// acknowledge interrupt handling complete
SET_REG(SPIRegs[port].status, status);
}
decode_mcu (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
j_lossy_d_ptr lossyd = (j_lossy_d_ptr) cinfo->codec;
shuff_entropy_ptr entropy = (shuff_entropy_ptr) lossyd->entropy_private;
int blkn;
BITREAD_STATE_VARS;
savable_state state;
/* Process restart marker if needed; may have to suspend */
if (cinfo->restart_interval) {
if (entropy->restarts_to_go == 0)
if (! process_restart(cinfo))
return FALSE;
}
/* If we've run out of data, just leave the MCU set to zeroes.
* This way, we return uniform gray for the remainder of the segment.
*/
if (! entropy->insufficient_data) {
/* Load up working state */
BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
ASSIGN_STATE(state, entropy->saved);
/* Outer loop handles each block in the MCU */
for (blkn = 0; blkn < cinfo->data_units_in_MCU; blkn++) {
JBLOCKROW block = MCU_data[blkn];
d_derived_tbl * dctbl = entropy->dc_cur_tbls[blkn];
d_derived_tbl * actbl = entropy->ac_cur_tbls[blkn];
register int s, k, r;
/* Decode a single block's worth of coefficients */
/* Section F.2.2.1: decode the DC coefficient difference */
HUFF_DECODE(s, br_state, dctbl, return FALSE, label1);
if (s) {
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
}
if (entropy->dc_needed[blkn]) {
/* Convert DC difference to actual value, update last_dc_val */
int ci = cinfo->MCU_membership[blkn];
s += state.last_dc_val[ci];
state.last_dc_val[ci] = s;
/* Output the DC coefficient (assumes jpeg_natural_order[0] = 0) */
(*block)[0] = (JCOEF) s;
}
if (entropy->ac_needed[blkn]) {
/* Section F.2.2.2: decode the AC coefficients */
/* Since zeroes are skipped, output area must be cleared beforehand */
for (k = 1; k < DCTSIZE2; k++) {
HUFF_DECODE(s, br_state, actbl, return FALSE, label2);
r = s >> 4;
s &= 15;
if (s) {
k += r;
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
/* Output coefficient in natural (dezigzagged) order.
* Note: the extra entries in jpeg_natural_order[] will save us
* if k >= DCTSIZE2, which could happen if the data is corrupted.
*/
(*block)[jpeg_natural_order[k]] = (JCOEF) s;
} else {
if (r != 15)
break;
k += 15;
}
}
} else {
/* Section F.2.2.2: decode the AC coefficients */
/* In this path we just discard the values */
for (k = 1; k < DCTSIZE2; k++) {
static gboolean
gst_mpeg4_params_parse_vo (MPEG4Params * params, GstBitReader * br)
{
guint32 bits;
guint16 time_increment_resolution = 0;
guint16 fixed_time_increment = 0;
gint aspect_ratio_width = -1, aspect_ratio_height = -1;
gint height = -1, width = -1;
/* expecting a video object startcode */
GET_BITS (br, 32, &bits);
if (bits > 0x11F)
goto failed;
/* expecting a video object layer startcode */
GET_BITS (br, 32, &bits);
if (bits < 0x120 || bits > 0x12F)
goto failed;
/* ignore random accessible vol and video object type indication */
GET_BITS (br, 9, &bits);
GET_BITS (br, 1, &bits);
if (bits) {
/* skip video object layer verid and priority */
GET_BITS (br, 7, &bits);
}
/* aspect ratio info */
GET_BITS (br, 4, &bits);
if (bits == 0)
goto failed;
/* check if aspect ratio info is extended par */
if (bits == 0xf) {
GET_BITS (br, 8, &bits);
aspect_ratio_width = bits;
GET_BITS (br, 8, &bits);
aspect_ratio_height = bits;
} else if (bits < 0x6) {
aspect_ratio_width = aspect_ratio_table[bits][0];
aspect_ratio_height = aspect_ratio_table[bits][1];
}
GST_DEBUG ("aspect ratio %d/%d", aspect_ratio_width, aspect_ratio_height);
GET_BITS (br, 1, &bits);
if (bits) {
/* vol control parameters, skip chroma and low delay */
GET_BITS (br, 3, &bits);
GET_BITS (br, 1, &bits);
if (bits) {
/* skip vbv_parameters */
GET_BITS (br, 79, &bits);
}
}
/* layer shape */
GET_BITS (br, 2, &bits);
/* only support rectangular */
if (bits != 0)
goto failed;
MARKER_BIT (br);
GET_BITS (br, 16, &bits);
time_increment_resolution = bits;
MARKER_BIT (br);
GST_DEBUG ("time increment resolution %d", time_increment_resolution);
GET_BITS (br, 1, &bits);
if (bits) {
/* fixed time increment */
int n;
/* Length of the time increment is the minimal number of bits needed to
* represent time_increment_resolution */
for (n = 0; (time_increment_resolution >> n) != 0; n++);
GET_BITS (br, n, &bits);
fixed_time_increment = bits;
} else {
static int sunxi_clk_is_lock(struct sunxi_clk_factors *factor)
{
volatile u32 reg;
u32 loop = 5000;
switch (factor->lock_mode) {
case PLL_LOCK_NEW_MODE: {
/* enable pll new mode */
reg = factor_readl(factor, factor->pll_lock_ctrl_reg);
reg = SET_BITS(28, 1, reg, 1);
factor_writel(factor, reg, factor->pll_lock_ctrl_reg);
reg = factor_readl(factor, factor->pll_lock_ctrl_reg);
reg = SET_BITS(factor->lock_en_bit, 1, reg, 1);
factor_writel(factor, reg, factor->pll_lock_ctrl_reg);
while(loop--) {
reg = factor_readl(factor,factor->lock_reg);
if(GET_BITS(factor->lock_bit, 1, reg)) {
udelay(20);
break;
} else {
udelay(1);
}
}
reg = factor_readl(factor,factor->pll_lock_ctrl_reg);
reg = SET_BITS(factor->lock_en_bit, 1, reg, 0);
factor_writel(factor,reg, factor->pll_lock_ctrl_reg);
reg = factor_readl(factor, factor->pll_lock_ctrl_reg);
reg = SET_BITS(28, 1, reg, 0);
factor_writel(factor, reg, factor->pll_lock_ctrl_reg);
if(!loop) {
#if (defined CONFIG_FPGA_V4_PLATFORM) || (defined CONFIG_FPGA_V7_PLATFORM)
printk("clk %s wait lock timeout\n", factor->hw.clk->name);
return 0;
#else
WARN(1, "clk %s wait lock timeout\n", factor->hw.clk->name);
return -1;
#endif
}
return 0;
}
case PLL_LOCK_OLD_MODE:
case PLL_LOCK_NONE_MODE: {
while(loop--) {
reg = factor_readl(factor,factor->lock_reg);
if(GET_BITS(factor->lock_bit, 1, reg)) {
udelay(20);
break;
} else {
udelay(1);
}
}
if(!loop) {
#if (defined CONFIG_FPGA_V4_PLATFORM) || (defined CONFIG_FPGA_V7_PLATFORM)
printk("clk %s wait lock timeout\n", factor->hw.clk->name);
#else
WARN(1, "clk %s wait lock timeout\n", factor->hw.clk->name);
return -1;
#endif
}
return 0;
}
default: {
WARN(1, "invaid pll lock mode:%u\n", factor->lock_mode);
return -1;
}
}
}
decode_mcu (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
register int s, k, r;
int blkn, ci;
JBLOCKROW block;
BITREAD_STATE_VARS;
savable_state state;
d_derived_tbl * dctbl;
d_derived_tbl * actbl;
jpeg_component_info * compptr;
/* Process restart marker if needed; may have to suspend */
if (cinfo->restart_interval) {
if (entropy->restarts_to_go == 0)
if (! process_restart(cinfo))
return FALSE;
}
/* Load up working state */
BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
ASSIGN_STATE(state, entropy->saved);
/* Outer loop handles each block in the MCU */
for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
block = MCU_data[blkn];
ci = cinfo->MCU_membership[blkn];
compptr = cinfo->cur_comp_info[ci];
dctbl = entropy->dc_derived_tbls[compptr->dc_tbl_no];
actbl = entropy->ac_derived_tbls[compptr->ac_tbl_no];
/* Decode a single block's worth of coefficients */
/* Section F.2.2.1: decode the DC coefficient difference */
HUFF_DECODE(s, br_state, dctbl, return FALSE, label1);
if (s) {
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
}
/* Shortcut if component's values are not interesting */
if (! compptr->component_needed)
goto skip_ACs;
/* Convert DC difference to actual value, update last_dc_val */
s += state.last_dc_val[ci];
state.last_dc_val[ci] = s;
/* Output the DC coefficient (assumes jpeg_natural_order[0] = 0) */
(*block)[0] = (JCOEF) s;
/* Do we need to decode the AC coefficients for this component? */
if (compptr->DCT_scaled_size > 1) {
/* Section F.2.2.2: decode the AC coefficients */
/* Since zeroes are skipped, output area must be cleared beforehand */
for (k = 1; k < DCTSIZE2; k++) {
HUFF_DECODE(s, br_state, actbl, return FALSE, label2);
r = s >> 4;
s &= 15;
if (s) {
k += r;
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
/* Output coefficient in natural (dezigzagged) order.
* Note: the extra entries in jpeg_natural_order[] will save us
* if k >= DCTSIZE2, which could happen if the data is corrupted.
*/
(*block)[jpeg_natural_order[k]] = (JCOEF) s;
} else {
if (r != 15)
break;
k += 15;
}
}
} else {
int gpio_setup() {
#if !defined(CONFIG_IPHONE_4) && !defined(CONFIG_IPAD)
int i;
GPIORegs = (GPIORegisters*) GPIO;
for(i = 0; i < GPIO_NUMINTGROUPS; i++) {
// writes to all the interrupt status register to acknowledge and discard any pending
SET_REG(GPIOIC + GPIO_INTSTAT + (i * 0x4), GPIO_INTSTAT_RESET);
// disable all interrupts
SET_REG(GPIOIC + GPIO_INTEN + (i * 0x4), GPIO_INTEN_RESET);
}
memset(InterruptGroups, 0, sizeof(InterruptGroups));
interrupt_install(0x21, gpio_handle_interrupt, 0);
interrupt_install(0x20, gpio_handle_interrupt, 1);
interrupt_install(0x1f, gpio_handle_interrupt, 2);
interrupt_install(0x03, gpio_handle_interrupt, 3);
interrupt_install(0x02, gpio_handle_interrupt, 4);
interrupt_install(0x01, gpio_handle_interrupt, 5);
interrupt_install(0x00, gpio_handle_interrupt, 6);
interrupt_enable(0x21);
interrupt_enable(0x20);
interrupt_enable(0x1f);
interrupt_enable(0x03);
interrupt_enable(0x02);
interrupt_enable(0x01);
interrupt_enable(0x00);
clock_gate_switch(GPIO_CLOCKGATE, ON);
return 0;
#else
uint8_t v[8];
if (!(GET_REG(GPIO) & 1)) {
gpio_set(0x502, 0);
gpio_set(0x503, 0);
gpio_set(0x504, 0);
gpio_switch(0x502, 0xFFFFFFFF);
gpio_switch(0x503, 0xFFFFFFFF);
gpio_switch(0x504, 0xFFFFFFFF);
gpio_set(0x202, 0);
gpio_set(0x301, 0);
gpio_set(0x304, 0);
gpio_set(0x305, 0);
gpio_switch(0x202, 0xFFFFFFFF);
gpio_switch(0x301, 0xFFFFFFFF);
gpio_switch(0x304, 0xFFFFFFFF);
gpio_switch(0x305, 0xFFFFFFFF);
udelay(100);
v[0] = chipid_get_gpio();
v[1] = gpio_pin_state(0x504);
v[2] = gpio_pin_state(0x503);
v[3] = gpio_pin_state(0x502);
v[4] = gpio_pin_state(0x305);
v[5] = gpio_pin_state(0x304);
v[6] = gpio_pin_state(0x301);
v[7] = gpio_pin_state(0x202);
gpio_set(0x502, 4);
gpio_set(0x503, 4);
gpio_set(0x504, 4);
gpio_set(0x202, 4);
gpio_set(0x301, 4);
gpio_set(0x304, 4);
gpio_set(0x305, 4);
uint32_t new_status = ((v[0] << 3 | v[1] << 2 | v[2] << 1 | v[3]) << 16) | ((v[4] << 3 | v[5] << 2 | v[6] << 1 | v[7]) << 8) | 1;
SET_REG(POWER + POWER_ID, (GET_BITS(GET_REG(POWER + POWER_ID), 24, 8)) | (new_status & 0xFFFFFF));
}
return 0;
#endif
}
int dma_set_aes(int channel, dmaAES* dmaAESInfo) {
//bufferPrintf("cdma: set_aes.\r\n");
DMAInfo* dma = &dmaInfo[channel];
uint32_t value;
int i;
dma->dmaAESInfo = dmaAESInfo;
if(!dmaAESInfo)
return 0;
if (!dma->dmaAES_channel)
{
EnterCriticalSection();
for (i = 2; i < 9; i++) {
if (dmaAES_channel_used & (1 << i))
continue;
dmaAES_channel_used |= (1 << i);
dma->dmaAES_channel = i;
break;
}
LeaveCriticalSection();
if (!dma->dmaAES_channel)
system_panic("CDMA: no AES filter contexts: 0x%08x\r\n", dmaAES_channel_used);
}
uint32_t dmaAES_channel_reg = dma->dmaAES_channel << 12;
value = ((channel & 0xFF) << 8) | 0x20000;
if (!(dma->dmaAESInfo->inverse & 0xF))
value |= 0x30000;
switch(GET_BITS(dma->dmaAESInfo->type, 28, 4))
{
case 2: // AES 256
value |= 0x80000;
break;
case 1: // AES 192
value |= 0x40000;
break;
case 0: // AES 128
break;
default: // Fail
return -1;
}
uint32_t someval = dma->dmaAESInfo->type & 0xFFF;
if(someval == 0x200)
{
value |= 0x200000;
}
else if(someval == 0x201)
{
value |= 0x400000;
}
else if(someval == 0)
{
switch(GET_BITS(dma->dmaAESInfo->type, 28, 4))
{
case 2: // AES-256
SET_REG(DMA + DMA_AES + DMA_AES_KEY_7 + dmaAES_channel_reg, dma->dmaAESInfo->key[7]);
SET_REG(DMA + DMA_AES + DMA_AES_KEY_6 + dmaAES_channel_reg, dma->dmaAESInfo->key[6]);
case 1: // AES-192
SET_REG(DMA + DMA_AES + DMA_AES_KEY_5 + dmaAES_channel_reg, dma->dmaAESInfo->key[5]);
SET_REG(DMA + DMA_AES + DMA_AES_KEY_4 + dmaAES_channel_reg, dma->dmaAESInfo->key[4]);
case 0: // AES-128
SET_REG(DMA + DMA_AES + DMA_AES_KEY_3 + dmaAES_channel_reg, dma->dmaAESInfo->key[3]);
SET_REG(DMA + DMA_AES + DMA_AES_KEY_2 + dmaAES_channel_reg, dma->dmaAESInfo->key[2]);
SET_REG(DMA + DMA_AES + DMA_AES_KEY_1 + dmaAES_channel_reg, dma->dmaAESInfo->key[1]);
SET_REG(DMA + DMA_AES + DMA_AES_KEY_0 + dmaAES_channel_reg, dma->dmaAESInfo->key[0]);
value |= 0x100000;
break;
default:
return -1;
}
}
else if(someval != 0x100)
return -1;
SET_REG(DMA + dmaAES_channel_reg + DMA_AES, value);
return 0;
}
u32 de_get_pll_rate(__disp_clk_id_t clk_id)
{
u32 pll3_freq;
u32 fac_N, fac_M, ext_fac;
u32 reg_val;
if(clk_id == SYS_CLK_PLL10)
{
reg_val = readl(disp_clk_pll_tbl[1].pll_adr);
if(GET_BITS(24, 2, reg_val) == 0)
return 270000000;
else if(GET_BITS(24, 2, reg_val) == 2)
return 297000000;
else
{
fac_N = GET_BITS(disp_clk_pll_tbl[1].fac_shift, disp_clk_pll_tbl[1].fac_bit_num, reg_val);
fac_M = GET_BITS(disp_clk_pll_tbl[1].div_shift, disp_clk_pll_tbl[1].div_bit_num, reg_val);
return 24000000 * (fac_N + 1) / (fac_M + 1);
}
}
else
{
reg_val = readl(disp_clk_pll_tbl[0].pll_adr);
if(GET_BITS(24, 2, reg_val) == 0)
pll3_freq = 270000000;
else if(GET_BITS(24, 2, reg_val) == 2)
pll3_freq = 297000000;
else
{
fac_N = GET_BITS(disp_clk_pll_tbl[0].fac_shift, disp_clk_pll_tbl[0].fac_bit_num, reg_val);
fac_M = GET_BITS(disp_clk_pll_tbl[0].div_shift, disp_clk_pll_tbl[0].div_bit_num, reg_val);
pll3_freq = 24000000 * (fac_N + 1) / (fac_M + 1);
}
if(clk_id == SYS_CLK_PLL3)
{
return pll3_freq;
}
else if(clk_id == SYS_CLK_MIPIPLL)
{
reg_val = readl(disp_clk_pll_tbl[2].pll_adr);
fac_N = GET_BITS(disp_clk_pll_tbl[2].fac_shift, disp_clk_pll_tbl[2].fac_bit_num, reg_val);
fac_M = GET_BITS(disp_clk_pll_tbl[2].div_shift, disp_clk_pll_tbl[2].div_bit_num, reg_val);
ext_fac = GET_BITS(disp_clk_pll_tbl[2].ext_fac_shift, disp_clk_pll_tbl[2].ext_fac_bit_num, reg_val);
return pll3_freq * (fac_N + 1) * (ext_fac + 1) / (fac_M + 1);
}
else
{
}
}
return 0;
}
/*!
\brief read the data register
\param[in] none
\param[out] none
\retval 32-bit value
*/
uint32_t crc_data_register_read(void)
{
uint32_t data;
data = (GET_BITS(CRC_DATA, 0, 31));
return (data);
}
/*
* get_segment grabs another record segment from the data stream.
* fio->scc will be set as follows:
* SCCMIDL fio->segbits = fio_cnt (all or rest of data in fio
* buffer) and no EOR was found
* SCCFULL an EOR was found
*
* return values are as follows:
* 2 encountered end of data -> stat will be set
* 1 encountered end of file -> stat will be set
* 0 segment (or part) is received -> stat will NOT be set
* ERR encountered an error -> stat will be set
*/
static int
get_segment(struct fdinfo *fio, struct ffsw *stat)
{
long tword;
int left;
ssize_t ret;
unsigned char *cp;
bitptr tbptr;
struct text_f *text_info;
text_info = (struct text_f *)fio->lyr_info;
fio->lastscc = fio->scc;
/*
* If buffer is empty, or not enough to hold entire EOF marker,
* get more data.
*/
if (fio->_cnt == 0 || fio->_cnt < text_info->eof_len)
{
/*
* If num of bits not enough to hold EOF, move remainder
* to base of buffer and read in at base+remainder. Adjust
* pointers and counts accordingly.
*/
left = 0;
if (fio->_cnt > 0)
{
bitptr tptr;
left = fio->_cnt;
/*
* Move tail of data to the first word of the
* buffer (right justified).
*/
GET_BITS(tword, fio->_ptr, left);
SET_BPTR(tptr, fio->_base);
PUT_BITS(tptr, tword, left);
SET_BPTR(fio->_ptr, INC_BPTR(fio->_base, left));
}
else
fio->_ptr = fio->_base; /* reset _ptr */
zero = 0;
READBLK(ret, fio, (size_t)((uint64)fio->maxblksize >> 3),
stat, PARTIAL, &zero);
/*
* Add back in the 'extra' data
*/
fio->_ptr = fio->_base; /* reset _ptr */
fio->_cnt = fio->_cnt + left;
if (ret < (ssize_t)0)
return(ERR);
if (zero != 0)
ERETURN(stat, FDC_ERR_UBC, 0);
if (fio->_cnt == 0) /* must be at EOD */
{
return(setend(fio, stat));
}
}
METHODDEF boolean decode_mcu_DC_first(j_decompress_ptr cinfo, JBLOCKROW * MCU_data)
{
phuff_entropy_ptr entropy = (phuff_entropy_ptr) cinfo->entropy;
int Al = cinfo->Al;
register int s, r;
int blkn, ci;
JBLOCKROW block;
BITREAD_STATE_VARS;
savable_state state;
d_derived_tbl *tbl;
jpeg_component_info *compptr;
/* Process restart marker if needed; may have to suspend */
if(cinfo->restart_interval)
{
if(entropy->restarts_to_go == 0)
if(!process_restart(cinfo))
return FALSE;
}
/* Load up working state */
BITREAD_LOAD_STATE(cinfo, entropy->bitstate);
ASSIGN_STATE(state, entropy->saved);
/* Outer loop handles each block in the MCU */
for(blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++)
{
block = MCU_data[blkn];
ci = cinfo->MCU_membership[blkn];
compptr = cinfo->cur_comp_info[ci];
tbl = entropy->derived_tbls[compptr->dc_tbl_no];
/* Decode a single block's worth of coefficients */
/* Section F.2.2.1: decode the DC coefficient difference */
HUFF_DECODE(s, br_state, tbl, return FALSE, label1);
if(s)
{
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
}
/* Convert DC difference to actual value, update last_dc_val */
s += state.last_dc_val[ci];
state.last_dc_val[ci] = s;
/* Scale and output the DC coefficient (assumes jpeg_natural_order[0]=0) */
(*block)[0] = (JCOEF) (s << Al);
}
/* Completed MCU, so update state */
BITREAD_SAVE_STATE(cinfo, entropy->bitstate);
ASSIGN_STATE(entropy->saved, state);
/* Account for restart interval (no-op if not using restarts) */
entropy->restarts_to_go--;
return TRUE;
}
int recv_ntp_poco(struct katcp_dispatch *d, struct ntp_sensor_poco *nt)
{
struct ntp_message_poco buffer, *nm;
struct ntp_peer_poco *np;
int rr, i, good;
uint16_t word, field;
nm = &buffer;
rr = recv(nt->n_fd, nm, NTP_MAX_PACKET, MSG_DONTWAIT);
if(rr < 0){
switch(errno){
case EAGAIN :
case EINTR :
return 0;
default :
log_message_katcp(d, KATCP_LEVEL_ERROR, NULL, "ntp receive failed with %s", strerror(errno));
return -1;
}
}
if(rr < NTP_HEADER){
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp reply of %d bytes too short", rr);
return -1;
}
nm->n_bits = ntohs(nm->n_bits);
nm->n_sequence = ntohs(nm->n_sequence);
nm->n_status = ntohs(nm->n_status);
nm->n_id = ntohs(nm->n_id);
nm->n_offset = ntohs(nm->n_offset);
nm->n_count = ntohs(nm->n_count);
field = GET_BITS(nm->n_bits, NTP_VERSION_SHIFT, NTP_VERSION_MASK);
if(field != NTP_VERSION_THREE){
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp reply %d not version 3", field);
return -1;
}
field = GET_BITS(nm->n_bits, NTP_MODE_SHIFT, NTP_MODE_MASK);
if(field != NTP_MODE_CONTROL){
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp message not control but %d", field);
return -1;
}
field = GET_BITS(nm->n_bits, NTP_OPCODE_SHIFT, NTP_OPCODE_MASK);
if(field != NTP_OPCODE_STATUS){
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp opcode not status but %d", field);
return -1;
}
if(!(nm->n_bits & NTP_RESPONSE)){
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp reply is not a response");
return -1;
}
if(nm->n_bits & NTP_ERROR){
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp sent an error response");
return -1;
}
if(nm->n_sequence != nt->n_sequence){
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp received sequence number %d not %d", nm->n_sequence, nt->n_sequence);
return -1;
}
#ifdef DEBUG
fprintf(stderr, "status is 0x%04x\n", nm->n_status);
#endif
log_message_katcp(d, KATCP_LEVEL_TRACE, NULL, "ntp status word is 0x%04x", nm->n_status);
field = GET_BITS(nm->n_status, NTP_LEAPI_SHIFT, NTP_LEAPI_MASK);
switch(field){
case NTP_LEAPI_NOWARN :
case NTP_LEAPI_SIXTYONE :
case NTP_LEAPI_FIFTYNINE :
break;
default :
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp reports error status");
return -1;
}
field = GET_BITS(nm->n_status, NTP_CLOCKSRC_SHIFT, NTP_CLOCKSRC_MASK);
if(field != NTP_CLOCKSRC_NTPUDP){
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp synchronised by unsual means %d", field);
}
if(nm->n_count % 4) {
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp packet has odd length of %d", nm->n_count);
return -1;
}
if((nm->n_offset + nm->n_count) > NTP_MAX_DATA){
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp packet of %d and %d exceeds size limits", nm->n_offset, nm->n_count);
return -1;
}
good = 0;
for(i = 0; i < nm->n_count; i += 4){
np = (struct ntp_peer_poco *)(nm->n_data + i);
word = ntohs(np->p_status);
log_message_katcp(d, KATCP_LEVEL_TRACE, NULL, "ntp peer %d reports status 0x%x", ntohs(np->p_id), word);
field = GET_BITS(word, NTP_PEER_STATUS_SHIFT, NTP_PEER_STATUS_MASK);
if((field & (NTP_PEER_STATUS_CONFIGURED | NTP_PEER_STATUS_REACHABLE)) == (NTP_PEER_STATUS_CONFIGURED | NTP_PEER_STATUS_REACHABLE)){
field = GET_BITS(word, NTP_PEER_SELECT_SHIFT, NTP_PEER_SELECT_MASK);
switch(field){
case NTP_PEER_SELECT_FAR :
case NTP_PEER_SELECT_CLOSE :
good = 1;
break;
default :
break;
}
} else {
log_message_katcp(d, KATCP_LEVEL_WARN, NULL, "ntp peer %d either unreachable or unconfigured", ntohs(np->p_id));
}
}
return good;
}
/* update ELD information relevant for getting PCM info */
static int hdmi_update_lpcm_sad_eld (struct hda_codec *codec, hda_nid_t nid,
struct hdmi_eld *e, int size)
{
int i, j;
u32 val, sad_base;
struct cea_sad *a;
snd_printd(KERN_INFO "hdmi_update_lpcm_sad_eld\n");
val = hdmi_get_eld_byte(codec, nid, 0);
e->eld_ver = GET_BITS(val, 3, 5);
if (e->eld_ver != ELD_VER_CEA_861D &&
e->eld_ver != ELD_VER_PARTIAL) {
snd_printd(KERN_INFO "HDMI: Unknown ELD version %d\n",
e->eld_ver);
goto out_fail;
}
val = hdmi_get_eld_byte(codec, nid, 4);
sad_base = GET_BITS(val, 0, 5);
sad_base += ELD_FIXED_BYTES;
val = hdmi_get_eld_byte(codec, nid, 5);
e->sad_count = GET_BITS(val, 4, 4);
for (i = 0; i < e->sad_count; i++, sad_base += 3) {
if ((sad_base + 3) > size) {
snd_printd(KERN_INFO "HDMI: out of range SAD %d\n", i);
goto out_fail;
}
a = &e->sad[i];
val = hdmi_get_eld_byte(codec, nid, sad_base);
a->format = GET_BITS(val, 3, 4);
a->channels = GET_BITS(val, 0, 3);
a->channels++;
a->rates = 0;
a->sample_bits = 0;
a->max_bitrate = 0;
if (a->format != AUDIO_CODING_TYPE_LPCM)
continue;
val = hdmi_get_eld_byte(codec, nid, sad_base + 1);
val = GET_BITS(val, 0, 7);
for (j = 0; j < 7; j++)
if (val & (1 << j))
a->rates |= cea_sampling_frequencies[j + 1];
val = hdmi_get_eld_byte(codec, nid, sad_base + 2);
val = GET_BITS(val, 0, 3);
for (j = 0; j < 3; j++)
if (val & (1 << j))
a->sample_bits |= cea_sample_sizes[j + 1];
}
e->lpcm_sad_ready = 1;
return 0;
out_fail:
e->eld_ver = 0;
return -EINVAL;
}
static int sunxi_clk_factors_set_flat_facotrs(struct sunxi_clk_factors *factor,
struct clk_factors_value *values)
{
struct sunxi_clk_factors_config *config = factor->config;
u32 reg, tmp_factor_p, tmp_factor_m;
unsigned long flags = 0;
if(factor->lock)
spin_lock_irqsave(factor->lock, flags);
sunxi_clk_disable_plllock(factor);
/*get all factors from the regitsters*/
reg = factor_readl(factor,factor->reg);
tmp_factor_p = config->pwidth ? GET_BITS(config->pshift, config->pwidth, reg) : 0 ;
tmp_factor_m = config->mwidth ? GET_BITS(config->mshift, config->mwidth, reg) : 0 ;
/* 1).try to increase factor p first */
if(config->pwidth && (tmp_factor_p < values->factorp))
{
reg = factor_readl(factor, factor->reg);
reg = SET_BITS(config->pshift, config->pwidth, reg, values->factorp);
factor_writel(factor,reg, factor->reg);
if(factor->flags & CLK_RATE_FLAT_DELAY)
udelay(config->delay);
}
/* 2).try to increase factor m first */
if(config->mwidth && (tmp_factor_m < values->factorm))
{
reg = factor_readl(factor, factor->reg);
reg = SET_BITS( config->mshift, config->mwidth, reg, values->factorm );
factor_writel(factor, reg, factor->reg);
if(factor->flags & CLK_RATE_FLAT_DELAY)
udelay(config->delay);
}
/* 3. write factor n & k */
reg = factor_readl(factor, factor->reg);
if(config->nwidth)
reg = SET_BITS(config->nshift, config->nwidth, reg, values->factorn);
if(config->kwidth)
reg = SET_BITS(config->kshift, config->kwidth, reg, values->factork);
factor_writel(factor,reg, factor->reg);
/* 4. do pair things for 2). decease factor m */
if(config->mwidth && (tmp_factor_m > values->factorm))
{
reg = factor_readl(factor, factor->reg);
reg = SET_BITS(config->mshift, config->mwidth, reg, values->factorm);
factor_writel(factor, reg, factor->reg);
if( factor->flags & CLK_RATE_FLAT_DELAY)
udelay(config->delay);
}
/* 5. wait for PLL state stable */
if (sunxi_clk_is_lock(factor)) {
if(factor->lock)
spin_unlock_irqrestore(factor->lock, flags);
WARN(1, "clk %s wait lock timeout\n", factor->hw.clk->name);
return -1;
}
/*6.do pair things for 1). decease factor p */
if(config->pwidth && (tmp_factor_p > values->factorp))
{
reg = factor_readl(factor, factor->reg);
reg = SET_BITS(config->pshift, config->pwidth, reg, values->factorp);
factor_writel(factor,reg, factor->reg);
if(factor->flags & CLK_RATE_FLAT_DELAY)
udelay(config->delay);
}
if(factor->lock)
spin_unlock_irqrestore(factor->lock, flags);
return 0;
}
decode_mcu_slow (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
BITREAD_STATE_VARS;
int blkn;
savable_state state;
/* Outer loop handles each block in the MCU */
/* Load up working state */
BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
ASSIGN_STATE(state, entropy->saved);
for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
JBLOCKROW block = MCU_data ? MCU_data[blkn] : NULL;
d_derived_tbl * dctbl = entropy->dc_cur_tbls[blkn];
d_derived_tbl * actbl = entropy->ac_cur_tbls[blkn];
register int s, k, r;
/* Decode a single block's worth of coefficients */
/* Section F.2.2.1: decode the DC coefficient difference */
HUFF_DECODE(s, br_state, dctbl, return FALSE, label1);
if (s) {
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
}
if (entropy->dc_needed[blkn]) {
/* Convert DC difference to actual value, update last_dc_val */
int ci = cinfo->MCU_membership[blkn];
s += state.last_dc_val[ci];
state.last_dc_val[ci] = s;
if (block) {
/* Output the DC coefficient (assumes jpeg_natural_order[0] = 0) */
(*block)[0] = (JCOEF) s;
}
}
if (entropy->ac_needed[blkn] && block) {
/* Section F.2.2.2: decode the AC coefficients */
/* Since zeroes are skipped, output area must be cleared beforehand */
for (k = 1; k < DCTSIZE2; k++) {
HUFF_DECODE(s, br_state, actbl, return FALSE, label2);
r = s >> 4;
s &= 15;
if (s) {
k += r;
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
/* Output coefficient in natural (dezigzagged) order.
* Note: the extra entries in jpeg_natural_order[] will save us
* if k >= DCTSIZE2, which could happen if the data is corrupted.
*/
(*block)[jpeg_natural_order[k]] = (JCOEF) s;
} else {
if (r != 15)
break;
k += 15;
}
}
} else {
/* Section F.2.2.2: decode the AC coefficients */
/* In this path we just discard the values */
for (k = 1; k < DCTSIZE2; k++) {
int gpio_pin_state(int port) {
return ((GPIORegs[GET_BITS(port, 8, 5)].DAT & (1 << GET_BITS(port, 0, 3))) != 0);
}
int recv_ntp_poco(struct katcp_dispatch *d, struct ntp_sensor_poco *nt)
{
struct ntp_message_poco buffer, *nm;
struct ntp_peer_poco *np;
int rr, i;
unsigned int bytes, offset;
uint16_t word, field;
nm = &buffer;
rr = recv(nt->n_fd, nm, NTP_MAX_PACKET, MSG_DONTWAIT);
if(rr < 0){
switch(errno){
case EAGAIN :
case EINTR :
return 0;
default :
return -1;
}
}
if(rr < NTP_HEADER){
return -1;
}
nm->n_bits = ntohs(nm->n_bits);
nm->n_sequence = ntohs(nm->n_sequence);
nm->n_status = ntohs(nm->n_status);
nm->n_id = ntohs(nm->n_id);
nm->n_offset = ntohs(nm->n_offset);
nm->n_count = ntohs(nm->n_count);
field = GET_BITS(nm->n_bits, NTP_VERSION_SHIFT, NTP_VERSION_MASK);
if(field != NTP_VERSION_THREE){
fprintf(stderr, "not a version three message but %d\n", field);
return -1;
}
field = GET_BITS(nm->n_bits, NTP_MODE_SHIFT, NTP_MODE_MASK);
if(field != NTP_MODE_CONTROL){
fprintf(stderr, "message not control but %d\n", field);
return -1;
}
field = GET_BITS(nm->n_bits, NTP_OPCODE_SHIFT, NTP_OPCODE_MASK);
if(field != NTP_OPCODE_STATUS){
fprintf(stderr, "opcode not status but but %d\n", field);
return -1;
}
if(!(nm->n_bits & NTP_RESPONSE)){
#if 0
log_message_katcp(d, KATCP_LEVEL_INFO, NULL, "received ntp message which is not a response");
#endif
fprintf(stderr, "received a message which isn't a response\n");
return -1;
}
if(nm->n_bits & NTP_ERROR){
fprintf(stderr, "got an error response\n");
/* TODO ? */
}
if(nm->n_sequence != nt->n_sequence){
fprintf(stderr, "bad sequence number, expected %d, got %d\n", nt->n_sequence, nm->n_sequence);
return -1;
}
#ifdef DEBUG
fprintf(stderr, "status is 0x%04x\n", nm->n_status);
#endif
field = GET_BITS(nm->n_status, NTP_LEAPI_SHIFT, NTP_LEAPI_MASK);
fprintf(stderr, "leap indicator is 0x%x\n", field);
field = GET_BITS(nm->n_status, NTP_CLOCKSRC_SHIFT, NTP_CLOCKSRC_MASK);
fprintf(stderr, "clock source is 0x%x\n", field);
field = GET_BITS(nm->n_status, NTP_SYSEVTCNT_SHIFT, NTP_SYSEVTCNT_MASK);
fprintf(stderr, "got %d new system events\n", field);
field = GET_BITS(nm->n_status, NTP_SYSEVTCDE_SHIFT, NTP_SYSEVTCDE_MASK);
fprintf(stderr, "most recent code 0x%x ", field);
#ifdef DEBUG
fprintf(stderr, "got a further %u data bytes starting at %u\n", nm->n_count, nm->n_offset);
#endif
if(nm->n_count % 4) {
fprintf(stderr, "logic problem - packet data size not a multiple of 4\n");
return -1;
}
if((nm->n_offset + nm->n_count) > NTP_MAX_DATA){
fprintf(stderr, "logic problem - data field %u+%u too large\n", nm->n_offset, nm->n_count);
return -1;
}
for(i = 0; i < nm->n_count; i += 4){
np = (struct ntp_peer_poco *)(nm->n_data + i);
#ifdef DEBUG
fprintf(stderr, "peer id 0x%04x/%u\n", ntohs(np->p_id), ntohs(np->p_id));
#endif
word = ntohs(np->p_status);
field = GET_BITS(word, NTP_PEER_STATUS_SHIFT, NTP_PEER_STATUS_MASK);
#ifdef DEBUG
fprintf(stderr, " field=0x%04x", word);
#endif
#ifdef DEBUG
if(field & NTP_PEER_STATUS_CONFIGURED){
fprintf(stderr, " configured");
}
#endif
#ifdef DEBUG
if(field & NTP_PEER_STATUS_REACHABLE){
fprintf(stderr, " reachable");
}
#endif
field = GET_BITS(word, NTP_PEER_SELECT_SHIFT, NTP_PEER_SELECT_MASK);
switch(field){
case NTP_PEER_SELECT_REJECT :
#ifdef DEBUG
fprintf(stderr, " rejected");
#endif
break;
case NTP_PEER_SELECT_SANE :
#ifdef DEBUG
fprintf(stderr, " sane");
#endif
break;
case NTP_PEER_SELECT_CORRECT :
#ifdef DEBUG
fprintf(stderr, " correct");
#endif
break;
case NTP_PEER_SELECT_CANDIDATE :
#ifdef DEBUG
fprintf(stderr, " candidate");
#endif
break;
case NTP_PEER_SELECT_OUTLIER :
#ifdef DEBUG
fprintf(stderr, " outlier");
#endif
break;
case NTP_PEER_SELECT_FAR :
#ifdef DEBUG
fprintf(stderr, " far");
#endif
break;
case NTP_PEER_SELECT_CLOSE :
#ifdef DEBUG
fprintf(stderr, " close");
#endif
break;
}
#ifdef DEBUG
fprintf(stderr, "\n");
#endif
field = GET_BITS(word, NTP_PEER_EVTCNT_SHIFT, NTP_PEER_EVTCNT_MASK);
#ifdef DEBUG
fprintf(stderr, "%d events, ", field);
#endif
field = GET_BITS(word, NTP_PEER_EVTCDE_SHIFT, NTP_PEER_EVTCDE_MASK);
#ifdef DEBUG
fprintf(stderr, "last %d\n", field);
#endif
}
return 1;
}
void gpio_custom_io(int port, int bits) {
SET_REG(GPIO + GPIO_FSEL, ((GET_BITS(port, 8, 5) & GPIO_FSEL_MAJMASK) << GPIO_FSEL_MAJSHIFT)
| ((GET_BITS(port, 0, 3) & GPIO_FSEL_MINMASK) << GPIO_FSEL_MINSHIFT)
| ((bits & GPIO_FSEL_UMASK) << GPIO_FSEL_USHIFT));
}