static void rt2400pci_config_erp(struct rt2x00_dev *rt2x00dev,
struct rt2x00lib_erp *erp)
{
int preamble_mask;
u32 reg;
/*
* When short preamble is enabled, we should set bit 0x08
*/
preamble_mask = erp->short_preamble << 3;
rt2x00pci_register_read(rt2x00dev, TXCSR1, ®);
rt2x00_set_field32(®, TXCSR1_ACK_TIMEOUT,
erp->ack_timeout);
rt2x00_set_field32(®, TXCSR1_ACK_CONSUME_TIME,
erp->ack_consume_time);
rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
rt2x00pci_register_read(rt2x00dev, ARCSR2, ®);
rt2x00_set_field32(®, ARCSR2_SIGNAL, 0x00);
rt2x00_set_field32(®, ARCSR2_SERVICE, 0x04);
rt2x00_set_field32(®, ARCSR2_LENGTH, GET_DURATION(ACK_SIZE, 10));
rt2x00pci_register_write(rt2x00dev, ARCSR2, reg);
rt2x00pci_register_read(rt2x00dev, ARCSR3, ®);
rt2x00_set_field32(®, ARCSR3_SIGNAL, 0x01 | preamble_mask);
rt2x00_set_field32(®, ARCSR3_SERVICE, 0x04);
rt2x00_set_field32(®, ARCSR2_LENGTH, GET_DURATION(ACK_SIZE, 20));
rt2x00pci_register_write(rt2x00dev, ARCSR3, reg);
rt2x00pci_register_read(rt2x00dev, ARCSR4, ®);
rt2x00_set_field32(®, ARCSR4_SIGNAL, 0x02 | preamble_mask);
rt2x00_set_field32(®, ARCSR4_SERVICE, 0x04);
rt2x00_set_field32(®, ARCSR2_LENGTH, GET_DURATION(ACK_SIZE, 55));
rt2x00pci_register_write(rt2x00dev, ARCSR4, reg);
rt2x00pci_register_read(rt2x00dev, ARCSR5, ®);
rt2x00_set_field32(®, ARCSR5_SIGNAL, 0x03 | preamble_mask);
rt2x00_set_field32(®, ARCSR5_SERVICE, 0x84);
rt2x00_set_field32(®, ARCSR2_LENGTH, GET_DURATION(ACK_SIZE, 110));
rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);
rt2x00pci_register_write(rt2x00dev, ARCSR1, erp->basic_rates);
rt2x00pci_register_read(rt2x00dev, CSR11, ®);
rt2x00_set_field32(®, CSR11_SLOT_TIME, erp->slot_time);
rt2x00pci_register_write(rt2x00dev, CSR11, reg);
rt2x00pci_register_read(rt2x00dev, CSR18, ®);
rt2x00_set_field32(®, CSR18_SIFS, erp->sifs);
rt2x00_set_field32(®, CSR18_PIFS, erp->pifs);
rt2x00pci_register_write(rt2x00dev, CSR18, reg);
rt2x00pci_register_read(rt2x00dev, CSR19, ®);
rt2x00_set_field32(®, CSR19_DIFS, erp->difs);
rt2x00_set_field32(®, CSR19_EIFS, erp->eifs);
rt2x00pci_register_write(rt2x00dev, CSR19, reg);
}
static void rt2400pci_config_intf(struct rt2x00_dev *rt2x00dev,
struct rt2x00_intf *intf,
struct rt2x00intf_conf *conf,
const unsigned int flags)
{
unsigned int bcn_preload;
u32 reg;
if (flags & CONFIG_UPDATE_TYPE) {
/*
* Enable beacon config
*/
bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
rt2x00pci_register_read(rt2x00dev, BCNCSR1, ®);
rt2x00_set_field32(®, BCNCSR1_PRELOAD, bcn_preload);
rt2x00pci_register_write(rt2x00dev, BCNCSR1, reg);
/*
* Enable synchronisation.
*/
rt2x00pci_register_read(rt2x00dev, CSR14, ®);
rt2x00_set_field32(®, CSR14_TSF_COUNT, 1);
rt2x00_set_field32(®, CSR14_TSF_SYNC, conf->sync);
rt2x00_set_field32(®, CSR14_TBCN, 1);
rt2x00pci_register_write(rt2x00dev, CSR14, reg);
}
if (flags & CONFIG_UPDATE_MAC)
rt2x00pci_register_multiwrite(rt2x00dev, CSR3,
conf->mac, sizeof(conf->mac));
if (flags & CONFIG_UPDATE_BSSID)
rt2x00pci_register_multiwrite(rt2x00dev, CSR5,
conf->bssid, sizeof(conf->bssid));
}
static void rt2400pci_config_erp(struct rt2x00_dev *rt2x00dev,
struct rt2x00lib_erp *erp,
u32 changed)
{
int preamble_mask;
u32 reg;
/*
* When short preamble is enabled, we should set bit 0x08
*/
if (changed & BSS_CHANGED_ERP_PREAMBLE) {
preamble_mask = erp->short_preamble << 3;
rt2x00pci_register_read(rt2x00dev, TXCSR1, ®);
rt2x00_set_field32(®, TXCSR1_ACK_TIMEOUT, 0x1ff);
rt2x00_set_field32(®, TXCSR1_ACK_CONSUME_TIME, 0x13a);
rt2x00_set_field32(®, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);
rt2x00_set_field32(®, TXCSR1_AUTORESPONDER, 1);
rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
rt2x00pci_register_read(rt2x00dev, ARCSR2, ®);
rt2x00_set_field32(®, ARCSR2_SIGNAL, 0x00);
rt2x00_set_field32(®, ARCSR2_SERVICE, 0x04);
rt2x00_set_field32(®, ARCSR2_LENGTH,
GET_DURATION(ACK_SIZE, 10));
rt2x00pci_register_write(rt2x00dev, ARCSR2, reg);
rt2x00pci_register_read(rt2x00dev, ARCSR3, ®);
rt2x00_set_field32(®, ARCSR3_SIGNAL, 0x01 | preamble_mask);
rt2x00_set_field32(®, ARCSR3_SERVICE, 0x04);
rt2x00_set_field32(®, ARCSR2_LENGTH,
GET_DURATION(ACK_SIZE, 20));
rt2x00pci_register_write(rt2x00dev, ARCSR3, reg);
rt2x00pci_register_read(rt2x00dev, ARCSR4, ®);
rt2x00_set_field32(®, ARCSR4_SIGNAL, 0x02 | preamble_mask);
rt2x00_set_field32(®, ARCSR4_SERVICE, 0x04);
rt2x00_set_field32(®, ARCSR2_LENGTH,
GET_DURATION(ACK_SIZE, 55));
rt2x00pci_register_write(rt2x00dev, ARCSR4, reg);
rt2x00pci_register_read(rt2x00dev, ARCSR5, ®);
rt2x00_set_field32(®, ARCSR5_SIGNAL, 0x03 | preamble_mask);
rt2x00_set_field32(®, ARCSR5_SERVICE, 0x84);
rt2x00_set_field32(®, ARCSR2_LENGTH,
GET_DURATION(ACK_SIZE, 110));
rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);
}
if (changed & BSS_CHANGED_BASIC_RATES)
rt2x00pci_register_write(rt2x00dev, ARCSR1, erp->basic_rates);
if (changed & BSS_CHANGED_ERP_SLOT) {
rt2x00pci_register_read(rt2x00dev, CSR11, ®);
rt2x00_set_field32(®, CSR11_SLOT_TIME, erp->slot_time);
rt2x00pci_register_write(rt2x00dev, CSR11, reg);
rt2x00pci_register_read(rt2x00dev, CSR18, ®);
rt2x00_set_field32(®, CSR18_SIFS, erp->sifs);
rt2x00_set_field32(®, CSR18_PIFS, erp->pifs);
rt2x00pci_register_write(rt2x00dev, CSR18, reg);
rt2x00pci_register_read(rt2x00dev, CSR19, ®);
rt2x00_set_field32(®, CSR19_DIFS, erp->difs);
rt2x00_set_field32(®, CSR19_EIFS, erp->eifs);
rt2x00pci_register_write(rt2x00dev, CSR19, reg);
}
if (changed & BSS_CHANGED_BEACON_INT) {
rt2x00pci_register_read(rt2x00dev, CSR12, ®);
rt2x00_set_field32(®, CSR12_BEACON_INTERVAL,
erp->beacon_int * 16);
rt2x00_set_field32(®, CSR12_CFP_MAX_DURATION,
erp->beacon_int * 16);
rt2x00pci_register_write(rt2x00dev, CSR12, reg);
}
}
void test_pfunc(void)
{
struct timespec tb, te;
matlib_real dn;
START_TIMMING(tb);
matlib_index num_threads = 4;
pthpool_data_t mp[num_threads];
pthpool_create_threads(num_threads, mp);
/* define the domain */
matlib_real x_l = -5.0;
matlib_real x_r = 5.0;
matlib_index p = 1;
matlib_xv xi, quadW;
legendre_LGLdataLT1( p, TOL, &xi, &quadW);
matlib_index N = 10000;
matlib_xv x;
fem1d_ref2mesh (xi, N, x_l, x_r, &x);
debug_body("length of x: %d", x.len);
matlib_zv u_serial, u_parallel;
matlib_create_zv( x.len, &u_serial, MATLIB_COL_VECT);
matlib_create_zv( x.len, &u_parallel, MATLIB_COL_VECT);
GET_DURATION(tb, te, dn);
debug_print("Initialization time[msec]: %0.4f", dn);
START_TIMMING(tb);
serial_Gaussian(x, u_serial);
GET_DURATION(tb, te, dn);
debug_print("Serial time[msec]: %0.4f", dn);
void* param = {0};
matlib_index Np[2] = {x.len/num_threads, x.len};
void* shared_data[3] = { (void*) &x,
(void*) &u_parallel,
(void*) param};
START_TIMMING(tb);
pthpool_func( Np, shared_data, thfunc_Gaussian, num_threads, mp);
GET_DURATION(tb, te, dn);
debug_print("parallel time[msec]: %0.4f", dn);
matlib_real norm_actual = matlib_znrm2(u_serial);
matlib_zaxpy(-1.0, u_serial, u_parallel);
matlib_real e_relative = matlib_znrm2(u_parallel)/norm_actual;
debug_body("Relative error: % 0.16g", e_relative);
CU_ASSERT_TRUE(e_relative<TOL);
matlib_free(x.elem_p);
matlib_free(u_serial.elem_p);
matlib_free(u_parallel.elem_p);
debug_body("%s", "signal threads to exit!");
pthpool_destroy_threads(num_threads, mp);
}
List<Movement> Movement::ParseFrom(String fromString)
{
List<Movement> movements;
/// Tokenize.
List<String> parts = TokenizeIgnore(fromString, ",", "()");
for (int i = 0; i < parts.Size(); ++i)
{
String part = parts[i];
List<String> broken = part.Tokenize("()");
if (broken.Size() == 0)
{
LogMain("Empty movement pattern when parsing string '"+fromString+"'.", INFO);
continue;
}
String partPreParenthesis = broken[0];
partPreParenthesis.RemoveSurroundingWhitespaces();
Movement move;
move.type = -1;
for (int j = 0; j < Movement::TYPES; ++j)
{
String name = Movement::Name(j);
if (name == partPreParenthesis)
{
move.type = j;
break;
}
if (name == "n/a")
move.type = Movement::NONE;
}
if (move.type == -1)
{
String typesString;
for (int j = 0; j < Movement::TYPES; ++j)
{
typesString += "\n\t"+Movement::Name(j);
}
LogMain("Unrecognized movement pattern \'"+partPreParenthesis+"\' when parsing ship \'"+fromString+"\'. Available types are as follows: "+typesString, INFO);
continue;
}
// Add it and continue.
if (move.type == Movement::NONE)
{
movements.Add(move);
continue;
}
// Demand arguments depending on type?
if (broken.Size() < 2)
{
LogMain("Lacking arguments for movement pattern \'"+partPreParenthesis+"\' when parsing data for ship \'"+fromString+"\'.", INFO);
continue;
}
List<String> args = broken[1].Tokenize(",");
#define DEMAND_ARGS(a) if (args.Size() < a){ \
LogMain("Expected "+String(a)+" arguments for movement type \'"+\
Movement::Name(move.type)+"\', encountered "+String(args.Size())+".", INFO); \
continue;}
#define GET_DURATION(a) if (args[a] == "inf") move.durationMs = -1; else move.durationMs = args[a].ParseInt();
switch(move.type)
{
case Movement::STRAIGHT:
DEMAND_ARGS(1);
GET_DURATION(0);
break;
case Movement::ZAG:
DEMAND_ARGS(3);
move.vec.ParseFrom(args[0]);
move.zagTimeMs = args[1].ParseInt();
GET_DURATION(2);
break;
case Movement::MOVE_TO:
{
DEMAND_ARGS(2);
// Optionally parse some string for where to go.
String arg = args[0];
arg.RemoveSurroundingWhitespaces();
arg.SetComparisonMode(String::NOT_CASE_SENSITIVE);
if (arg == "upper edge")
{
move.location = Location::UPPER_EDGE;
}
else if (arg == "lower edge")
{
move.location = Location::LOWER_EDGE;
}
else if (arg == "center")
{
move.location = Location::CENTER;
}
else if (arg == "player")
{
move.location = Location::PLAYER;
}
else
{
move.vec.ParseFrom(args[0]);
move.location = Location::VECTOR;
}
GET_DURATION(1);
break;
}
case Movement::MOVE_DIR:
{
DEMAND_ARGS(2);
move.vec.ParseFrom(args[0]);
GET_DURATION(1);
break;
}
case Movement::CIRCLE:
{
DEMAND_ARGS(4);
move.target = args[0];
move.radius = args[1].ParseFloat();
move.clockwise = args[2].ParseBool();
GET_DURATION(3);
break;
}
case Movement::UP_N_DOWN:
{
DEMAND_ARGS(2);
move.distance = args[0].ParseFloat();
GET_DURATION(1);
break;
}
}
move.vec.Normalize();
movements.Add(move);
}
return movements;
};
