static int hi6402_read_saradc_value_detect(struct hi6402_mbhc_platform_data *pdata) { int retry = 3; int reg_value = 0; BUG_ON(NULL == pdata->p_irq); mutex_lock(&pdata->saradc_mutex); /* saradc on */ hi6402_reg_clr_bit(pdata->p_irq, HI6402_ANA_REG60, HI6402_SARADC_PD_BIT); /* start saradc */ hi6402_reg_set_bit(pdata->p_irq, HI6402_ANA_REG60, HI6402_SAR_START_BIT); while(retry--) { usleep_range(1000, 1100); if (check_saradc_value_ready_detect(pdata)) { reg_value = hi6402_irq_read(pdata->p_irq, HI6402_SARADC_VALUE_REG); pr_info("%s : saradc value is %#x\n", __FUNCTION__, reg_value); break; } } if (0 > retry) pr_err("%s : get saradc value err, set as 0\n", __FUNCTION__); /* end saradc */ hi6402_reg_clr_bit(pdata->p_irq, HI6402_ANA_REG60, HI6402_SAR_START_BIT); /* saradc pd */ hi6402_reg_set_bit(pdata->p_irq, HI6402_ANA_REG60, HI6402_SARADC_PD_BIT); mutex_unlock(&pdata->saradc_mutex); return GET_VOLTAGE(reg_value); }
void On_time_step(double pTime) //***************************** // The analysis at the given time has finished. DO NOT place further actions // on pins (unless they are delayed). Pins values are stable at this point. { LOGIC newData; // Do nothing if the log file could not be opened by the first instance if(!File) { return; } // Record the total elapsed simulation time for use in On_simulation_end() Total_time = pTime; // Since we're expecting a digital input, the input voltage should be either // 0, POWER(), or POWER()/2 to designate logic 0, 1, and UNKNOWN. To allow // for round off-errors or perhaps input passed though an analog RC filter, // the 0 to POWER() voltage range is divided into 3 equal sections. Input // voltages in the lower third are considered to be logic 0, the upper third // to be logic 1, and the middle third to be UNKNOWN. double voltage = GET_VOLTAGE(DATA); if(voltage < (1.0/3.0) * POWER()) { newData = 0; } else if(voltage > (2.0/3.0) * POWER()) { newData = 1; } else { newData = UNKNOWN; } // The first component to enter On_time_step(0) at the beginning of the // simulation is responsible for finishing the VCD header section. if(Log_time == -1 && pTime == 0) { Log_printf("$upscope $end\n"); Log_printf("$enddefinitions $end\n"); Log_time = 0; } // If the current state of the input pin is different from the previous // state in the last time step, then the new state needs to be logged if(newData != VAR(Log_data)) { char id = VAR(Instance_number) + MIN_ID; // If this component instance is the first to log something at the // current "pTime" then also write the current elapsed time to the file if(pTime > Log_time) { // The elapsed time (in seconds) is logged as an integer number of // nanoseconds. To avoid any floating point round off errors, the // fprintf() is used to round up the result to the closest integer // instead of using an integer cast. Log_printf("#%.0lf\n", pTime * TIME_MULT); Log_time = pTime; } // Write the new changed pin state to the log file if(newData == 0) { Log_printf("0%c\n", id); } else if(newData == 1) { Log_printf("1%c\n", id); } else { Log_printf("x%c\n", id); } VAR(Log_data) = newData; } }
/** * @param[in] m One pin define per call from iomux-mx23.h/iomux-mx28.h */ void imx_gpio_mode(uint32_t m) { uint32_t reg; unsigned gpio_pin, reg_offset; gpio_pin = GET_GPIO_NO(m); /* configure the pad to its function (always) */ reg_offset = calc_mux_reg(gpio_pin); reg = readl(IMX_IOMUXC_BASE + reg_offset) & ~(0x3 << ((gpio_pin % 16) << 1)); reg |= GET_FUNC(m) << ((gpio_pin % 16) << 1); writel(reg, IMX_IOMUXC_BASE + reg_offset); /* some pins are disabled when configured for GPIO */ if ((gpio_pin > MAX_GPIO_NO) && (GET_FUNC(m) == IS_GPIO)) { printf("Cannot configure pad %u to GPIO\n", gpio_pin); return; } if (SE_PRESENT(m)) { reg_offset = calc_strength_reg(gpio_pin); reg = readl(IMX_IOMUXC_BASE + reg_offset) & ~(0x3 << ((gpio_pin % 8) << 2)); reg |= GET_STRENGTH(m) << ((gpio_pin % 8) << 2); writel(reg, IMX_IOMUXC_BASE + reg_offset); } if (VE_PRESENT(m)) { reg_offset = calc_strength_reg(gpio_pin); if (GET_VOLTAGE(m) == 1) writel(0x1 << (((gpio_pin % 8) << 2) + 2), IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_SET); else writel(0x1 << (((gpio_pin % 8) << 2) + 2), IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_CLR); } if (PE_PRESENT(m)) { reg_offset = calc_pullup_reg(gpio_pin); writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset + (GET_PULLUP(m) == 1 ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR)); } if (BK_PRESENT(m)) { reg_offset = calc_pullup_reg(gpio_pin); writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset + (GET_BITKEEPER(m) == 1 ? STMP_OFFSET_REG_CLR : STMP_OFFSET_REG_SET)); } if (GET_FUNC(m) == IS_GPIO) { if (GET_GPIODIR(m) == 1) { /* first set the output value */ reg_offset = calc_output_reg(gpio_pin); writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset + (GET_GPIOVAL(m) == 1 ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR)); /* then the direction */ reg_offset = calc_output_enable_reg(gpio_pin); writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_SET); } else { /* then the direction */ reg_offset = calc_output_enable_reg(gpio_pin); writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_CLR); } } }