ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
};
/*
* For AB8505 Only some GPIOs are interrupt capable, and they are
* organized in discontiguous clusters:
*
* GPIO10 to GPIO11
* GPIO13
* GPIO40 and GPIO41
* GPIO50
* GPIO52 to GPIO53
*/
static struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = {
GPIO_IRQ_CLUSTER(10, 11, AB8500_INT_GPIO10R),
GPIO_IRQ_CLUSTER(13, 13, AB8500_INT_GPIO13R),
GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R),
GPIO_IRQ_CLUSTER(50, 50, AB9540_INT_GPIO50R),
GPIO_IRQ_CLUSTER(52, 53, AB9540_INT_GPIO52R),
};
static struct abx500_pinctrl_soc_data ab8505_soc = {
.gpio_ranges = ab8505_pinranges,
.gpio_num_ranges = ARRAY_SIZE(ab8505_pinranges),
.pins = ab8505_pins,
.npins = ARRAY_SIZE(ab8505_pins),
.functions = ab8505_functions,
.nfunctions = ARRAY_SIZE(ab8505_functions),
.groups = ab8505_groups,
.ngroups = ARRAY_SIZE(ab8505_groups),
* GPIOSEL7 - bit 0 and 6-7 are reserved
* special case with GPIO60, wich is located at offset 5 of gpiosel7
* don't know why it has been called GPIO60 in AB9540 datasheet,
* GPIO54 would be logical..., so at SOC point of view we consider
* GPIO60 = GPIO54
*/
ALTERNATE_FUNCTIONS(49, 0, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49 */
ALTERNATE_FUNCTIONS(50, 1, 2, UNUSED, 1, 0, 0), /* GPIO50, altA and altB controlled by bit 1 */
ALTERNATE_FUNCTIONS(51, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO51, altA controlled by bit 2 */
ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
ALTERNATE_FUNCTIONS(54, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO54 = GPIO60, altA controlled by bit 5 */
};
struct abx500_gpio_irq_cluster ab9540_gpio_irq_cluster[] = {
GPIO_IRQ_CLUSTER(10, 13, AB8500_INT_GPIO10R),
GPIO_IRQ_CLUSTER(24, 25, AB8500_INT_GPIO24R),
GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R),
GPIO_IRQ_CLUSTER(50, 54, AB9540_INT_GPIO50R),
};
static struct abx500_pinctrl_soc_data ab9540_soc = {
.gpio_ranges = ab9540_pinranges,
.gpio_num_ranges = ARRAY_SIZE(ab9540_pinranges),
.pins = ab9540_pins,
.npins = ARRAY_SIZE(ab9540_pins),
.functions = ab9540_functions,
.nfunctions = ARRAY_SIZE(ab9540_functions),
.groups = ab9540_groups,
.ngroups = ARRAY_SIZE(ab9540_groups),
.alternate_functions = ab9540alternate_functions,
ALTERNATE_FUNCTIONS(55, 6, UNUSED, UNUSED, 0, 0, 0), /* GPIO55, altA controlled by bit 6 */
ALTERNATE_FUNCTIONS(56, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO56, altA controlled by bit 7 */
};
static struct pullud ab8540_pullud = {
.first_pin = 51, /* GPIO1_VBAT */
.last_pin = 54, /* GPIO4_VBAT */
};
/*
* For AB8540 Only some GPIOs are interrupt capable:
* GPIO43 to GPIO44
* GPIO51 to GPIO54
*/
static struct abx500_gpio_irq_cluster ab8540_gpio_irq_cluster[] = {
GPIO_IRQ_CLUSTER(43, 43, AB8540_INT_GPIO43F),
GPIO_IRQ_CLUSTER(44, 44, AB8540_INT_GPIO44F),
GPIO_IRQ_CLUSTER(51, 54, AB9540_INT_GPIO51R),
};
static struct abx500_pinctrl_soc_data ab8540_soc = {
.gpio_ranges = ab8540_pinranges,
.gpio_num_ranges = ARRAY_SIZE(ab8540_pinranges),
.pins = ab8540_pins,
.npins = ARRAY_SIZE(ab8540_pins),
.functions = ab8540_functions,
.nfunctions = ARRAY_SIZE(ab8540_functions),
.groups = ab8540_groups,
.ngroups = ARRAY_SIZE(ab8540_groups),
.alternate_functions = ab8540_alternate_functions,
.pullud = &ab8540_pullud,
