Example #1
0
asmlinkage void __init
init_arch(int argc, char **argv, char **envp, int *prom_vec)
{
	/* Determine which MIPS variant we are running on. */
	unsigned int s;
#ifdef CONFIG_RTL865X
	char chipVersion[16]={0};
	int rev;
	GetChipVersion(chipVersion,sizeof(chipVersion), &rev);
	printk("************************************\n");
	printk("Powered by Realtek RTL%s SoC, rev %d\n",chipVersion, rev);
	printk("************************************\n");
#endif

#ifdef CONFIG_RTL8186
	printk("************************************\n");
	printk("Powered by Realtek RTL8186 SoC\n");
	printk("************************************\n");
#endif

	cpu_probe();

	prom_init(argc, argv, envp, prom_vec);

	cpu_report();

	/*
	 * Determine the mmu/cache attached to this machine,
	 * then flush the tlb and caches.  On the r4xx0
	 * variants this also sets CP0_WIRED to zero.
	 */
#ifdef CONFIG_RTL865X
	printk("Init MMU (16 entries)\n");
#endif
	load_mmu();

	/* Disable coprocessors and set FPU for 16/32 FPR register model */
	clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
	set_c0_status(ST0_CU0);

	start_kernel();
}
Example #2
0
int32 swNic_setup(uint32 pkthdrs, uint32 mbufs, uint32 txpkthdrs)
{
	struct rtl_pktHdr *freePkthdrListHead,*freePkthdrListTail;
	struct rtl_mBuf *freeMbufListHead, *freeMbufListTail;
	int i;
	 /* Disable Rx & Tx ,bus burst size, etc */
	swNic_txRxSwitch(0,0);

#ifdef SWNIC_EARLYSTOP
	nicRxEarlyStop=0;
#endif
	/* Initialize index of Tx pkthdr descriptor */
	txDoneIndex = 0;
	txFreeIndex = 0;

	/* Allocate rx pkthdrs */
	if(pkthdrs!=mBuf_driverGetPkthdr(pkthdrs, &freePkthdrListHead, &freePkthdrListTail)){
		rtlglue_printf("Can't allocate all pkthdrs\n");
		return EINVAL;
	}
	assert(freePkthdrListHead);
	assert(freePkthdrListTail);
	/* Allocate rx mbufs and clusters */
	if(mbufs!=mBuf_driverGet(mbufs, &freeMbufListHead, &freeMbufListTail)){
		rtlglue_printf("Can't allocate all mbuf/clusters\n");
		return EINVAL;
	}
	assert(freeMbufListHead);
	assert(freeMbufListTail);
    /////////////////////////////////////////////////	
    /* Initialize Tx packet header descriptors */
    for (i=0; i<txpkthdrs; i++)
        TxPkthdrRing[i] = DESC_RISC_OWNED;

    /* Set wrap bit of the last descriptor */
    TxPkthdrRing[txpkthdrs - 1] |= DESC_WRAP;

    /* Fill Tx packet header FDP */
    REG32(CPUTPDCR) = (uint32) TxPkthdrRing;
	
    /////////////////////////////////////////////////	
    /* Initialize index of current Rx pkthdr descriptor */
    rxPhdrIndex = 0;
    /* Initialize Rx packet header descriptors */
    for (i=0; i<pkthdrs; i++)
    {
        assert( freePkthdrListHead );
        RxPkthdrRing[i] = (uint32) freePkthdrListHead | DESC_SWCORE_OWNED;
        if ( (freePkthdrListHead = freePkthdrListHead->ph_nextHdr) == NULL )
            freePkthdrListTail = NULL;
    }
    /* Set wrap bit of the last descriptor */
    RxPkthdrRing[pkthdrs - 1] |= DESC_WRAP;
    /* Fill Rx packet header FDP */
    REG32(CPURPDCR) = (uint32) RxPkthdrRing;

    /////////////////////////////////////////////////	
    /* Initialize index of current Rx pkthdr descriptor */
    rxMbufIndex = 0;
    /* Initialize Rx mbuf descriptors */
    for (i=0; i<mbufs; i++)
    {
        assert( freeMbufListHead );
        RxMbufRing[i] = (uint32) freeMbufListHead | DESC_SWCORE_OWNED;
#ifndef CONFIG_RTL865X_CACHED_NETWORK_IO
		freeMbufListHead->m_extbuf=(uint8 *)UNCACHE(freeMbufListHead->m_extbuf);
		freeMbufListHead->m_data=(uint8 *)UNCACHE(freeMbufListHead->m_data);
#endif

#if defined(CONFIG_RTL865X_MBUF_HEADROOM)&&defined(CONFIG_RTL865X_MULTILAYER_BSP)
		if(mBuf_reserve(freeMbufListHead, CONFIG_RTL865X_MBUF_HEADROOM))
			rtlglue_printf("Failed when init Rx %d\n", i);
#endif
        if ( (freeMbufListHead = freeMbufListHead->m_next) == NULL )
            freeMbufListTail = NULL;
    }
    /* Set wrap bit of the last descriptor */
    RxMbufRing[mbufs - 1] |= DESC_WRAP;

    /* Fill Rx mbuf FDP */
	REG32(CPURMDCR) = (uint32) RxMbufRing;
	REG32(CPUICR) =0;

#ifdef CONFIG_RTL865XB
	{
		char chipVersion[16];
		uint32 align=0;

		REG32(CPUICR)|=EXCLUDE_CRC;
		GetChipVersion(chipVersion, sizeof(chipVersion), NULL);
		if(chipVersion[strlen(chipVersion)-1]=='B')
		{
			//865xB chips support free Rx align from 0~256 bytes
			#ifdef SWNIC_RX_ALIGNED_IPHDR					
			align+=2;
			#endif
			REG32(CPUICR)|=align; 
			rtlglue_printf("Rx shift=%x\n",REG32(CPUICR));
		}
	}
#endif

    /* Enable Rx & Tx. Config bus burst size and mbuf size. */
    REG32(CPUICR) |= BUSBURST_32WORDS | MBUF_2048BYTES;
    REG32(CPUIIMR) |= LINK_CHANG_IE;
	swNic_txRxSwitch(1,1);
    return SUCCESS;

}