void Form_Warning_Timer(void *ptmr, void *parg) { LPWindow lpWindow = (LPWindow)parg; static u32 Error_Status_Temp=0; if(lpWindow != NULL) { gSysStatus = Get_Device_Status(); if(Error_Status_Temp != gSysStatus) //µ±´íÎó·¢Éú±ä»¯ { Error_Status_Temp = gSysStatus; } Device_status(); PostWindowMsg(lpWindow, WM_UPDATECTRL, (uint32)&mWarningAttr, 0); } }
//*********************************************************************** // // This routine implements reads to virtualized configuration space. // // NOTES: // 1) Misaligned accesses are handled. If an access crosses a DWORD // boundary, only the bytes within the addressed DWORD are read. // The remaining bytes return FFs. // 2) The variable Pci points to a PCI_HEADER_ENTRY entry that defines // the state and characteristics of the register being read. //*********************************************************************** ULONG pascal Virtual_PCI_Read_Handler(USHORT PCI_Address) { ULONG Data; register PCI_HEADER_ENTRY * Pci; // Get ptr to virtualized table entry Pci = Get_Structure(PCI_Address); switch ((USHORT)Pci) { case UNIMPLEMENTED_FUNCTION: Data = 0xFFFFFFFF; break; case UNIMPLEMENTED_REGISTER: Data = 0x00000000; break; default: // Handle special cases if (Pci->Flag & EPCI_R && AlignedReg < 0x40) { // Embedded PCI device: read its h/w PCI configuration space Data = Read_EPCI(AlignedReg); if (AlignedReg == COMMAND) { // Mark device '66 MHz capable' Data |= PCI_66MHZ_CAPABLE; } break; } Data = Pci->Value; switch (AlignedReg) { case COMMAND: // Get device's Status Data |= Get_Device_Status(Pci); break; case BAR0: case BAR1: case BAR2: case BAR3: case BAR4: case BAR5: // If I/O BAR, set bit 0 if (Pci->Flag & IO_BAR) { Data |= 1; } break; case CACHE_LINE: Pci->LatencyTimer = Get_Latency(Pci); Data = Pci->Value; break; #if SUPPORT_CAPABILITIES case (PCI_PM_REG+4): // 0x44 if (Pci->Flag & PCI_PM) { Data = Handle_PCI_PM_Rd(Pci); break; } case USBLEGCTLSTS: if (Pci->Flag & PCI_EHCI) { Data = Handle_EHCI_Rd(Pci); break; } #endif // Thor ATA vendor-specific registers: case IDE_CFG: // 0x40 case IDE_DTC: // 0x48 case IDE_CAST: // 0x4C case IDE_ETC: // 0x50 if (Pci->LBar) { ULONG MsrAddr = ATA_Error; (USHORT)MsrAddr = (USHORT)Pci->LBar; Data = Read_MSR_LO(MsrAddr); } break; } } // Handle non-dword aligned accesses Data >>= Shift; Data |= 0xFFFFFFFFL << (32-Shift); return Data; }
BOOL Net_Send_Wave(void *buf) { static uint8 cnt = 0; static char *pbuf; static BOOL reset_flag = TRUE; static char *pSysParmBuf = NULL; uint8 err; TaskMsg msg = {0}; uint32 device_value = Get_Device_Status(); uint32 len = 0; if((buf == NULL) || (debug_buf == NULL))return FALSE; if(pWaveMem == NULL) return FALSE; if(cnt == 0) { pbuf = (char *)SysMemGet(pWaveMem, &err); if((err != SYS_ERR_NONE) || (pbuf == NULL)) { debug(Debug_Notify, "Wave mem allocated failed! %d\r\n", err); return FALSE; } memset(pbuf, 0, WaveSize); Build_NetData_Pack(pbuf, 321, Net_Data_Wet); } memcpy(pbuf + 7 + cnt*20, buf, 16); memcpy(pbuf + 7 + cnt*20 + 16, (u8 *)&device_value, 4); //第一包参数数据 if(reset_flag) { //该指针开机只使用一次 pSysParmBuf = (char *)SysMemGet(pWaveMem, &err); if(pSysParmBuf != NULL) { Send_SysParm_Info(pSysParmBuf); } reset_flag = FALSE; } cnt++; if(cnt >= 16) { cnt = 0; memset(debug_buf, 0, 128); len = debug_get_info(debug_buf); //如果有调试信息, 发送调试信息 if(len > 0) { msg.msg_id = Msg_NetDebug; msg.msg_ctx = (u32)debug_buf; msg.msg_len = len; err = Task_QPost(&NetMsgQ, &msg); } //波形数据包 msg.msg_id = Msg_NetSend; msg.msg_ctx = (u32)pbuf; msg.msg_len = 327; err = Task_QPost(&NetMsgQ, &msg); if(err != SYS_ERR_NONE) { Wave_Mem_Free(pbuf); debug(Debug_Warning, "NetSendPost failed!\r\n"); return FALSE; } } return TRUE; }