Example #1
0
AGESA_STATUS
NbInitAtPost (
  IN      AMD_CONFIG_PARAMS   *StdHeader
  )
{
  AGESA_STATUS          Status;
  AGESA_STATUS          AgesaStatus;
  GNB_PLATFORM_CONFIG   Gnb;
  UINT32                NumberOfSockets;
  UINT32                SocketId;
  AgesaStatus = AGESA_SUCCESS;
  IDS_HDT_CONSOLE (GNB_TRACE, "NbInitAtPost Enter\n");
  NbAllocateConfigData (StdHeader, &Gnb);
  NumberOfSockets = GnbGetNumberOfSockets (StdHeader);
  for (SocketId = 0; SocketId < NumberOfSockets; SocketId++) {
    UINT32  NumberOfSilicons;
    UINT32  SiliconId;
    if (!GnbIsDevicePresentInSocket (SocketId, StdHeader)) {
      continue;
    }
    NumberOfSilicons = GnbGetNumberOfSiliconsOnSocket (SocketId, StdHeader);
    for (SiliconId = 0; SiliconId < NumberOfSilicons; SiliconId++) {
      Gnb.GnbPciAddress = GnbGetPciAddress (SocketId, SiliconId, StdHeader);
      Status = GnbSetTom (Gnb.GnbPciAddress, StdHeader);
      AGESA_STATUS_UPDATE (Status, AgesaStatus);
      ASSERT (Status == AGESA_SUCCESS);
    }
  }
  IDS_HDT_CONSOLE (GNB_TRACE, "NbInitAtPost Exit[0x%x]\n", AgesaStatus);
  return  AgesaStatus;
}
Example #2
0
/**
 * Performs Gnb Recovery related initialization at the recovery entry point
 *
 * This function processes the MSR and PCI register tables.
 *
 *
 * @param[in]    StdHeader    global state, input data
 *
 * @retval       AGESA_SUCCESS  Always succeeds.
 *
 */
AGESA_STATUS
AmdGnbRecovery (
  IN       AMD_CONFIG_PARAMS *StdHeader
  )
{
  PCI_ADDR  NbPciAddress;
  NbPciAddress.AddressValue = MAKE_SBDFO (0, 0, 0, 0, 0);
  NbInitOnPowerOnRecovery (NbPciAddress, StdHeader);
  GnbSetTom (NbPciAddress, StdHeader);
  return AGESA_SUCCESS;
}
Example #3
0
AGESA_STATUS
GnbPostInterfaceTN (
  IN      AMD_CONFIG_PARAMS               *StdHeader
  )
{
  AGESA_STATUS     Status;
  PCI_ADDR         GnbAddress;
  IDS_HDT_CONSOLE (GNB_TRACE, "GnbPostInterfaceTN Enter\n");
  GnbAddress.AddressValue = MAKE_SBDFO (0, 0, 0, 0, 0);
  Status = GnbSetTom (GnbAddress, StdHeader);
  IDS_HDT_CONSOLE (GNB_TRACE, "GnbPostInterfaceTN Exit [0x%x]\n", Status);
  return  Status;
}
Example #4
0
AGESA_STATUS
GnbEnvInterfaceTN (
  IN      AMD_CONFIG_PARAMS               *StdHeader
  )
{
  AGESA_STATUS                   Status;
  AMD_ENV_PARAMS                 *EnvParamsPtr;
  UINT32                         Property;
  GNB_HANDLE                     *GnbHandle;
  D18F5x170_STRUCT               D18F5x170;
  D0F0xBC_x1F8DC_STRUCT          D0F0xBC_x1F8DC;
  PP_FUSE_ARRAY                  *PpFuseArray;

  IDS_HDT_CONSOLE (GNB_TRACE, "GnbEnvInterfaceTN Enter\n");
  Property = TABLE_PROPERTY_DEFAULT;
  EnvParamsPtr = (AMD_ENV_PARAMS *) StdHeader;
  GnbHandle = GnbGetHandle (StdHeader);
  ASSERT (GnbHandle != NULL);
  GnbLoadFuseTableTN (StdHeader);
  Status = GnbSetTom (GnbGetHostPciAddress (GnbHandle), StdHeader);
  GnbOrbDynamicWake (GnbGetHostPciAddress (GnbHandle), StdHeader);
  GnbClumpUnitIdV4 (GnbHandle, StdHeader);
  GnbLpcDmaDeadlockPreventionV4 (GnbHandle, StdHeader);
  Property |= GnbBuildOptionsTN.CfgLoadlineEnable ? TABLE_PROPERTY_LOADLINE_ENABLE : 0;

  if (!EnvParamsPtr->GnbEnvConfiguration.IommuSupport) {
    Property |= TABLE_PROPERTY_IOMMU_DISABLED;
  } else {
    // Force disable iommu if non-FM2
    // PACKAGE_TYPE_FP2    1
    // PACKAGE_TYPE_FS1r2  2
    // PACKAGE_TYPE_FM2    4
    if (LibAmdGetPackageType (StdHeader) != PACKAGE_TYPE_FM2) {
      EnvParamsPtr->GnbEnvConfiguration.IommuSupport = FALSE;
      Property |= TABLE_PROPERTY_IOMMU_DISABLED;
    } else {
      Property |= GnbBuildOptionsTN.GnbCommonOptions.CfgIommuL1ClockGatingEnable ? TABLE_PROPERTY_IOMMU_L1_CLOCK_GATING : 0;
      Property |= GnbBuildOptionsTN.GnbCommonOptions.CfgIommuL2ClockGatingEnable ? TABLE_PROPERTY_IOMMU_L2_CLOCK_GATING : 0;
    }
  }

  if (GnbBuildOptionsTN.CfgNbdpmEnable) {
    GnbRegisterReadTN (
      TYPE_D18F5,
      D18F5x170_ADDRESS,
      &D18F5x170.Value,
      0,
      StdHeader
    );
    // Check if NbPstate enable
    if ((D18F5x170.Field.SwNbPstateLoDis != 1) && (D18F5x170.Field.NbPstateMaxVal != 0)) {
      Property |= TABLE_PROPERTY_NBDPM;
      PpFuseArray = GnbLocateHeapBuffer (AMD_PP_FUSE_TABLE_HANDLE, StdHeader);
      if (PpFuseArray != NULL) {
        // NBDPM is requesting SclkVid0 from the register.
        // Write them back if SclkVid has been changed in PpFuseArray.
        GnbRegisterReadTN (D0F0xBC_x1F8DC_TYPE, D0F0xBC_x1F8DC_ADDRESS, &D0F0xBC_x1F8DC.Value, 0, StdHeader);
        if ((D0F0xBC_x1F8DC.Field.SClkVid0 != PpFuseArray->SclkVid[0]) ||
            (D0F0xBC_x1F8DC.Field.SClkVid1 != PpFuseArray->SclkVid[1]) ||
            (D0F0xBC_x1F8DC.Field.SClkVid2 != PpFuseArray->SclkVid[2]) ||
            (D0F0xBC_x1F8DC.Field.SClkVid3 != PpFuseArray->SclkVid[3])) {
          D0F0xBC_x1F8DC.Field.SClkVid0 = PpFuseArray->SclkVid[0];
          D0F0xBC_x1F8DC.Field.SClkVid1 = PpFuseArray->SclkVid[1];
          D0F0xBC_x1F8DC.Field.SClkVid2 = PpFuseArray->SclkVid[2];
          D0F0xBC_x1F8DC.Field.SClkVid3 = PpFuseArray->SclkVid[3];
          GnbRegisterWriteTN (D0F0xBC_x1F8DC_TYPE, D0F0xBC_x1F8DC_ADDRESS, &D0F0xBC_x1F8DC.Value, GNB_REG_ACC_FLAG_S3SAVE, StdHeader);
        }
      }
    }
  }

  IDS_OPTION_HOOK (IDS_GNB_PROPERTY, &Property, StdHeader);

  Status = GnbProcessTable (
             GnbHandle,
             GnbEnvInitTableTN,
             Property,
             GNB_TABLE_FLAGS_FORCE_S3_SAVE,
             StdHeader
             );
  IDS_HDT_CONSOLE (GNB_TRACE, "GnbEnvInterfaceTN Exit [0x%x]\n", Status);
  return  Status;
}