// GPIO interrupts are configured as: // // level up interrupt on // ----- -- ------------ // 0 0 Falling Edge // 0 1 Rising Edge // 0 -1 Either Edge // 1 0 Low level // 1 1 High level // void hal_interrupt_configure(int vector, int level, int up) { int shift, ival = 0; if (vector < CYGNUM_HAL_ISR_MIN || CYGNUM_HAL_ISR_MAX < vector) return; #if CYGNUM_HAL_ISR_MAX > CYGNUM_HAL_VAR_ISR_MAX if (vector > CYGNUM_HAL_VAR_ISR_MAX) { HAL_PLF_INTERRUPT_CONFIGURE(vector, level, up); return; } #endif if (level) { ival = up ? 0 : 1 ; } else { if (up == 0) ival = 3; else if (up == 1) ival = 2; else if (up == -1) ival = 4; } if (vector == CYGNUM_HAL_INTERRUPT_GPIO0 || vector == CYGNUM_HAL_INTERRUPT_GPIO1) { vector -= CYGNUM_HAL_INTERRUPT_GPIO0; shift = vector * 3; *IXP425_GPIT1R = (*IXP425_GPIT1R & ~(7 << shift)) | (ival << shift); *IXP425_GPISR |= (1 << vector); return; } if (vector >= CYGNUM_HAL_INTERRUPT_GPIO2 && vector <= CYGNUM_HAL_INTERRUPT_GPIO7) { vector = vector - CYGNUM_HAL_INTERRUPT_GPIO2 + 2; shift = vector * 3; *IXP425_GPIT1R = (*IXP425_GPIT1R & ~(7 << shift)) | (ival << shift); *IXP425_GPISR |= (1 << vector); return; } if (vector >= CYGNUM_HAL_INTERRUPT_GPIO8 && vector <= CYGNUM_HAL_INTERRUPT_GPIO12) { vector -= CYGNUM_HAL_INTERRUPT_GPIO8; shift = vector * 3; *IXP425_GPIT2R = (*IXP425_GPIT2R & ~(7 << shift)) | (ival << shift); *IXP425_GPISR |= (1 << vector); return; } }
// Note: These functions are only [well] defined for "external" interrupts externC void hal_ppc40x_interrupt_configure(int vector, int level, int dir) { #ifndef HAL_PLF_INTERRUPT_CONFIGURE cyg_uint32 mask, new_state, iocr; if ((vector >= CYGNUM_HAL_INTERRUPT_IRQ0) && (vector <= CYGNUM_HAL_INTERRUPT_IRQ6)) { mask = (1<<(31-(vector-CYGNUM_HAL_INTERRUPT_405_BASE))); // Set polarity if (dir) { // High true new_state = mask; } else { // Low true new_state = 0; } CYGARC_MFDCR(DCR_UIC0_PR, iocr); iocr = (iocr & ~mask) | new_state; CYGARC_MTDCR(DCR_UIC0_PR, iocr); // Set edge/level if (level == 0) { // Edge triggered new_state = mask; } else { // Level triggered new_state = 0; } CYGARC_MFDCR(DCR_UIC0_TR, iocr); iocr = (iocr & ~mask) | new_state; CYGARC_MTDCR(DCR_UIC0_TR, iocr); } #else HAL_PLF_INTERRUPT_CONFIGURE(vector, level, dir); #endif }