bool hsi_is_hst_port_busy(struct hsi_port *pport)
{
unsigned int port = pport->port_number;
void __iomem *base = pport->hsi_controller->base;
u32 txstateval;
txstateval = hsi_inl(base, HSI_HST_TXSTATE_REG(port)) &
HSI_HST_TXSTATE_VAL_MASK;
if (txstateval != HSI_HST_TXSTATE_IDLE) {
dev_dbg(pport->hsi_controller->dev, "HST port %d busy, "
"TXSTATE=%d\n", port, txstateval);
return true;
}
return false;
}
/**
* hsi_ioctl - HSI I/O control
* @dev - hsi device channel reference to apply the I/O control
* (or port associated to it)
* @command - HSI I/O control command
* @arg - parameter associated to the control command. NULL, if no parameter.
*
* Return 0 on success, a negative value on failure.
*
*/
int hsi_ioctl(struct hsi_device *dev, unsigned int command, void *arg)
{
struct hsi_channel *ch;
struct hsi_dev *hsi_ctrl;
struct hsi_port *pport;
void __iomem *base;
unsigned int port, channel;
u32 acwake;
int err = 0;
int fifo = 0;
if (unlikely((!dev) ||
(!dev->ch) ||
(!dev->ch->hsi_port) ||
(!dev->ch->hsi_port->hsi_controller)) ||
(!(dev->ch->flags & HSI_CH_OPEN))) {
pr_err(LOG_NAME "HSI IOCTL Invalid parameter\n");
return -EINVAL;
}
ch = dev->ch;
pport = ch->hsi_port;
hsi_ctrl = ch->hsi_port->hsi_controller;
port = ch->hsi_port->port_number;
channel = ch->channel_number;
base = hsi_ctrl->base;
dev_dbg(dev->device.parent, "IOCTL: ch %d, command %d\n",
channel, command);
spin_lock_bh(&hsi_ctrl->lock);
hsi_clocks_enable_channel(dev->device.parent, channel, __func__);
switch (command) {
case HSI_IOCTL_ACWAKE_UP:
if (ch->flags & HSI_CH_ACWAKE) {
dev_dbg(dev->device.parent, "Duplicate ACWAKE UP\n");
err = -EPERM;
goto out;
}
/* Wake up request to Modem (typically OMAP initiated) */
/* Symetrical disable will be done in HSI_IOCTL_ACWAKE_DOWN */
ch->flags |= HSI_CH_ACWAKE;
pport->acwake_status |= BIT(channel);
/* We only claim once the wake line per channel */
acwake = hsi_inl(base, HSI_SYS_WAKE_REG(port));
if (!(acwake & HSI_WAKE(channel))) {
hsi_outl(HSI_SET_WAKE(channel), base,
HSI_SYS_SET_WAKE_REG(port));
}
goto out;
break;
case HSI_IOCTL_ACWAKE_DOWN:
/* Low power request initiation (OMAP initiated, typically */
/* following inactivity timeout) */
/* ACPU HSI block shall still be capable of receiving */
if (!(ch->flags & HSI_CH_ACWAKE)) {
dev_dbg(dev->device.parent, "Duplicate ACWAKE DOWN\n");
err = -EPERM;
goto out;
}
acwake = hsi_inl(base, HSI_SYS_WAKE_REG(port));
if (unlikely(pport->acwake_status !=
(acwake & HSI_WAKE_MASK))) {
dev_warn(dev->device.parent,
"ACWAKE shadow register mismatch"
" acwake_status: 0x%x, HSI_SYS_WAKE_REG: 0x%x",
pport->acwake_status, acwake);
pport->acwake_status = acwake & HSI_WAKE_MASK;
}
/* SSI_TODO: add safety check for SSI also */
ch->flags &= ~HSI_CH_ACWAKE;
pport->acwake_status &= ~BIT(channel);
/* Release the wake line per channel */
if ((acwake & HSI_WAKE(channel))) {
hsi_outl(HSI_CLEAR_WAKE(channel), base,
HSI_SYS_CLEAR_WAKE_REG(port));
}
goto out;
break;
case HSI_IOCTL_SEND_BREAK:
hsi_outl(1, base, HSI_HST_BREAK_REG(port));
/*HSI_TODO : need to deactivate clock after BREAK frames sent*/
/*Use interrupt ? (if TX BREAK INT exists)*/
break;
case HSI_IOCTL_GET_ACWAKE:
if (!arg) {
err = -EINVAL;
goto out;
}
*(u32 *)arg = hsi_inl(base, HSI_SYS_WAKE_REG(port));
break;
case HSI_IOCTL_FLUSH_RX:
hsi_outl(0, base, HSI_HSR_RXSTATE_REG(port));
break;
case HSI_IOCTL_FLUSH_TX:
hsi_outl(0, base, HSI_HST_TXSTATE_REG(port));
break;
case HSI_IOCTL_GET_CAWAKE:
if (!arg) {
err = -EINVAL;
goto out;
}
err = hsi_get_cawake(dev->ch->hsi_port);
if (err < 0) {
err = -ENODEV;
goto out;
}
*(u32 *)arg = err;
break;
case HSI_IOCTL_SET_RX:
if (!arg) {
err = -EINVAL;
goto out;
}
err = hsi_set_rx(dev->ch->hsi_port, (struct hsr_ctx *)arg);
break;
case HSI_IOCTL_GET_RX:
if (!arg) {
err = -EINVAL;
goto out;
}
hsi_get_rx(dev->ch->hsi_port, (struct hsr_ctx *)arg);
break;
case HSI_IOCTL_SET_TX:
if (!arg) {
err = -EINVAL;
goto out;
}
err = hsi_set_tx(dev->ch->hsi_port, (struct hst_ctx *)arg);
break;
case HSI_IOCTL_GET_TX:
if (!arg) {
err = -EINVAL;
goto out;
}
hsi_get_tx(dev->ch->hsi_port, (struct hst_ctx *)arg);
break;
case HSI_IOCTL_SW_RESET:
dev_info(dev->device.parent, "SW Reset\n");
err = hsi_softreset(hsi_ctrl);
/* Reset HSI config to default */
hsi_softreset_driver(hsi_ctrl);
break;
case HSI_IOCTL_GET_FIFO_OCCUPANCY:
if (!arg) {
err = -EINVAL;
goto out;
}
fifo = hsi_fifo_get_id(hsi_ctrl, channel, port);
if (unlikely(fifo < 0)) {
dev_err(hsi_ctrl->dev, "No valid FIFO id found for "
"channel %d.\n", channel);
err = -EFAULT;
goto out;
}
*(size_t *)arg = hsi_get_rx_fifo_occupancy(hsi_ctrl, fifo);
break;
default:
err = -ENOIOCTLCMD;
break;
}
out:
/* All IOCTL end by disabling the clocks, except ACWAKE high. */
hsi_clocks_disable_channel(dev->device.parent, channel, __func__);
spin_unlock_bh(&hsi_ctrl->lock);
return err;
}
static int hsi_debug_port_show(struct seq_file *m, void *p)
{
struct hsi_port *hsi_port = m->private;
struct hsi_dev *hsi_ctrl = hsi_port->hsi_controller;
void __iomem *base = hsi_ctrl->base;
unsigned int port = hsi_port->port_number;
int ch, fifo;
long buff_offset;
struct platform_device *pdev = to_platform_device(hsi_ctrl->dev);
hsi_clocks_enable(hsi_ctrl->dev, __func__);
if (hsi_port->cawake_gpio >= 0)
seq_printf(m, "CAWAKE\t\t: %d\n", hsi_get_cawake(hsi_port));
seq_printf(m, "WAKE\t\t: 0x%08x\n",
hsi_inl(base, HSI_SYS_WAKE_REG(port)));
seq_printf(m, "MPU_ENABLE_IRQ%d\t: 0x%08x\n", hsi_port->n_irq,
hsi_inl(base,
HSI_SYS_MPU_ENABLE_REG(port, hsi_port->n_irq)));
seq_printf(m, "MPU_STATUS_IRQ%d\t: 0x%08x\n", hsi_port->n_irq,
hsi_inl(base,
HSI_SYS_MPU_STATUS_REG(port, hsi_port->n_irq)));
if (hsi_driver_device_is_hsi(pdev)) {
seq_printf(m, "MPU_U_ENABLE_IRQ%d\t: 0x%08x\n",
hsi_port->n_irq,
hsi_inl(base, HSI_SYS_MPU_U_ENABLE_REG(port,
hsi_port->n_irq)));
seq_printf(m, "MPU_U_STATUS_IRQ%d\t: 0x%08x\n", hsi_port->n_irq,
hsi_inl(base,
HSI_SYS_MPU_U_STATUS_REG(port,
hsi_port->n_irq)));
}
/* HST */
seq_printf(m, "\nHST\n===\n");
seq_printf(m, "MODE\t\t: 0x%08x\n",
hsi_inl(base, HSI_HST_MODE_REG(port)));
seq_printf(m, "FRAMESIZE\t: 0x%08x\n",
hsi_inl(base, HSI_HST_FRAMESIZE_REG(port)));
seq_printf(m, "DIVISOR\t\t: 0x%08x\n",
hsi_inl(base, HSI_HST_DIVISOR_REG(port)));
seq_printf(m, "CHANNELS\t: 0x%08x\n",
hsi_inl(base, HSI_HST_CHANNELS_REG(port)));
seq_printf(m, "ARBMODE\t\t: 0x%08x\n",
hsi_inl(base, HSI_HST_ARBMODE_REG(port)));
seq_printf(m, "TXSTATE\t\t: 0x%08x\n",
hsi_inl(base, HSI_HST_TXSTATE_REG(port)));
if (hsi_driver_device_is_hsi(pdev)) {
seq_printf(m, "BUFSTATE P1\t: 0x%08x\n",
hsi_inl(base, HSI_HST_BUFSTATE_REG(1)));
seq_printf(m, "BUFSTATE P2\t: 0x%08x\n",
hsi_inl(base, HSI_HST_BUFSTATE_REG(2)));
} else {
seq_printf(m, "BUFSTATE\t: 0x%08x\n",
hsi_inl(base, HSI_HST_BUFSTATE_REG(port)));
}
seq_printf(m, "BREAK\t\t: 0x%08x\n",
hsi_inl(base, HSI_HST_BREAK_REG(port)));
for (ch = 0; ch < 8; ch++) {
buff_offset = hsi_hst_buffer_reg(hsi_ctrl, port, ch);
if (buff_offset >= 0)
seq_printf(m, "BUFFER_CH%d\t: 0x%08x\n", ch,
hsi_inl(base, buff_offset));
}
if (hsi_driver_device_is_hsi(pdev)) {
for (fifo = 0; fifo < HSI_HST_FIFO_COUNT; fifo++) {
seq_printf(m, "FIFO MAPPING%d\t: 0x%08x\n", fifo,
hsi_inl(base,
HSI_HST_MAPPING_FIFO_REG(fifo)));
}
}
/* HSR */
seq_printf(m, "\nHSR\n===\n");
seq_printf(m, "MODE\t\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_MODE_REG(port)));
seq_printf(m, "FRAMESIZE\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_FRAMESIZE_REG(port)));
seq_printf(m, "CHANNELS\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_CHANNELS_REG(port)));
seq_printf(m, "COUNTERS\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_COUNTERS_REG(port)));
seq_printf(m, "RXSTATE\t\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_RXSTATE_REG(port)));
if (hsi_driver_device_is_hsi(pdev)) {
seq_printf(m, "BUFSTATE P1\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_BUFSTATE_REG(1)));
seq_printf(m, "BUFSTATE P2\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_BUFSTATE_REG(2)));
} else {
seq_printf(m, "BUFSTATE\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_BUFSTATE_REG(port)));
}
seq_printf(m, "BREAK\t\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_BREAK_REG(port)));
seq_printf(m, "ERROR\t\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_ERROR_REG(port)));
seq_printf(m, "ERRORACK\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_ERRORACK_REG(port)));
for (ch = 0; ch < 8; ch++) {
buff_offset = hsi_hsr_buffer_reg(hsi_ctrl, port, ch);
if (buff_offset >= 0)
seq_printf(m, "BUFFER_CH%d\t: 0x%08x\n", ch,
hsi_inl(base, buff_offset));
}
if (hsi_driver_device_is_hsi(pdev)) {
for (fifo = 0; fifo < HSI_HSR_FIFO_COUNT; fifo++) {
seq_printf(m, "FIFO MAPPING%d\t: 0x%08x\n", fifo,
hsi_inl(base,
HSI_HSR_MAPPING_FIFO_REG(fifo)));
}
seq_printf(m, "DLL\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_DLL_REG));
seq_printf(m, "DIVISOR\t: 0x%08x\n",
hsi_inl(base, HSI_HSR_DIVISOR_REG(port)));
}
hsi_clocks_disable(hsi_ctrl->dev, __func__);
return 0;
}
