/**
* @brief Main program.
* @param None
* @retval None
*/
int main(void)
{
/*!< At this stage the microcontroller clock setting is already configured,
this is done through SystemInit() function which is called from startup
file (startup_stm32f0xx.s) before to branch to application main.
To reconfigure the default setting of SystemInit() function, refer to
system_stm32f0xx.c file
*/
/* I2S peripheral Configuration */
I2S_Config();
/* Enable the Tamper button */
STM_EVAL_PBInit(BUTTON_TAMPER, BUTTON_MODE_GPIO);
/* Initialize the LEDs */
STM_EVAL_LEDInit(LED3);
STM_EVAL_LEDInit(LED1);
#if defined (I2S_MASTER_TRANSMITTER)
while (STM_EVAL_PBGetState(BUTTON_TAMPER) != RESET)
{}
/* Enable the I2S1 TX Interrupt */
SPI_I2S_ITConfig(SPI1, SPI_I2S_IT_TXE, ENABLE);
/* Enable the I2S */
I2S_Cmd(SPI1, ENABLE);
while(TxIdx < 32);
#elif defined (I2S_SLAVE_RECEIVER)
/* Enable the I2S1 RXNE Interrupt */
SPI_I2S_ITConfig(SPI1, SPI_I2S_IT_RXNE, ENABLE);
/* Enable the I2S */
I2S_Cmd(SPI1, ENABLE);
/* Wait the end of communication */
while (RxIdx < 32);
/* Check if the data transmitted from Master Board and received by
Slave Board are the same */
TransferStatus = Buffercmp(I2S_Buffer_Rx, (uint16_t*)I2S_Buffer_Tx, 32);
if (TransferStatus == PASSED) /* successful transfer */
{
/* Green Led On */
STM_EVAL_LEDOn(LED1);
STM_EVAL_LEDOff(LED3);
}
else /* unsuccessful transfer */
{
/* Red Led On */
STM_EVAL_LEDOn(LED3);
STM_EVAL_LEDOff(LED1);
}
#endif
/* Infinite loop */
while (1)
{}
}
/*******************************************************************************
* Function Name : Speaker_Timer_Config
* Description : Configure and enable the timer
* Input : None.
* Return : None.
*******************************************************************************/
void Speaker_Config(void)
{
#ifdef USE_STM3210B_EVAL
GPIO_InitTypeDef GPIO_InitStructure;
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
/* Configure PB.08 as alternate function (TIM4_OC3) */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* TIM4 configuration */
TIM_TimeBaseStructure.TIM_Prescaler = 0x00; /* TIM4CLK = 72 MHz */
TIM_TimeBaseStructure.TIM_Period = 0xFF; /* PWM frequency : 281.250KHz*/
TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
/* TIM4's Channel3 in PWM1 mode */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_Pulse = 0x7F; /* Duty cycle: 50%*/
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; /* set high polarity */
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OC3Init(TIM4, &TIM_OCInitStructure);
TIM_OC3PreloadConfig(TIM4, TIM_OCPreload_Enable);
/* TIM2 configuration */
TIM_TimeBaseStructure.TIM_Period = TIM2ARRValue;
TIM_TimeBaseStructure.TIM_Prescaler = 0x00; /* TIM2CLK = 72 MHz */
TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
/* Output Compare Inactive Mode configuration: Channel1 */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Timing;
TIM_OCInitStructure.TIM_Pulse = 0x0;
TIM_OC1Init(TIM2, &TIM_OCInitStructure);
TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Disable);
/* Start TIM4 */
TIM_Cmd(TIM4, ENABLE);
/* Start TIM2 */
TIM_Cmd(TIM2, ENABLE);
/* Enable TIM2 update interrupt */
TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
#else
/* Configure the initializatin parameters */
I2S_GPIO_Config();
I2S_Config(I2S_Standard_Phillips, I2S_MCLKOutput_Enable, I2S_AudioFreq_22k);
CODEC_Config(OutputDevice_SPEAKER, I2S_Standard_Phillips, I2S_MCLKOutput_Enable, 0x08);
SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, ENABLE);
#endif
}
/*******************************************************************************
* Function Name : Speaker_Config
* Description : Configure and enable the I2S and the codec
* Input : None.
* Return : None.
*******************************************************************************/
void Speaker_Config(void)
{
/* Configure the I2S peripheral */
I2S_Config();
/* Configure the initializatin parameters */
CODEC_Config(OutputDevice_AUTO, I2S_Standard_Phillips, I2S_MCLKOutput_Enable, AUDIO_STREAMING_VOLUME);
/* Enable the DMA Clock for I2S transfers */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
}
void I2S_RxInit(I2S_Type *base, const i2s_config_t *config)
{
uint32_t cfg = 0U;
uint32_t trig = 0U;
FLEXCOMM_Init(base, FLEXCOMM_PERIPH_I2S_RX);
I2S_Config(base, config);
/* Configure FIFO */
cfg |= I2S_FIFOCFG_ENABLERX(1U); /* enable RX FIFO */
cfg |= I2S_FIFOCFG_EMPTYRX(1U); /* empty RX FIFO */
cfg |= I2S_FIFOCFG_PACK48(config->pack48); /* set pack 48-bit format or not */
trig |= I2S_FIFOTRIG_RXLVLENA(1U); /* enable RX FIFO trigger */
trig |= I2S_FIFOTRIG_RXLVL(config->watermark); /* set RX FIFO trigger level */
base->FIFOCFG = cfg;
base->FIFOTRIG = trig;
}
void I2S_TxInit(I2S_Type *base, const i2s_config_t *config)
{
uint32_t cfg = 0U;
uint32_t trig = 0U;
FLEXCOMM_Init(base, FLEXCOMM_PERIPH_I2S_TX);
I2S_Config(base, config);
/* Configure FIFO */
cfg |= I2S_FIFOCFG_ENABLETX(1U); /* enable TX FIFO */
cfg |= I2S_FIFOCFG_EMPTYTX(1U); /* empty TX FIFO */
cfg |= I2S_FIFOCFG_TXI2SE0(config->txEmptyZero); /* transmit zero when buffer becomes empty or last item */
cfg |= I2S_FIFOCFG_PACK48(config->pack48); /* set pack 48-bit format or not */
trig |= I2S_FIFOTRIG_TXLVLENA(1U); /* enable TX FIFO trigger */
trig |= I2S_FIFOTRIG_TXLVL(config->watermark); /* set TX FIFO trigger level */
base->FIFOCFG = cfg;
base->FIFOTRIG = trig;
}
/*******************************************************************************
* Function Name : I2S_CODEC_Init
* Description : Initializes the I2S audio codec according parameters configured
* by I2S_CODEC_Config function.
* Input : - OutputDevice: Could be OutoutDevice_SPEAKER or
* OutoutDevice_HEADPHONE.
* - Address: Specifies the location of the audio file in the memory.
* Output : None
* Return : - 0: if all initializations are OK.
* - 1: if memory initialization failed (LD2 is turned on).
* - 2: if audio file initialization failed (LD2 is turned on).
* - 3: if Codec initialization failed (LD1 is turned on).
*******************************************************************************/
uint32_t I2S_CODEC_Init(uint32_t OutputDevice, uint32_t Address)
{
uint32_t count = 0;
/* Set the audio file address */
AudioFileAddress = (uint32_t) Address;
/* Configure the I2S2, I2C1 and GPIOF pins */
I2S_GPIO_Config();
/* Read the Audio file to extract the audio data length and frequency */
errorcode = AudioFile_Init();
if (errorcode < 3)
{
/* Turn on LD2 connected to PF.07 */
return errorcode;
}
/* Configure the SPI2 peripheral in I2S mode */
I2S_Config(I2S_STANDARD, I2S_MCLKOUTPUT, i2saudiofreq);
printf("\n\r i2saudiofreq: 0x%dHz ", i2saudiofreq);
/* Set the current output device */
CurrentOutputDevice = OutputDevice;
/* Codec Configuration via I2C interface */
count = CODEC_Config(OutputDevice, I2S_Standard_MSB, I2S_MCLKOUTPUT, DEFAULT_VOL);
if (count != 0)
{
/* Turn on LD1 connected to PF.06 */
return 3;
}
/* Turn on LD4 connected to PF.09 */
return 0; /* Configuration is OK */
}
void Audio_Init(uint32_t samplefreq)
{
I2S_MODEConf_Type I2S_ClkConfig;
I2S_CFG_Type I2S_ConfigStruct;
Audio_Reset_Data_Buffer();
NVIC_DisableIRQ(I2SIRQ);
switch(samplefreq){
case 11025:
case 22050:
case 44100:
audio_buffer_size = 1764;
break;
case 8000:
case 16000:
case 32000:
case 48000:
default:
audio_buffer_size = samplefreq * 4 * AUDIO_MAX_PC / 1000;
break;
}
/* Reset UDA1380 on board Hitex */
// scu_pinmux(8,2,MD_PUP, FUNC0);
// GPIO_SetDir(4, 1<<2, 1);
// GPIO_ClearValue(4, 1<<2);
/* Initialize I2S peripheral ------------------------------------*/
/* Init I2C */
I2C_Init(LPC_I2C, 100000);
/* Enable Slave I2C operation */
I2C_Cmd(LPC_I2C, ENABLE);
/* Init UDA1380 CODEC */
UDA1380_init();
/* Initialize I2S peripheral ------------------------------------*/
scu_pinmux(6,0, MD_PUP, 4); // I2S_RX_SCK
scu_pinmux(6,1, MD_PUP, 3); // I2S_RX_WS
scu_pinmux(6,2, MD_PUP, 3); // I2S_RX_SDA
scu_pinmux(3,0, MD_PUP, 2); // I2S_TX_SCK
scu_pinmux(3,1, MD_PUP, 0); // I2S_TX_WS
scu_pinmux(3,2, MD_PUP, 0); // I2S_TX_SDA
I2S_Init(I2S);
/* setup:
* - wordwidth: 16 bits
* - stereo mode
* - master mode for I2S_TX
* - Frequency = 44.1 kHz
*/
/* Audio Config*/
I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
I2S_ConfigStruct.mono = I2S_STEREO;
I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
I2S_Config(I2S,I2S_TX_MODE,&I2S_ConfigStruct);
/* Clock Mode Config*/
I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
I2S_ModeConfig(I2S,&I2S_ClkConfig,I2S_TX_MODE);
I2S_FreqConfig(I2S, samplefreq, I2S_TX_MODE);
I2S_Stop(I2S, I2S_TX_MODE);
/* TX FIFO depth is 4 */
I2S_IRQConfig(I2S,I2S_TX_MODE,I2S_TX_LEVEL);
I2S_IRQCmd(I2S,I2S_TX_MODE,ENABLE);
I2S_Start(I2S);
NVIC_EnableIRQ(I2SIRQ);
}
void initTX(unsigned int freq, uint32_t txblock, uint32_t rxblock) {
//Set I2S pins
PINSEL_CFG_Type PinCfg;
I2S_CFG_Type I2S_ConfigStruct;
I2S_MODEConf_Type I2S_ClkConfig;
PinCfg.Portnum = PINSEL_PORT_0;
PinCfg.Funcnum = PINSEL_FUNC_1;
PinCfg.OpenDrain = PINSEL_PINMODE_NORMAL;
PinCfg.Pinmode = PINSEL_PINMODE_TRISTATE;
PinCfg.Pinnum = PINSEL_PIN_4; // P0.4 as I2SRX_CLK
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = PINSEL_PIN_5; // P0.5 as I2SRX_WS
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = PINSEL_PIN_6; // P0.6 as I2SRX_SDA
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = PINSEL_PIN_7; // P0.7 as I2STX_CLK
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = PINSEL_PIN_8; // P0.8 as I2STX_WS
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = PINSEL_PIN_9; // P0.9 as I2STX_SDA
PINSEL_ConfigPin(&PinCfg);
PinCfg.Portnum = PINSEL_PORT_4;
PinCfg.Pinnum = PINSEL_PIN_29;
PINSEL_ConfigPin(&PinCfg);
/* I2S init */
I2S_Init(LPC_I2S);
I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
I2S_ConfigStruct.mono = I2S_STEREO;
I2S_ConfigStruct.stop = I2S_STOP_DISABLE;
I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
I2S_Config(LPC_I2S, I2S_TX_MODE, &I2S_ConfigStruct);
I2S_Config(LPC_I2S, I2S_RX_MODE, &I2S_ConfigStruct);
I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
I2S_ClkConfig.mcena = I2S_MCLK_ENABLE;
I2S_ModeConfig(LPC_I2S, &I2S_ClkConfig, I2S_TX_MODE);
I2S_ClkConfig.clksel = I2S_CLKSEL_MCLK;
I2S_ModeConfig(LPC_I2S, &I2S_ClkConfig, I2S_RX_MODE);
//Setup I2S clocks
uint8_t x = 14;
uint8_t y = 31;
uint8_t divider = 2;
LPC_SC->PCONP |= (0x01 << 27); // turn on I2S peripheral
LPC_SC->PCLKSEL1 &= (~(0x03 << 22));
if (divider == 1)
LPC_SC->PCLKSEL1 |= (0x01 << 22);
else if (divider == 2)
LPC_SC->PCLKSEL1 |= (0x02 << 22);
else if (divider == 4)
LPC_SC->PCLKSEL1 |= (0x00 << 22);
else if (divider == 8)
LPC_SC->PCLKSEL1 |= (0x03 << 22);
LPC_I2S->I2STXRATE = (x << 8) | y;
LPC_I2S->I2SRXRATE = (x << 8) | y;
uint32_t peripheralClock = SystemCoreClock / divider;
uint32_t masterClock = (x * peripheralClock) / (2 * y);
uint32_t bitClock = 16 * 44100 * 2;
uint8_t bitDivider = masterClock / bitClock;
LPC_I2S->I2STXBITRATE = bitDivider - 1;
LPC_I2S->I2SRXBITRATE = bitDivider - 1;
initI2SDMA(txblock, rxblock);
I2S_Start(LPC_I2S);
}
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/*!< At this stage the microcontroller clock setting is already configured,
this is done through SystemInit() function which is called from startup
files (startup_stm32f40_41xxx.s/startup_stm32f427_437xx.s/startup_stm32f429_439xx.s)
before to branch to application main.
*/
/* I2S configuration -------------------------------------------------------*/
I2S_Config();
/* SysTick configuration ---------------------------------------------------*/
SysTickConfig();
/* LEDs configuration ------------------------------------------------------*/
STM_EVAL_LEDInit(LED1);
STM_EVAL_LEDInit(LED2);
STM_EVAL_LEDInit(LED3);
STM_EVAL_LEDInit(LED4);
#ifdef I2S_MASTER
/* Master full Duplex configuration ----------------------------------------*/
/* Clear the Rx Master Buffer */
Fill_Buffer((uint8_t*)aRxMasterBuffer, (TX_MASTER_BUFFERSIZE*2));
/* Configure I2Sx in Master Transmitter Mode */
I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx;
I2S_Init(I2Sx, &I2S_InitStructure);
/* Configure the I2Sx_ext (the second instance) in Slave Receiver Mode */
I2S_FullDuplexConfig(I2Sxext, &I2S_InitStructure);
/* Enable the I2Sx peripheral */
I2S_Cmd(I2Sx, ENABLE);
/* Enable the I2Sx_ext peripheral for Full Duplex mode */
I2S_Cmd(I2Sxext, ENABLE);
/* Master full Duplex Communication ----------------------------------------*/
/* Communication Full Duplex Started */
ubBufferCounter = 0;
while ((ubBufferCounter != TX_MASTER_BUFFERSIZE))
{
/* Data to transmitted through I2Sx SD pin */
while (SPI_I2S_GetFlagStatus(I2Sx, SPI_I2S_FLAG_TXE ) != SET);
SPI_I2S_SendData(I2Sx, aTxMasterBuffer[ubBufferCounter]);
/* Data Received through I2Sx_ext SD pin */
while (SPI_I2S_GetFlagStatus(I2Sxext, SPI_I2S_FLAG_RXNE ) != SET);
aRxMasterBuffer[ubBufferCounter] = SPI_I2S_ReceiveData(I2Sxext);
ubBufferCounter++;
}
/* Communication Full Duplex Finished */
I2S_Cmd(I2Sx, DISABLE);
I2S_Cmd(I2Sxext, DISABLE);
/* Check Communication Result ----------------------------------------------*/
if (Buffercmp((uint8_t*)aRxMasterBuffer, (uint8_t*)aTxSlaveBuffer, (TX_SLAVE_BUFFERSIZE*2)) != FAILED)
{
/* Turn ON LED2 and LED4 */
STM_EVAL_LEDOn(LED2);
STM_EVAL_LEDOn(LED4);
}
#endif /* I2S_MASTER */
#ifdef I2S_SLAVE
/* Slave full Duplex configuration ----------------------------------------*/
/* Clear the RxBuffer */
Fill_Buffer((uint8_t*)aRxSlaveBuffer, (TX_SLAVE_BUFFERSIZE*2));
/* Configure I2Sx in Slave Receiver Mode */
I2S_InitStructure.I2S_Mode = I2S_Mode_SlaveRx;
I2S_Init(I2Sx, &I2S_InitStructure);
/* Configure the I2Sx_ext (the second instance) in Slave Transmitter Mode */
I2S_FullDuplexConfig(I2Sxext, &I2S_InitStructure);
/* Enable the I2Sx_ext peripheral for Full Duplex mode */
I2S_Cmd(I2Sxext, ENABLE);
/* Enable the I2Sx peripheral */
I2S_Cmd(I2Sx, ENABLE);
/* Slave full Duplex Communication -----------------------------------------*/
/* Communication Full Duplex Started */
ubBufferCounter = 0;
while ((ubBufferCounter != TX_SLAVE_BUFFERSIZE) )
{
/* Data to transmitted through I2Sx_ext SD pin */
while (SPI_I2S_GetFlagStatus(I2Sxext, SPI_I2S_FLAG_TXE ) != SET);
SPI_I2S_SendData(I2Sxext, aTxSlaveBuffer[ubBufferCounter]);
/* Data Received through I2Sx SD pin */
while (SPI_I2S_GetFlagStatus(I2Sx, SPI_I2S_FLAG_RXNE ) != SET);
aRxSlaveBuffer[ubBufferCounter] = SPI_I2S_ReceiveData(I2Sx);
ubBufferCounter++;
}
/* Communication full duplex Finished */
I2S_Cmd(I2Sx, DISABLE);
I2S_Cmd(I2Sxext, DISABLE);
/* Check Communication Results ---------------------------------------------*/
if (Buffercmp((uint8_t*)aRxSlaveBuffer, (uint8_t*)aTxMasterBuffer, (TX_SLAVE_BUFFERSIZE*2)) != FAILED)
{
/* Turn ON LED3 */
STM_EVAL_LEDOn(LED3);
}
#endif /* I2S_SLAVE */
while(1)
{
}
}
/*********************************************************************//**
* @brief c_entry: Main program body
* @param[in] None
* @return int
**********************************************************************/
int c_entry (void) { /* Main Program */
I2S_MODEConf_Type I2S_ClkConfig;
I2S_CFG_Type I2S_ConfigStruct;
PINSEL_CFG_Type PinCfg;
uint32_t i;
/* Initialize debug via UART0
* – 115200bps
* – 8 data bit
* – No parity
* – 1 stop bit
* – No flow control
*/
debug_frmwrk_init();
//print menu screen
print_menu();
/* Initialize I2S peripheral ------------------------------------*/
/* Pin configuration:
* Assign: - P0.4 as I2SRX_CLK
* - P0.5 as I2SRX_WS
* - P0.6 as I2SRX_SDA
* - P0.7 as I2STX_CLK
* - P0.8 as I2STX_WS
* - P0.9 as I2STX_SDA
*/
PinCfg.Funcnum = 1;
PinCfg.OpenDrain = 0;
PinCfg.Pinmode = 0;
PinCfg.Pinnum = 4;
PinCfg.Portnum = 0;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 5;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 6;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 7;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 8;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 9;
PINSEL_ConfigPin(&PinCfg);
Buffer_Init();
I2S_Init(LPC_I2S);
/* setup:
* - wordwidth: 16 bits
* - stereo mode
* - master mode for I2S_TX and slave for I2S_RX
* - ws_halfperiod is 31
* - not use mute mode
* - use reset and stop mode
* - select the fractional rate divider clock output as the source,
* - disable 4-pin mode
* - MCLK ouput is disable
* - Frequency = 44.1 kHz
* Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
* I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
* --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
*/
/* Audio Config*/
I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
I2S_ConfigStruct.mono = I2S_STEREO;
I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
/* Clock Mode Config*/
I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
I2S_SetBitRate(LPC_I2S, 0, I2S_RX_MODE);
I2S_Stop(LPC_I2S, I2S_TX_MODE);
I2S_Stop(LPC_I2S, I2S_RX_MODE);
NVIC_EnableIRQ(I2S_IRQn);
/* RX FIFO depth is 1, TX FIFO depth is 8. */
I2S_IRQConfig(LPC_I2S,I2S_TX_MODE,8);
I2S_IRQConfig(LPC_I2S,I2S_RX_MODE,1);
I2S_IRQCmd(LPC_I2S,I2S_RX_MODE,ENABLE);
I2S_Start(LPC_I2S);
/* I2S transmit ---------------------------------------------------*/
while ( I2SWriteLength < BUFFER_SIZE )
{
while(I2S_GetLevel(LPC_I2S, I2S_TX_MODE)==TXFIFO_FULL);
I2S_Send(LPC_I2S, I2STXBuffer[I2SWriteLength++]);
}
I2STXDone = 1;
/* Wait for transmit/receive complete */
while ( !I2SRXDone || !I2STXDone );
for(i=0;i<BUFFER_SIZE;i++)
{
_DBH32(I2SRXBuffer[i]);_DBG_("");
}
/* Verify RX and TX Buffer */
if(Buffer_Verify())
{
_DBG_("Verify Buffer: OK...");
}
else
{
_DBG_("Verify Buffer: ERROR...");
}
return 0;
}
/*********************************************************************//**
* @brief Main I2S program body
**********************************************************************/
int c_entry (void) { /* Main Program */
uint32_t i;
uint8_t ch;
uint8_t dummy=0;
I2S_MODEConf_Type I2S_ClkConfig;
I2S_CFG_Type I2S_ConfigStruct;
I2S_PinCFG_Type I2S_PinStruct;
// DeInit NVIC and SCBNVIC
NVIC_DeInit();
NVIC_SCBDeInit();
/* Configure the NVIC Preemption Priority Bits:
* two (2) bits of preemption priority, six (6) bits of sub-priority.
* Since the Number of Bits used for Priority Levels is five (5), so the
* actual bit number of sub-priority is three (3)
*/
NVIC_SetPriorityGrouping(0x05);
// Set Vector table offset value
#if (__RAM_MODE__==1)
NVIC_SetVTOR(0x10000000);
#else
NVIC_SetVTOR(0x00000000);
#endif
NVIC_SetPriorityGrouping(0x06);
debug_frmwrk_init();
print_menu();
_DBG_("Press '1' to initialize buffer...");
while(_DG !='1');
Buffer_Init();
_DBG_("Transmit Buffer init: ...");
for(i=0;i<BUFFER_SIZE;i++)
{
_DBH32(I2STXBuffer[i]);_DBG_("");
}
_DBG_("Receive Buffer init: ...");
for(i=0;i<BUFFER_SIZE;i++)
{
_DBH32(I2SRXBuffer[i]);_DBG_("");
}
/* Initializes pin corresponding to I2S function */
I2S_PinStruct.CLK_Pin=I2S_STX_CLK_P0_7;
I2S_PinStruct.WS_Pin=I2S_STX_WS_P0_8;
I2S_PinStruct.SDA_Pin=I2S_STX_SDA_P0_9;
I2S_PinStruct.MCLK_Pin=I2S_TX_MCLK_P4_29;
PINSEL_ConfigPin((PINSEL_CFG_Type *) (&i2s_stx_clk_pin[I2S_PinStruct.CLK_Pin]));
PINSEL_ConfigPin((PINSEL_CFG_Type *) (&i2s_stx_ws_pin[I2S_PinStruct.WS_Pin]));
PINSEL_ConfigPin((PINSEL_CFG_Type *) (&i2s_stx_sda_pin[I2S_PinStruct.SDA_Pin]));
PINSEL_ConfigPin((PINSEL_CFG_Type *) (&i2s_tx_mclk_pin[I2S_PinStruct.MCLK_Pin]));
// Configure pinsel for I2S_RX
I2S_PinStruct.CLK_Pin=I2S_SRX_CLK_P0_4;
I2S_PinStruct.WS_Pin=I2S_SRX_WS_P0_5;
I2S_PinStruct.SDA_Pin=I2S_SRX_SDA_P0_6;
I2S_PinStruct.MCLK_Pin=I2S_RX_MCLK_P4_28;
PINSEL_ConfigPin((PINSEL_CFG_Type *) (&i2s_srx_clk_pin[I2S_PinStruct.CLK_Pin]));
PINSEL_ConfigPin((PINSEL_CFG_Type *) (&i2s_srx_ws_pin[I2S_PinStruct.WS_Pin]));
PINSEL_ConfigPin((PINSEL_CFG_Type *) (&i2s_srx_sda_pin[I2S_PinStruct.SDA_Pin]));
PINSEL_ConfigPin((PINSEL_CFG_Type *) (&i2s_rx_mclk_pin[I2S_PinStruct.MCLK_Pin]));
I2S_Init(LPC_I2S);
//Setup for I2S: RX is similar with TX
/* setup:
* - wordwidth: 16 bits
* - stereo mode
* - master mode for I2S_TX and slave for I2S_RX
* - ws_halfperiod is 31
* - not use mute mode
* - use reset and stop mode
* - select the fractional rate divider clock output as the source,
* - disable 4-pin mode
* - MCLK ouput is disable
* - Frequency = 44.1 kHz (x=8,y=51 - automatic setting)
* Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
* I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
* --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
*/
/* Audio Config*/
I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
I2S_ConfigStruct.mono = I2S_STEREO;
I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
/* Clock Mode Config*/
I2S_ClkConfig.clksel = I2S_CLKSEL_0;
I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
I2S_ClkConfig.fpin = I2S_4PIN_ENABLE;
I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
/* Set up frequency and bit rate*/
I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
// I2S_SetBitRate(I2S, 1, I2S_RX_MODE);
I2S_Start(LPC_I2S);
_DBG_("Press '2' to start I2S transfer process...");
while(_DG !='2');
_DBG_("I2S Start ...");
while(I2STXDone == 0||I2SRXDone == 0){
if(I2STXDone ==0){
while (I2S_GetLevel(LPC_I2S,I2S_TX_MODE)!=0x00);
I2S_Send(LPC_I2S,I2STXBuffer[I2SWriteLength]);
I2SWriteLength +=1;
if(I2SWriteLength == BUFFER_SIZE) I2STXDone = 1;
}
if(I2SRXDone == 0)
{
while(I2S_GetLevel(LPC_I2S,I2S_RX_MODE)==0x00);
if(dummy == 0) //dummy receive
{
i = I2S_Receive(LPC_I2S);
if(i!=0)
{
*(uint32_t *)(&I2SRXBuffer[I2SReadLength]) = i;
I2SReadLength +=1;
dummy = 1;
}
}
else
{
*(uint32_t *)(&I2SRXBuffer[I2SReadLength]) = I2S_Receive(LPC_I2S);
I2SReadLength +=1;
}
if(I2SReadLength == BUFFER_SIZE) I2SRXDone = 1;
}
}
_DBG_("I2S Finish...");
_DBG_("Receive Buffer data: ...");
for(i=0;i<BUFFER_SIZE;i++)
{
_DBH32(I2SRXBuffer[i]);_DBG_("");
}
if(Buffer_Verify())
{
_DBG_("Verify Buffer: OK...");
}
else
{
_DBG_("Verify Buffer: ERROR...");
}
while(1);
}
/*********************************************************************//**
* @brief c_entry: Main program body
* @param[in] None
* @return int
**********************************************************************/
int c_entry(void)
{
uint32_t i;
GPDMA_Channel_CFG_Type GPDMACfg;
I2S_MODEConf_Type I2S_ClkConfig;
I2S_CFG_Type I2S_ConfigStruct;
I2S_DMAConf_Type I2S_DMAStruct;
PINSEL_CFG_Type PinCfg;
/* Initialize debug via UART0
* – 115200bps
* – 8 data bit
* – No parity
* – 1 stop bit
* – No flow control
*/
debug_frmwrk_init();
//print menu screen
print_menu();
//Initialize buffer
Buffer_Init();
_DBG_("Press '1' to initialize buffer...");
while(_DG !='1');
_DBG_("Transmit Buffer init: ...");
for(i=0;i<BUFFER_SIZE;i++)
{
_DBH32(I2STXBuffer[i]);_DBG_("");
}
_DBG_("Receive Buffer init: ...");
for(i=0;i<BUFFER_SIZE;i++)
{
_DBH32(I2SRXBuffer[i]);_DBG_("");
}
/* Pin configuration:
* Assign: - P0.4 as I2SRX_CLK
* - P0.5 as I2SRX_WS
* - P0.6 as I2SRX_SDA
* - P0.7 as I2STX_CLK
* - P0.8 as I2STX_WS
* - P0.9 as I2STX_SDA
*/
PinCfg.Funcnum = 1;
PinCfg.OpenDrain = 0;
PinCfg.Pinmode = 0;
PinCfg.Pinnum = 4;
PinCfg.Portnum = 0;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 5;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 6;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 7;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 8;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 9;
PINSEL_ConfigPin(&PinCfg);
/* Initialize I2S */
I2S_Init(LPC_I2S);
//Setup for I2S: RX is similar with TX
/* setup:
* - wordwidth: 16 bits
* - stereo mode
* - master mode for I2S_TX and slave for I2S_RX
* - ws_halfperiod is 31
* - not use mute mode
* - use reset and stop mode
* - select the fractional rate divider clock output as the source,
* - disable 4-pin mode
* - MCLK ouput is disable
* - Frequency = 44.1 kHz
* Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
* I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
* --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
*/
/* Audio Config*/
I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
I2S_ConfigStruct.mono = I2S_STEREO;
I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
/* Clock Mode Config*/
I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
/* Set up frequency and bit rate*/
I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
I2S_SetBitRate(LPC_I2S, 0, I2S_RX_MODE);
_DBG_("Press '2' to initialize DMA...");
while(_DG !='2');
/* GPDMA Interrupt configuration section ------------------------------------------------- */
/* Initialize GPDMA controller */
GPDMA_Init();
LPC_GPDMA->DMACConfig = 0x01;
/* Setting GPDMA interrupt */
// Disable interrupt for DMA
NVIC_DisableIRQ (DMA_IRQn);
/* preemption = 1, sub-priority = 1 */
NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
/*
* Configure GPDMA channel 0 -------------------------------------------------------------
* Used for I2S Transmit
*/
// Setup GPDMA channel --------------------------------
// channel 0
GPDMACfg.ChannelNum = 0;
// Source memory
GPDMACfg.SrcMemAddr = DMA_SRC;
// Destination memory
GPDMACfg.DstMemAddr = 0;
// Transfer size
GPDMACfg.TransferSize = BUFFER_SIZE;
// Transfer width - unused
GPDMACfg.TransferWidth = 0;
// Transfer type
GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
// Source connection
GPDMACfg.SrcConn = 0;
// Destination connection - unused
GPDMACfg.DstConn = GPDMA_CONN_I2S_Channel_0;
// Linker List Item - unused
GPDMACfg.DMALLI = 0;
GPDMA_Setup(&GPDMACfg);
_DBG_("DMA Channel 0 setting finised...");
/* Reset terminal counter */
Channel0_TC = 0;
/* Reset Error counter */
Channel0_Err = 0;
/*
* Configure GPDMA channel 1 -------------------------------------------------------------
* Used for UART0 Receive
*/
// Setup GPDMA channel --------------------------------
// channel 1
GPDMACfg.ChannelNum = 1;
// Source memory - unused
GPDMACfg.SrcMemAddr = 0;
// Destination memory
GPDMACfg.DstMemAddr = DMA_DST;
// Transfer size
GPDMACfg.TransferSize = BUFFER_SIZE+1;
// Transfer width - unused
GPDMACfg.TransferWidth = 0;
// Transfer type
GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
// Source connection - unused
GPDMACfg.SrcConn = GPDMA_CONN_I2S_Channel_1;
// Destination connection
GPDMACfg.DstConn = 0;
// Linker List Item - unused
GPDMACfg.DMALLI = 0;
GPDMA_Setup(&GPDMACfg);
_DBG_("DMA Channel 1 setting finised...");
/* Reset terminal counter */
Channel1_TC = 0;
/* Reset Error counter */
Channel1_Err = 0;
// Enable GPDMA channel 0 & 1
GPDMA_ChannelCmd(0, ENABLE);
GPDMA_ChannelCmd(1, ENABLE);
// Enable interrupt for DMA
NVIC_EnableIRQ (DMA_IRQn);
_DBG_("Press '3' to start I2S transfer process...");
while(_DG !='3');
_DBG_("I2S Start...");
I2S_DMAStruct.DMAIndex = I2S_DMA_2;
I2S_DMAStruct.depth = 8;
I2S_DMAConfig(LPC_I2S, &I2S_DMAStruct, I2S_RX_MODE);
I2S_DMAStruct.DMAIndex = I2S_DMA_1;
I2S_DMAStruct.depth = 1;
I2S_DMAConfig(LPC_I2S, &I2S_DMAStruct, I2S_TX_MODE);
I2S_Start(LPC_I2S);
I2S_DMACmd(LPC_I2S, I2S_DMA_2, I2S_RX_MODE, ENABLE);
I2S_DMACmd(LPC_I2S, I2S_DMA_1, I2S_TX_MODE, ENABLE);
while ((Channel0_TC == 0)||(Channel1_TC == 0) );
_DBG_("I2S Finish...");
_DBG_("Receive Buffer data: ...");
for(i=0;i<BUFFER_SIZE+1;i++)
{
_DBH32(I2SRXBuffer[i]);
if(I2SRXBuffer[i]==0)
{
_DBG_(" ->Dummy data");
}
else _DBG_("");
}
I2S_DeInit(LPC_I2S);
while(1);
return 1;
}
/*********************************************************************//**
* @brief c_entry: Main I2S program body
* @param[in] None
* @return int
**********************************************************************/
int c_entry (void) {
uint32_t i;
uint32_t dummy=0;
I2S_MODEConf_Type I2S_ClkConfig;
I2S_CFG_Type I2S_ConfigStruct;
PINSEL_CFG_Type PinCfg;
/* Initialize debug via UART0
* – 115200bps
* – 8 data bit
* – No parity
* – 1 stop bit
* – No flow control
*/
debug_frmwrk_init();
//print menu screen
print_menu();
Buffer_Init();
/* Pin configuration:
* Assign: - P0.4 as I2SRX_CLK
* - P0.5 as I2SRX_WS
* - P0.6 as I2SRX_SDA
* - P0.7 as I2STX_CLK
* - P0.8 as I2STX_WS
* - P0.9 as I2STX_SDA
*/
PinCfg.Funcnum = 1;
PinCfg.OpenDrain = 0;
PinCfg.Pinmode = 0;
PinCfg.Pinnum = 4;
PinCfg.Portnum = 0;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 5;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 6;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 7;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 8;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 9;
PINSEL_ConfigPin(&PinCfg);
I2S_Init(LPC_I2S);
//Setup for I2S: RX is similar with TX
/* setup:
* - wordwidth: 16 bits
* - stereo mode
* - master mode for I2S_TX and slave for I2S_RX
* - ws_halfperiod is 31
* - not use mute mode
* - use reset and stop mode
* - select the fractional rate divider clock output as the source,
* - disable 4-pin mode
* - MCLK ouput is disable
* - Frequency = 44.1 kHz (x=8,y=51 - automatic setting)
* Because we use mode I2STXMODE[3:0]= 0000, I2SDAO[5]=0 and
* I2SRX[3:0]=0000, I2SDAI[5] = 1. So we have I2SRX_CLK = I2STX_CLK
* --> I2SRXBITRATE = 1 (not divide TXCLK to produce RXCLK)
*/
/* Audio Config*/
I2S_ConfigStruct.wordwidth = I2S_WORDWIDTH_16;
I2S_ConfigStruct.mono = I2S_STEREO;
I2S_ConfigStruct.stop = I2S_STOP_ENABLE;
I2S_ConfigStruct.reset = I2S_RESET_ENABLE;
I2S_ConfigStruct.ws_sel = I2S_MASTER_MODE;
I2S_ConfigStruct.mute = I2S_MUTE_DISABLE;
I2S_Config(LPC_I2S,I2S_TX_MODE,&I2S_ConfigStruct);
I2S_ConfigStruct.ws_sel = I2S_SLAVE_MODE;
I2S_Config(LPC_I2S,I2S_RX_MODE,&I2S_ConfigStruct);
/* Clock Mode Config*/
I2S_ClkConfig.clksel = I2S_CLKSEL_FRDCLK;
I2S_ClkConfig.fpin = I2S_4PIN_DISABLE;
I2S_ClkConfig.mcena = I2S_MCLK_DISABLE;
I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_TX_MODE);
I2S_ModeConfig(LPC_I2S,&I2S_ClkConfig,I2S_RX_MODE);
/* Set up frequency and bit rate*/
I2S_FreqConfig(LPC_I2S, 44100, I2S_TX_MODE);
I2S_SetBitRate(LPC_I2S, 0, I2S_RX_MODE);
I2S_Start(LPC_I2S);
while(I2STXDone == 0||I2SRXDone == 0){
if(I2STXDone ==0){
I2S_Send(LPC_I2S,I2STXBuffer[I2SWriteLength]);
I2SWriteLength +=1;
if(I2SWriteLength == BUFFER_SIZE) I2STXDone = 1;
}
if(I2SRXDone == 0)
{
while(I2S_GetLevel(LPC_I2S,I2S_RX_MODE)==0x00);
if(dummy == 0) //dummy receive
{
i = I2S_Receive(LPC_I2S);
dummy = 1;
}
else
{
*(uint32_t *)(&I2SRXBuffer[I2SReadLength]) = I2S_Receive(LPC_I2S);
I2SReadLength +=1;
}
if(I2SReadLength == BUFFER_SIZE) I2SRXDone = 1;
}
}
/* print received data */
_DBG_("Receive Buffer data: ...");
for(i=0;i<BUFFER_SIZE;i++)
{
_DBH32(I2SRXBuffer[i]);_DBG_("");
}
/* Validate received data */
if(Buffer_Verify())
{
_DBG_("Verify Buffer: OK...");
}
else
{
_DBG_("Verify Buffer: ERROR...");
}
I2S_DeInit(LPC_I2S);
while(1);
}
