void jpeg_drv_enc_reset(void)
{
IMG_REG_WRITE( (0), REG_ADDR_JPEG_ENC_RSTB); //REG_JPEG_ENC_RSTB = 0;
IMG_REG_WRITE( (1), REG_ADDR_JPEG_ENC_RSTB); //REG_JPEG_ENC_RSTB = 1;
_jpeg_enc_int_status = 0;
}
void gdma_rw_reg(void)
{
unsigned int i;
unsigned int addr = 0;
//char msg[256];
printk("=======================================\n\r");
printk(" GDMA register RW test!!!!\n\r");
for (i = 0x50; i < 0xDC; i+=4)
{
addr = GDMA_REG_BASE + i;
printk("addr %03x(%03d) ", i, i/4);
IMG_REG_WRITE(0x00000000, addr); //*((volatile unsigned int*)addr) = 0x00000000;
printk("write 0x00000000 read: 0x%08x\n", *((volatile unsigned int*)addr));
IMG_REG_WRITE(0xffffffff, addr); //*((volatile unsigned int*)addr) = 0xffffffff;
printk(" write 0xffffffff read: 0x%08x\n", *((volatile unsigned int*)addr));
wait_pr();
}
printk("=======================================\n\r\n\r");
}
void jpeg_drv_dec_rw_reg(void)
{
kal_uint32 i;
unsigned long addr = 0;
unsigned int reg_value = 0;
/* kal_uint32 restore = 0; */
JPEG_VEB("=======================================\n\r");
JPEG_VEB(" JPEG decoder register RW test!!!!\n\r");
/* for (i = 0x8C; i < 0x3FC; i+=4) */
for (i = 0x090; i <= 0x294; i += 4) {
addr = (unsigned long)(JPEG_DEC_BASE + i);
JPEG_VEB("addr %03x(%03d) ", i, i / 4);
IMG_REG_WRITE(0x00000000, addr);
IMG_REG_READ(reg_value, addr);
JPEG_VEB("write 0x00000000 read: 0x%08x\n", reg_value);
IMG_REG_WRITE(0xffffffff, addr);
IMG_REG_READ(reg_value, addr);
JPEG_VEB(" write 0xffffffff read: 0x%08x\n", reg_value);
wait_pr();
}
JPEG_VEB("=======================================\n\r\n\r");
}
void jpeg_drv_dec_start(void)
{
// unmask jpeg irq
IMG_REG_WRITE(0x37, REG_ADDR_JPGDEC_IRQ_EN);
IMG_REG_WRITE(0, REG_ADDR_JPGDEC_TRIG); //REG_JPGDEC_TRIG = 0;
}
kal_uint32 jpeg_drv_enc_set_dst_buff(kal_uint32 dst_addr, kal_uint32 stall_size, kal_uint32 init_offset, kal_uint32 offset_mask)
{
if (stall_size < 624)
{
JPEG_MSG("JPEGENC:stall offset less than 624 to write header %d!!\n",stall_size);
return 0;
}
if (offset_mask & 0x0F)
{
JPEG_MSG("JPEGENC: set offset addr %x\n", offset_mask);
//return 0;
}
IMG_REG_WRITE( (init_offset & (~0xF)), REG_ADDR_JPEG_ENC_OFFSET_ADDR); //REG_JPEG_ENC_OFFSET_ADDR = init_offset & (~0xF);
IMG_REG_WRITE( (offset_mask & 0xF), REG_ADDR_JPEG_ENC_BYTE_OFFSET_MASK); //REG_JPEG_ENC_BYTE_OFFSET_MASK = (offset_mask & 0xF);
IMG_REG_WRITE( (dst_addr & (~0xF)), REG_ADDR_JPEG_ENC_DST_ADDR0); //REG_JPEG_ENC_DST_ADDR0 = dst_addr & (~0xF);
IMG_REG_WRITE( ((dst_addr + stall_size) & (~0xF)), REG_ADDR_JPEG_ENC_STALL_ADDR0); //REG_JPEG_ENC_STALL_ADDR0 = (dst_addr + stall_size) & (~0xF);
return 1;
}
void gfmt_drv_set_src_buffer(unsigned int addr_Y, unsigned int addr_UV)
{
IMG_REG_WRITE((addr_Y ), REG_ADDR_GDMA_FMT_YSRCB1 ); //REG_GDMA_FMT_YSRCB1 = addr_Y ;
IMG_REG_WRITE((addr_UV), REG_ADDR_GDMA_FMT_CBSRCB1); //REG_GDMA_FMT_CBSRCB1 = addr_UV ;
}
int jpeg_drv_dec_set_memStride(unsigned int CompMemStride_Y, unsigned int CompMemStride_UV)
{
IMG_REG_WRITE((CompMemStride_Y & 0xFFFF), REG_ADDR_JPGDEC_STRIDE_Y ); //REG_JPGDEC_STRIDE_Y = CompMemStride_Y & 0xFFFF ;
IMG_REG_WRITE((CompMemStride_UV & 0xFFFF), REG_ADDR_JPGDEC_STRIDE_UV); //REG_JPGDEC_STRIDE_UV = CompMemStride_UV & 0xFFFF ;
return (int)E_HWJPG_OK;
}
void jpeg_drv_dec_set_bs_info(unsigned int bsBase, unsigned int bsSize)
{
CHECK_ALIGN(bsBase, 16, (kal_uint32) REG_ADDR_JPGDEC_FILE_ADDR);
CHECK_ALIGN(bsSize, 128, (kal_uint32) REG_ADDR_JPGDEC_FILE_TOTAL_SIZE);
IMG_REG_WRITE((bsBase), REG_ADDR_JPGDEC_FILE_ADDR);
IMG_REG_WRITE((bsSize), REG_ADDR_JPGDEC_FILE_TOTAL_SIZE);
}
void jpeg_drv_dec_set_dst_bank1(unsigned int addr_Y, unsigned int addr_U,unsigned int addr_V)
{
// unsigned int u4Value;
IMG_REG_WRITE(addr_Y, REG_ADDR_JPGDEC_DEST_ADDR1_Y); //REG_JPGDEC_DEST_ADDR1_Y = addr_Y ;
IMG_REG_WRITE(addr_U, REG_ADDR_JPGDEC_DEST_ADDR1_U); //REG_JPGDEC_DEST_ADDR1_U = addr_U ;
IMG_REG_WRITE(addr_V, REG_ADDR_JPGDEC_DEST_ADDR1_V); //REG_JPGDEC_DEST_ADDR1_V = addr_V ;
}
void jpeg_drv_dec_set_dst_bank0(unsigned int addr_Y, unsigned int addr_U,unsigned int addr_V)
{
IMG_REG_WRITE(addr_Y, REG_ADDR_JPGDEC_DEST_ADDR0_Y); //REG_JPGDEC_DEST_ADDR0_Y = addr_Y ;
IMG_REG_WRITE(addr_U, REG_ADDR_JPGDEC_DEST_ADDR0_U); //REG_JPGDEC_DEST_ADDR0_U = addr_U ;
IMG_REG_WRITE(addr_V, REG_ADDR_JPGDEC_DEST_ADDR0_V); //REG_JPGDEC_DEST_ADDR0_V = addr_V ;
}
void gfmt_drv_set_dst_bank1(unsigned int addr_Y, unsigned int addr_U,unsigned int addr_V)
{
IMG_REG_WRITE((addr_Y ), REG_ADDR_GDMA_FMT_YTGB2 ); //REG_GDMA_FMT_YTGB2 = addr_Y ;
IMG_REG_WRITE((addr_U ), REG_ADDR_GDMA_FMT_CBTGB2 ); //REG_GDMA_FMT_CBTGB2 = addr_U ;
IMG_REG_WRITE((addr_V ), REG_ADDR_GDMA_FMT_CRTGB2 ); //REG_GDMA_FMT_CRTGB2 = addr_V ;
}
void gdma_drv_set_src_bank1(unsigned int addr_Y, unsigned int addr_U,unsigned int addr_V)
{
IMG_REG_WRITE(addr_Y, REG_ADDR_GDMA_CTL_YSRCB2 ); //REG_GDMA_CTL_YSRCB2 = addr_Y ;
IMG_REG_WRITE(addr_U, REG_ADDR_GDMA_CTL_CBSRCB2 ); //REG_GDMA_CTL_CBSRCB2 = addr_U ;
IMG_REG_WRITE(addr_V, REG_ADDR_GDMA_CTL_CRSRCB2 ); //REG_GDMA_CTL_CRSRCB2 = addr_V ;
}
void gdma_drv_set_crop_offset(unsigned int initOffset_Y, unsigned int offset_Y, unsigned int initOffset_C, unsigned int offset_C)
{
unsigned int u4Value;
u4Value = (initOffset_Y << 16) | offset_Y ;
IMG_REG_WRITE(u4Value, REG_ADDR_GDMA_CTL_SRCOFST_Y); //REG_GDMA_CTL_SRCOFST_Y = (initOffset_Y << 16) | offset_Y ;
u4Value = (initOffset_C << 16) | offset_C ;
IMG_REG_WRITE(u4Value, REG_ADDR_GDMA_CTL_SRCOFST_C); //REG_GDMA_CTL_SRCOFST_C = (initOffset_C << 16) | offset_C ;
}
void jpeg_drv_dec_set_dst_bank1(unsigned int addr_Y, unsigned int addr_U, unsigned int addr_V)
{
/* unsigned int u4Value; */
IMG_REG_WRITE(addr_Y, REG_ADDR_JPGDEC_DEST_ADDR1_Y);
IMG_REG_WRITE(addr_U, REG_ADDR_JPGDEC_DEST_ADDR1_U);
IMG_REG_WRITE(addr_V, REG_ADDR_JPGDEC_DEST_ADDR1_V);
}
int jpeg_drv_dec_set_imgStride(unsigned int CompStride_Y, unsigned int CompStride_UV)
{
/* unsigned int u4Reg; */
IMG_REG_WRITE((CompStride_Y & 0xFFFF), REG_ADDR_JPGDEC_IMG_STRIDE_Y);
IMG_REG_WRITE((CompStride_UV & 0xFFFF), REG_ADDR_JPGDEC_IMG_STRIDE_UV);
return (int)E_HWJPG_OK;
}
void jpeg_drv_dec_soft_reset(void)
{
IMG_REG_WRITE(0x00, REG_ADDR_JPGDEC_RESET); //REG_JPGDEC_RESET = 0x00;
IMG_REG_WRITE(0x01, REG_ADDR_JPGDEC_RESET); //REG_JPGDEC_RESET = 0x01;
//REG_JPGDEC_RESET = 0x00;
_jpeg_dec_int_status = 0;
_jpeg_dec_mode = 0;
}
void jpeg_drv_dec_reset(void)
{
IMG_REG_WRITE(0x00, REG_ADDR_JPGDEC_RESET);
IMG_REG_WRITE(0x10, REG_ADDR_JPGDEC_RESET);
/* REG_JPGDEC_RESET = 0x00; */
_jpeg_dec_int_status = 0;
_jpeg_dec_mode = 0;
}
void jpeg_drv_enc_reset(void)
{
IMG_REG_WRITE((0), REG_ADDR_JPEG_ENC_RSTB); /* REG_JPEG_ENC_RSTB = 0; */
IMG_REG_WRITE((1), REG_ADDR_JPEG_ENC_RSTB); /* REG_JPEG_ENC_RSTB = 1; */
IMG_REG_WRITE((0), REG_ADDR_JPEG_ENC_CODEC_SEL);
_jpeg_enc_int_status = 0;
}
void jpeg_drv_enc_reset(void)
{
IMG_REG_WRITE( (0), REG_ADDR_JPEG_ENC_RSTB); //REG_JPEG_ENC_RSTB = 0;
IMG_REG_WRITE( (1), REG_ADDR_JPEG_ENC_RSTB); //REG_JPEG_ENC_RSTB = 1;
IMG_REG_WRITE( (0), REG_ADDR_JPEG_ENC_CODEC_SEL); //REG_JPEG_ENC_CODEC_SEL = 0; //switch SRAM to jpeg module
_jpeg_enc_int_status = 0;
}
void jpeg_drv_dec_resume(unsigned int resume)
{
_jpeg_dec_int_status = 0;
IMG_REG_WRITE((resume), REG_ADDR_JPGDEC_INTERRUPT_STATUS ); //REG_JPGDEC_INTERRUPT_STATUS = resume ;
// unmask jpeg interrupt since we've masked it out when pause irq rise
IMG_REG_WRITE(0x37, REG_ADDR_JPGDEC_IRQ_EN);
}
void jpeg_drv_dec_resume(unsigned int resume)
{
_jpeg_dec_int_status = 0;
#ifndef JPEG_DEC_IRQ_ENHANCE
IMG_REG_WRITE((resume), REG_ADDR_JPGDEC_INTERRUPT_STATUS);
/* unmask jpeg interrupt since we've masked it out when pause irq rise */
IMG_REG_WRITE(0x37, REG_ADDR_JPGDEC_IRQ_EN);
#else
IMG_REG_WRITE(0, REG_ADDR_JPGDEC_TRIG);
#endif
}
/* 0:JPG mode, 1:JFIF/EXIF mode */
void jpeg_drv_enc_set_EncodeMode(kal_uint32 exif_en)
{
unsigned int u4Value;
u4Value = REG_JPEG_ENC_CTRL;
u4Value &= ~(JPEG_ENC_CTRL_FILE_FORMAT_BIT);
IMG_REG_WRITE((u4Value), REG_ADDR_JPEG_ENC_CTRL);
if (exif_en) {
u4Value = REG_JPEG_ENC_CTRL;
u4Value |= JPEG_ENC_EN_JFIF_EXIF;
IMG_REG_WRITE((u4Value), REG_ADDR_JPEG_ENC_CTRL);
}
}
void jpeg_drv_enc_set_restart_interval(kal_uint32 restart_interval)
{
unsigned int u4Value;
u4Value = REG_JPEG_ENC_CTRL;
if (0 != restart_interval) {
u4Value |= JPEG_ENC_CTRL_RESTART_EN_BIT;
IMG_REG_WRITE((u4Value), REG_ADDR_JPEG_ENC_CTRL);
} else {
u4Value &= ~JPEG_ENC_CTRL_RESTART_EN_BIT;
IMG_REG_WRITE((u4Value), REG_ADDR_JPEG_ENC_CTRL);
}
IMG_REG_WRITE((restart_interval), REG_ADDR_JPEG_ENC_RST_MCU_NUM);
}
void jpeg_drv_dec_set_brz_factor(unsigned char yHScale, unsigned char yVScale, unsigned char cbcrHScale, unsigned char cbcrVScale)
{
unsigned int u4Value;
//yHScale = yHScale;
//yVScale = yVScale;
//cbcrHScale = cbcrHScale;
//cbcrVScale = cbcrVScale;
#if 0
if( srcFormat == JPG_COLOR_444 ||
srcFormat == JPG_COLOR_422V ||
srcFormat == JPG_COLOR_422Vx2
){
cbcrHScale++;
}
#endif
u4Value = (cbcrVScale << BIT_BRZ_CV_SHIFT) | (cbcrHScale << BIT_BRZ_CH_SHIFT) |
(yVScale << BIT_BRZ_YV_SHIFT) | (yHScale << BIT_BRZ_YH_SHIFT) ;
IMG_REG_WRITE(u4Value, REG_ADDR_JPGDEC_BRZ_FACTOR); //REG_JPGDEC_BRZ_FACTOR = u4Value;
//printk("[JPEGDRV] BRZ 0x%08x!!\n", u4Value);
}
kal_uint32 jpeg_drv_enc_set_encFormat(kal_uint32 encFormat)
{
kal_uint32 val ;
unsigned int u4Value ;
if(encFormat & (~3)){
JPEG_ERR("JPEG_DRV_ENC: set encFormat Err %d!!\n", encFormat );
return 0;
}
val = (encFormat & 3) << 3;
#if 0
// REG_JPEG_ENC_CTRL &= ~JPEG_ENC_CTRL_YUV_BIT;
//
// REG_JPEG_ENC_CTRL |= val;
#else
u4Value = REG_JPEG_ENC_CTRL ;
u4Value &= ~JPEG_ENC_CTRL_YUV_BIT;
u4Value |= val;
IMG_REG_WRITE( (u4Value), REG_ADDR_JPEG_ENC_CTRL);
#endif
return 1;
}
kal_uint32 jpeg_drv_enc_warm_reset(void)
{
kal_uint32 timeout = 0xFFFFF;
REG_JPEG_ENC_CTRL &= ~JPEG_ENC_CTRL_ENABLE_BIT;
//REG_JPEG_ENC_CTRL |= JPEG_ENC_CTRL_ENABLE_BIT;
while (0 == (REG_JPEG_ENC_DEBUG_INFO0 & JPEG_ENC_DEBUG_INFO0_GMC_IDLE_MASK))
{
timeout--;
if (0 == timeout)
{
JPEG_MSG("Wait for GMC IDLE timeout\n");
return 0;
}
}
REG_JPEG_ENC_RSTB &= ~(JPEG_ENC_RST_BIT);
REG_JPEG_ENC_RSTB |= JPEG_ENC_RST_BIT;
IMG_REG_WRITE( (0), REG_ADDR_JPEG_ENC_CODEC_SEL); //REG_JPEG_ENC_CODEC_SEL = 0;
_jpeg_enc_int_status = 0;
return 1;
}
int jpeg_isr_dec_lisr(void)
{
unsigned int tmp = 0, tmp1 = 0;
tmp1 = REG_JPGDEC_INTERRUPT_STATUS;
tmp = tmp1 & BIT_INQST_MASK_ALLIRQ ;
//printk("enter jpeg_isr_dec_lisr, mode %x,st %x, tmp1 %x!!\n",_jpeg_dec_mode, _jpeg_dec_int_status, tmp1);
if (tmp)
{
_jpeg_dec_int_status = tmp ;
if(_jpeg_dec_mode == 1 ){ //always not clear
//if( (tmp & BIT_INQST_MASK_PAUSE) )
return 0;
}else{
//printk("enter isr_dec_lisr_clear, mode %x,st %x, tmp1 %x!!\n",_jpeg_dec_mode, _jpeg_dec_int_status, tmp1);
/// clear the interrupt status register
IMG_REG_WRITE(tmp,REG_ADDR_JPGDEC_INTERRUPT_STATUS); //REG_JPGDEC_INTERRUPT_STATUS = tmp;
return 0;
}
}
return -1;
}
void jpeg_drv_dec_start(void)
{
//REG_JPEG_DEC_TRIG = 1;
//mt65xx_reg_sync_writel(0x1, REG_ADDR_JPGDEC_TRIG);
//printk("trigger the decoder HW!!\n");
IMG_REG_WRITE(0, REG_ADDR_JPGDEC_TRIG); //REG_JPGDEC_TRIG = 0;
}
void jpeg_drv_dec_set_total_mcu(unsigned int TotalMcuNum)
{
unsigned int u4Value;
u4Value = TotalMcuNum -1;
IMG_REG_WRITE((u4Value), REG_ADDR_JPGDEC_TOTAL_MCU_NUM ); //REG_JPGDEC_TOTAL_MCU_NUM = u4Value ;
}
void jpeg_drv_dec_set_comp0_du(unsigned int GrayDuNum)
{
unsigned int u4Value;
u4Value = GrayDuNum -1;
IMG_REG_WRITE((u4Value), REG_ADDR_JPGDEC_COMP0_DATA_UNIT_NUM ); //REG_JPGDEC_COMP0_DATA_UNIT_NUM = u4Value ;
}
