/**
* @brief Disable GPIO pull-down state in Standby and Shutdown modes.
* @note Reset the relevant PDy bits of PWR_PDCRx register used to configure the I/O
* in pull-down state in Standby and Shutdown modes.
* @note Even if a PDy bit to reset is reserved, the other PDy bits entered as input
* parameter at the same time are reset.
* @param GPIO: Specifies the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_H
* (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral.
* @param GPIONumber: Specify the I/O pins numbers.
* This parameter can be one of the following values:
* PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less
* I/O pins are available) or the logical OR of several of them to reset
* several bits for a given port in a single API call.
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
{
assert_param(IS_PWR_GPIO(GPIO));
assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
switch (GPIO)
{
case PWR_GPIO_A:
CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15))));
break;
case PWR_GPIO_B:
CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4))));
break;
case PWR_GPIO_C:
CLEAR_BIT(PWR->PDCRC, GPIONumber);
break;
#if defined(GPIOD)
case PWR_GPIO_D:
CLEAR_BIT(PWR->PDCRD, GPIONumber);
break;
#endif
#if defined(GPIOE)
case PWR_GPIO_E:
CLEAR_BIT(PWR->PDCRE, GPIONumber);
break;
#endif
#if defined(GPIOF)
case PWR_GPIO_F:
CLEAR_BIT(PWR->PDCRF, GPIONumber);
break;
#endif
#if defined(GPIOG)
case PWR_GPIO_G:
CLEAR_BIT(PWR->PDCRG, GPIONumber);
break;
#endif
case PWR_GPIO_H:
#if defined (STM32L496xx) || defined (STM32L4A6xx)
CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3))));
#else
CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS));
#endif
break;
#if defined(GPIOI)
case PWR_GPIO_I:
CLEAR_BIT(PWR->PDCRI, (GPIONumber & PWR_PORTI_AVAILABLE_PINS));
break;
#endif
default:
return HAL_ERROR;
}
return HAL_OK;
}
/**
* @brief Enable GPIO pull-down state in Standby and Shutdown modes.
* @note Set the relevant PDy bits of PWR_PDCRx register to configure the I/O in
* pull-down state in Standby and Shutdown modes.
* @note This state is effective in Standby and Shutdown modes only if APC bit
* is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
* @note The configuration is lost when exiting the Shutdown mode due to the
* power-on reset, maintained when exiting the Standby mode.
* @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding
* PUy bit of PWR_PUCRx register is cleared unless it is reserved.
* @note Even if a PDy bit to set is reserved, the other PDy bits entered as input
* parameter at the same time are set.
* @param GPIO: Specify the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_H
* to select the GPIO peripheral.
* @param GPIONumber: Specify the I/O pins numbers.
* This parameter can be one of the following values:
* PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for PORTH where less
* I/O pins are available) or the logical OR of several of them to set
* several bits for a given port in a single API call.
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
{
assert_param(IS_PWR_GPIO(GPIO));
assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
switch (GPIO)
{
case PWR_GPIO_A:
SET_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15))));
CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14))));
break;
case PWR_GPIO_B:
SET_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4))));
CLEAR_BIT(PWR->PUCRB, GPIONumber);
break;
case PWR_GPIO_C:
SET_BIT(PWR->PDCRC, GPIONumber);
CLEAR_BIT(PWR->PUCRC, GPIONumber);
break;
#if defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) || defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
case PWR_GPIO_D:
SET_BIT(PWR->PDCRD, GPIONumber);
CLEAR_BIT(PWR->PUCRD, GPIONumber);
break;
case PWR_GPIO_E:
SET_BIT(PWR->PDCRE, GPIONumber);
CLEAR_BIT(PWR->PUCRE, GPIONumber);
break;
#endif
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
case PWR_GPIO_F:
SET_BIT(PWR->PDCRF, GPIONumber);
CLEAR_BIT(PWR->PUCRF, GPIONumber);
break;
case PWR_GPIO_G:
SET_BIT(PWR->PDCRG, GPIONumber);
CLEAR_BIT(PWR->PUCRG, GPIONumber);
break;
#endif
case PWR_GPIO_H:
SET_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS));
CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS));
break;
default:
return HAL_ERROR;
}
return HAL_OK;
}
