//SPI1速度设置函数
//SPI速度=fAPB2/分频系数
//@ref SPI_BaudRate_Prescaler:SPI_BaudRatePrescaler_2~SPI_BaudRatePrescaler_256
//fAPB2时钟一般为84Mhz：
void SPI1_SetSpeed(u8 SPI_BaudRatePrescaler)
{
assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_BaudRatePrescaler));//判断有效性
SPI1->CR1&=0XFFC7;//位3-5清零，用来设置波特率
SPI1->CR1|=SPI_BaudRatePrescaler; //设置SPI1速度
SPI_Cmd(SPI1,ENABLE); //使能SPI1
}
/**
* @brief Initializes the SPI according to the specified parameters
* in the SPI_InitTypeDef and create the associated handle.
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
{
/* Check the SPI handle allocation */
if(hspi == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
assert_param(IS_SPI_MODE(hspi->Init.Mode));
assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
assert_param(IS_SPI_NSS(hspi->Init.NSS));
assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
if(hspi->State == HAL_SPI_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hspi->Lock = HAL_UNLOCKED;
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_SPI_MspInit(hspi);
}
hspi->State = HAL_SPI_STATE_BUSY;
/* Disble the selected SPI peripheral */
__HAL_SPI_DISABLE(hspi);
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
Communication speed, First bit and CRC calculation state */
hspi->Instance->CR1 = (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation);
/* Configure : NSS management */
hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode);
/*---------------------------- SPIx CRCPOLY Configuration ------------------*/
/* Configure : CRC Polynomial */
hspi->Instance->CRCPR = hspi->Init.CRCPolynomial;
#if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
#endif
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
hspi->State = HAL_SPI_STATE_READY;
return HAL_OK;
}
void SPI_SetSpeed(SPI_TypeDef* SPIx,u8 SPI_BaudRatePrescaler)
{
assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_BaudRatePrescaler));
SPIx->CR1&=0XFFC7;
SPIx->CR1|=SPI_BaudRatePrescaler; //设置 SPIx 速度
SPI_Cmd(SPIx,ENABLE);
}
void SPI1_SetSpeed(u8 SPI_BaudRatePrescaler)
{
assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_BaudRatePrescaler));
SPI3->CR1&=0XFFC7;
SPI3->CR1|=SPI_BaudRatePrescaler;
SPI_Cmd(SPI3,ENABLE);
}
void Spi_Set_Speed(uint8_t Speed)
{
uint16_t tmpreg = 0;
assert_param(IS_SPI_BAUDRATE_PRESCALER(Speed));
tmpreg = SPI2->CR1;
tmpreg &= ~(SPI_BaudRatePrescaler_256);// Clear prescaler
tmpreg |= Speed;
}
void bspSpiSetMode(bsp_spi_dev_t *dev, uint16_t cpol, uint16_t cpha, uint16_t br_prescaler)
{
uint16_t tmpreg = dev->spi_dev->CR1;
if (IS_SPI_CPOL(cpol) && IS_SPI_CPHA(cpha) && IS_SPI_BAUDRATE_PRESCALER(br_prescaler))
{
tmpreg &= 0xff84;
SPI_Cmd(dev->spi_dev, DISABLE);
tmpreg |= cpol | cpha | br_prescaler;
dev->spi_dev->CR1 = tmpreg;
SPI_Cmd(dev->spi_dev, ENABLE);
}
}
/*******************************************************************************
* 函数名称: SPI_Init
* 功能描述: 根据SPI_InitStruct.中的特定参数初始化SPIx外设.
* 输入参数: (1)SPIx ：x为1，2或3用于选定SPI外设。
* (2)SPI_InitStruct：指向一个包含特定SPI外设配置信息的SPI_InitTypeDef结构体的指针。
* 输出参数: 无
* 返回参数: 无
******************************************************************************/
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
{
u16 tmpreg = 0;
/* Check the parameters [检查参数]*/
assert_param(IS_SPI_ALL_PERIPH(SPIx));
/* Check the SPI parameters [检查SPI的参数]*/
assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
/*---------------------------- SPIx CR1 Configuration [SPIx CR1配置]*/
/* Get the SPIx CR1 value [取得SPIx CR1的值]*/
tmpreg = SPIx->CR1;
/* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits
清BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL 和CPHA 位*/
tmpreg &= CR1_CLEAR_Mask;
/* Configure SPIx[配置SPIx]: direction[方向], NSS management[NSS管理], first transmitted bit[第一个发送位], BaudRate prescaler[波特率预分频]
master/salve mode[主/从模式], CPOL and CPHA */
/* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value [依照SPI_Direction的值置位BIDImode, BIDIOE和RxONLY]*/
/* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values [依照SPI_Mode 和SPI_NSS的值置位SSM, SSI 和 MSTR]*/
/* Set LSBFirst bit according to SPI_FirstBit value [依照SPI_FirstBit的值置位LSBFirst]*/
/* Set BR bits according to SPI_BaudRatePrescaler value [依照SPI_BaudRatePrescaler的值置位BR]*/
/* Set CPOL bit according to SPI_CPOL value [依照SPI_CPOL的值置位CPOL]*/
/* Set CPHA bit according to SPI_CPHA value [依照SPI_CPHA的值置位CPHA]*/
tmpreg |= (u16)((u32)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
/* Write to SPIx CR1 [写SPIx CR1]*/
SPIx->CR1 = tmpreg;
/* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
SPIx->I2SCFGR &= SPI_Mode_Select;
/*---------------------------- SPIx CRCPOLY Configuration --------------------*/
/* Write to SPIx CRCPOLY [写SPIx CRCPOLY]*/
SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
}
/**
* @brief Initializes the SPIx peripheral according to the specified
* parameters in the SPI_InitStruct.
* @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
* @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
* contains the configuration information for the specified SPI peripheral.
* @retval None
*/
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
{
uint16_t tmpreg = 0;
/* check the parameters */
assert_param(IS_SPI_ALL_PERIPH(SPIx));
/* Check the SPI parameters */
assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
/*---------------------------- SPIx CR1 Configuration ------------------------*/
/* Get the SPIx CR1 value */
tmpreg = SPIx->CR1;
/* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
tmpreg &= CR1_CLEAR_Mask;
/* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
master/salve mode, CPOL and CPHA */
/* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
/* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
/* Set LSBFirst bit according to SPI_FirstBit value */
/* Set BR bits according to SPI_BaudRatePrescaler value */
/* Set CPOL bit according to SPI_CPOL value */
/* Set CPHA bit according to SPI_CPHA value */
tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
/* Write to SPIx CR1 */
SPIx->CR1 = tmpreg;
/* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
SPIx->I2SCFGR &= SPI_Mode_Select;
/*---------------------------- SPIx CRCPOLY Configuration --------------------*/
/* Write to SPIx CRCPOLY */
SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
}
/**
* @brief Initializes the SPI according to the specified parameters
* in the SPI_InitTypeDef and create the associated handle.
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
{
/* Check the SPI handle allocation */
if(hspi == NULL)
{
return HAL_ERROR;
}
/* Check the parameters */
assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
assert_param(IS_SPI_MODE(hspi->Init.Mode));
assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
assert_param(IS_SPI_NSS(hspi->Init.NSS));
assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
if(hspi->State == HAL_SPI_STATE_RESET)
{
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_SPI_MspInit(hspi);
}
hspi->State = HAL_SPI_STATE_BUSY;
/* Disble the selected SPI peripheral */
__HAL_SPI_DISABLE(hspi);
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
Communication speed, First bit and CRC calculation state */
WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation) );
/* Configure : NSS management */
WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode));
/*---------------------------- SPIx CRCPOLY Configuration ------------------*/
/* Configure : CRC Polynomial */
WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
#if defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
#endif
#if defined (STM32F101xE) || defined (STM32F103xE)
/* Check RevisionID value for identifying if Device is Rev Z (0x0001) in order to enable workaround for
CRC errors wrongly detected */
/* Pb is that ES_STM32F10xxCDE also identify an issue in Debug registers access while not in Debug mode.
Revision ID information is only available in Debug mode, so Workaround could not be implemented
to distinguish Rev Z devices (issue present) from more recent version (issue fixed).
So, in case of Revison Z F101 or F103 devices, below variable should be assigned to 1 */
uCRCErrorWorkaroundCheck = 0;
#else
uCRCErrorWorkaroundCheck = 0;
#endif
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
hspi->State = HAL_SPI_STATE_READY;
return HAL_OK;
}
int spi_read_write16(SPI_TypeDef* SPIx,uint16_t *rbuf, const uint16_t *wbuf, int cnt, uint16_t speed) {
DMA_Channel_TypeDef* DMAy_Channelx_RX=0;
DMA_Channel_TypeDef* DMAy_Channelx_TX=0;
uint16_t dummy[] = { 0xFFFF }; /* dummy if rbuf or wbuf empty */
uint32_t dmaflag;
int i;
assert_param(IS_SPI_BAUDRATE_PRESCALER(speed));
SPIx->CR1 = (SPIx->CR1 & ~SPI_BaudRatePrescaler_256) | speed;
SPI_DataSizeConfig(SPIx, SPI_DataSize_16b);
if (cnt>4) {
if (SPIx == SPI1) {
DMAy_Channelx_RX = DMA1_Channel2; // see RM0008: Table 78. Summary of DMA1 requests for each channel
DMAy_Channelx_TX = DMA1_Channel3; // see RM0008: Table 78. Summary of DMA1 requests for each channel
if (rbuf) {
dmaflag = DMA1_FLAG_TC2;
} else {
dmaflag = DMA1_FLAG_TC3;
}
} else if (SPIx == SPI2) {
DMAy_Channelx_RX = DMA1_Channel4; // see RM0008: Table 78. Summary of DMA1 requests for each channel
DMAy_Channelx_TX = DMA1_Channel5; // see RM0008: Table 78. Summary of DMA1 requests for each channel
if (rbuf) {
dmaflag = DMA1_FLAG_TC4;
} else {
dmaflag = DMA1_FLAG_TC5;
}
}
DMA_InitTypeDef DMA_InitStructure;
/* SPIx_Tx_DMA_Channel (triggered by SPIx Rx event) Config */
DMA_DeInit(DMAy_Channelx_RX);
DMA_DeInit(DMAy_Channelx_TX);
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(SPIx->DR));
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_BufferSize = cnt;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
/* RX */
if (rbuf) {
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)rbuf;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
} else {
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)dummy;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
}
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_Init(DMAy_Channelx_RX, &DMA_InitStructure);
/* TX */
if (wbuf) {
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)wbuf;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
} else {
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)dummy;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
}
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_Init(DMAy_Channelx_TX, &DMA_InitStructure);
/* enable SPIx DMA TX,RX request */
SPI_I2S_DMACmd(SPIx, SPI_I2S_DMAReq_Tx|SPI_I2S_DMAReq_Rx, ENABLE);
/* send Buffer */
DMA_Cmd(DMAy_Channelx_TX, ENABLE);
DMA_Cmd(DMAy_Channelx_RX, ENABLE);
while (DMA_GetFlagStatus(dmaflag)==RESET);
/* disable SPIx DMA */
DMA_Cmd(DMAy_Channelx_TX, DISABLE);
DMA_Cmd(DMAy_Channelx_RX, DISABLE);
SPI_I2S_DMACmd(SPIx, SPI_I2S_DMAReq_Tx|SPI_I2S_DMAReq_Rx, DISABLE);
} else {
for (i = 0; i < cnt; i++) {
while (SPI_I2S_GetFlagStatus(SPIx, SPI_I2S_FLAG_TXE) == RESET);
if (wbuf) {
SPI_I2S_SendData(SPIx, *wbuf++);
} else {
SPI_I2S_SendData(SPIx, 0xFF);
}
while (SPI_I2S_GetFlagStatus(SPIx, SPI_I2S_FLAG_RXNE) == RESET); // Receive buffer not empty flag.
if (rbuf) {
*rbuf++ = SPI_I2S_ReceiveData(SPIx);
} else {
SPI_I2S_ReceiveData(SPIx); // dump data
}
}
}
return i;
}
