/** @brief: init state flag acc to info in huart
* @details: used in Uart3Debug_Init, private
****************************************************************/
static HAL_StatusTypeDef MyHAL_UARTInit(UART_HandleTypeDef * huart) {
/* Check the UART handle allocation */
if (huart == NULL) {
return HAL_ERROR;
}
/* Check the parameters */
if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE) {
/* The hardware flow control is available only for USART1, USART2, USART3 and USART6 */
assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
} else {
assert_param(IS_UART_INSTANCE(huart->Instance));
}
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
if (huart->State == HAL_UART_STATE_RESET) {
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
/* Init the low level hardware */
// HAL_NVIC_SetPriority(USART3_IRQn, 0, 0);
// HAL_NVIC_EnableIRQ(USART3_IRQn);
}
huart->State = HAL_UART_STATE_BUSY;
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
/* Set the UART Communication parameters */
MyUARTSetConfig(huart);
/* In asynchronous mode, the following bits must be kept cleared:
* - LINEN and CLKEN bits in the USART_CR2 register,
* - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
huart->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN);
huart->Instance->CR3 &=
~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
huart->State = HAL_UART_STATE_READY;
return HAL_OK;
} /* MyHAL_UARTInit */
uint32_t UART_Init(UART_TypeDef *UARTx, UART_InitTypeDef* UART_InitStruct)
{
float baud_divisor;
uint32_t tmpreg=0x00, uartclock=0x00;
uint32_t integer_baud = 0x00, fractional_baud = 0x00;
assert_param(IS_UART_01_PERIPH(UARTx));
assert_param(IS_UART_WORD_LENGTH(UART_InitStruct->UART_WordLength));
assert_param(IS_UART_PARITY(UART_InitStruct->UART_Parity));
assert_param(IS_UART_STOPBITS(UART_InitStruct->UART_StopBits));
assert_param(IS_UART_HARDWARE_FLOW_CONTROL(UART_InitStruct->UART_HardwareFlowControl));
assert_param(IS_UART_MODE(UART_InitStruct->UART_Mode));
UARTx->CR &= ~(UART_CR_UARTEN);
// Set baudrate
CRG->UARTCLK_SSR = CRG_UARTCLK_SSR_RCLK; // Set UART Clock using internal Oscilator ( 8MHz )
//CRG->UARTCLK_SSR = CRG_UARTCLK_SSR_OCLK; // Set UART Clock using external Oscilator
uartclock = (8000000UL) / (1 << CRG->UARTCLK_PVSR);
baud_divisor = ((float)uartclock / (16 * UART_InitStruct->UART_BaudRate));
integer_baud = (uint32_t)baud_divisor;
fractional_baud = (uint32_t)((baud_divisor - integer_baud) * 64 + 0.5);
UARTx->IBRD = integer_baud;
UARTx->FBRD = fractional_baud;
tmpreg = UARTx->LCR_H;
tmpreg &= ~(0x00EE);
tmpreg |= (UART_InitStruct->UART_WordLength | UART_InitStruct->UART_StopBits | UART_InitStruct->UART_Parity);
UARTx->LCR_H |= tmpreg;
tmpreg = UARTx->CR;
tmpreg &= ~(UART_CR_CTSEn | UART_CR_RTSEn | UART_CR_RXE | UART_CR_TXE | UART_CR_UARTEN);
tmpreg |= (UART_InitStruct->UART_Mode | UART_InitStruct->UART_HardwareFlowControl);
UARTx->CR |= tmpreg;
UARTx->CR |= UART_CR_UARTEN;
return 0;
}