int
iwm_pcie_set_cmd_in_flight(struct iwm_softc *sc)
{
int ret;
/*
* wake up the NIC to make sure that the firmware will see the host
* command - we will let the NIC sleep once all the host commands
* returned. This needs to be done only on NICs that have
* apmg_wake_up_wa set.
*/
if (sc->cfg->apmg_wake_up_wa &&
!sc->cmd_hold_nic_awake) {
IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
ret = iwm_poll_bit(sc, IWM_CSR_GP_CNTRL,
IWM_CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
(IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
IWM_CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP),
15000);
if (ret == 0) {
IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL,
IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
device_printf(sc->sc_dev,
"%s: Failed to wake NIC for hcmd\n", __func__);
return EIO;
}
sc->cmd_hold_nic_awake = 1;
}
return 0;
}
void
iwm_nic_unlock(struct iwm_softc *sc)
{
if (sc->cmd_hold_nic_awake)
return;
IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL,
IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
}
void
iwm_apm_config(struct iwm_softc *sc)
{
uint16_t reg;
reg = pci_read_config(sc->sc_dev, PCIER_LINK_CTL, sizeof(reg));
if (reg & PCIEM_LINK_CTL_ASPMC_L1) {
/* Um the Linux driver prints "Disabling L0S for this one ... */
IWM_SETBITS(sc, IWM_CSR_GIO_REG,
IWM_CSR_GIO_REG_VAL_L0S_ENABLED);
} else {
/* ... and "Enabling" here */
IWM_CLRBITS(sc, IWM_CSR_GIO_REG,
IWM_CSR_GIO_REG_VAL_L0S_ENABLED);
}
}
void
iwm_pcie_clear_cmd_in_flight(struct iwm_softc *sc)
{
if (!sc->cfg->apmg_wake_up_wa)
return;
if (!sc->cmd_hold_nic_awake) {
device_printf(sc->sc_dev,
"%s: cmd_hold_nic_awake not set\n", __func__);
return;
}
sc->cmd_hold_nic_awake = 0;
IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL,
IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
}
void
iwm_nic_unlock(struct iwm_softc *sc)
{
IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL,
IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
}
