/*
** Configures raster to display image
*/
static void SetUpLCD(void)
{
/* Enable clock for LCD Module */
LCDModuleClkConfig();
LCDPinMuxSetup();
/*
**Clock for DMA,LIDD and for Core(which encompasses
** Raster Active Matrix and Passive Matrix logic)
** enabled.
*/
RasterClocksEnable(SOC_LCDC_0_REGS);
/* Disable raster */
RasterDisable(SOC_LCDC_0_REGS);
/* Configure the pclk */
//RasterClkConfig(SOC_LCDC_0_REGS, 9000000, 92000000);
RasterClkConfig(SOC_LCDC_0_REGS, 7833600, 150000000);
/* Configuring DMA of LCD controller */
RasterDMAConfig(SOC_LCDC_0_REGS, RASTER_DOUBLE_FRAME_BUFFER,
RASTER_BURST_SIZE_16, RASTER_FIFO_THRESHOLD_8,
RASTER_BIG_ENDIAN_DISABLE);
/* Configuring modes(ex:tft or stn,color or monochrome etc) for raster controller */
RasterModeConfig(SOC_LCDC_0_REGS, RASTER_DISPLAY_MODE_TFT_UNPACKED,
RASTER_PALETTE_DATA, RASTER_COLOR, RASTER_RIGHT_ALIGNED);
/* Configuring the polarity of timing parameters of raster controller */
RasterTiming2Configure(SOC_LCDC_0_REGS, RASTER_FRAME_CLOCK_LOW |
RASTER_LINE_CLOCK_LOW |
RASTER_PIXEL_CLOCK_HIGH|
RASTER_SYNC_EDGE_RISING|
RASTER_SYNC_CTRL_ACTIVE|
RASTER_AC_BIAS_HIGH , 0, 255);
#if FIVE_INCH_LCD
/* Configuring horizontal timing parameter */
RasterHparamConfig(SOC_LCDC_0_REGS, 800, 48, 40, 40);
/* Configuring vertical timing parameters */
RasterVparamConfig(SOC_LCDC_0_REGS, 480, 3, 13, 29);
#endif
#if FOUR_INCH_LCD //NHD-4.3-ATXI#-T-1
/* Configuring horizontal timing parameter */
RasterHparamConfig(SOC_LCDC_0_REGS, 480, 4, 8, 43);
/* Configuring vertical timing parameters */
RasterVparamConfig(SOC_LCDC_0_REGS, 272, 10, 4, 12);
#endif
RasterFIFODMADelayConfig(SOC_LCDC_0_REGS, 128);
}
/******************************************************************************
* *
* \brief This function Configures raster to display image.\n *
* *
* \param none *
* *
* \return none. *
* *
******************************************************************************/
static void SetUpLCD(void)
{
/* Enable clock for LCD Module */
LCDModuleClkConfig();
LCDPinMuxSetup();
/*
**Clock for DMA,LIDD and for Core(which encompasses
** Raster Active Matrix and Passive Matrix logic)
** enabled.
*/
RasterClocksEnable(SOC_LCDC_0_REGS);
/* Disable raster */
RasterDisable(SOC_LCDC_0_REGS);
/* Configure the pclk */
RasterClkConfig(SOC_LCDC_0_REGS, LCD_P_CLK, LCD_MODULE_CLK);
/* Configuring DMA of LCD controller */
RasterDMAConfig(SOC_LCDC_0_REGS, RASTER_DOUBLE_FRAME_BUFFER,
RASTER_BURST_SIZE_16, RASTER_FIFO_THRESHOLD_8,
RASTER_BIG_ENDIAN_DISABLE);
/* Configuring modes(ex:tft or stn,color or monochrome etc) for raster controller */
RasterModeConfig(SOC_LCDC_0_REGS, RASTER_DISPLAY_MODE_TFT_UNPACKED,
RASTER_PALETTE_DATA, RASTER_COLOR, RASTER_RIGHT_ALIGNED);
/* Configuring the polarity of timing parameters of raster controller */
RasterTiming2Configure(SOC_LCDC_0_REGS, RASTER_FRAME_CLOCK_LOW |
RASTER_LINE_CLOCK_LOW |
RASTER_PIXEL_CLOCK_HIGH|
RASTER_SYNC_EDGE_RISING|
RASTER_SYNC_CTRL_ACTIVE|
RASTER_AC_BIAS_HIGH , 0, LCD_NUM_OF_LINE_CLK);
/* Configuring horizontal timing parameter */
RasterHparamConfig(SOC_LCDC_0_REGS, LCD_WIDTH, HSYNC_WIDTH, H_FRONT_PORCH,
H_BACK_PORCH);
/* Configuring vertical timing parameters */
RasterVparamConfig(SOC_LCDC_0_REGS, LINES_PER_PANEL, VSYNC_WIDTH, V_FRONT_PORCH, V_BACK_PORCH);
RasterFIFODMADelayConfig(SOC_LCDC_0_REGS, LCDC_FIFO_DELAY);
}