Example #1
0
/*
 LCD module initialization according to LCDConfig.h
 it is used as default configuration of the LCD 
 */
void vfnLCD_Init(void) {

     // enable IRCLK
     /*Enable IRCLK LCD source and disconnect from FLL by clearing IREFS */
     MCG_C1= 0x02;
     
     SIM_SCGC5 |= SIM_SCGC5_SLCD_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK;
     
     // Enable IRCLK 
     MCG_C1 |= MCG_C1_IRCLKEN_MASK | MCG_C1_IREFSTEN_MASK;
     MCG_C2 |= !MCG_C2_IRCS_MASK ;  //0 32KHZ internal reference clock; 1= 4MHz irc

     
       
     //vfnLCD_interrupt_init();       
     
     LCD_GCR = 0x0;
     LCD_AR  = 0x0;

 //    lcd_pinmux(0); 
     
/* LCD configurartion according to */     
      LCD_GCR =  (  LCD_GCR_RVEN_MASK*_LCDRVEN  
                   | LCD_GCR_RVTRIM(_LCDRVTRIM)    //0-15
                   | LCD_GCR_CPSEL_MASK*_LCDCPSEL 
                 /*  | LCD_GCR_HREFSEL_MASK*_LCDHREF  */
                    |LCD_GCR_LADJ(_LCDLOADADJUST)     //0-3*/
                 /*  | LCD_GCR_VSUPPLY(_LCDSUPPLY)  //0-3*/
                  /* |!LCD_GCR_LCDIEN_MASK */
                   |!LCD_GCR_FDCIEN_MASK
                   | LCD_GCR_ALTDIV(_LCDALTDIV)  //0-3
               /*    |!LCD_GCR_LCDWAIT_MASK  */
                   |!LCD_GCR_LCDSTP_MASK
                   |!LCD_GCR_LCDEN_MASK 
                   | LCD_GCR_SOURCE_MASK*_LCDCLKSOURCE
                   | LCD_GCR_ALTSOURCE_MASK*_LCDALRCLKSOURCE  
                   | LCD_GCR_LCLK(_LCDLCK)   //0-7
                   | LCD_GCR_DUTY(_LCDDUTY)   //0-7
                 );    
     
      lcd_alternate_mode = LCD_NORMAL_MODE;          //Message will be written to default backplanes  if = 4
     
      vfnLCD_EnablePins();         // Enable LCD pins and **Configure BackPlanes**
      
      LCD_GCR |= LCD_GCR_LCDEN_MASK;
   /*   LCD_GCR |= LCD_GCR_LCDIEN_MASK;    // Enable interrupts */
      
      
   /* Configure LCD Auxiliar Register*/   
      LCD_AR  = LCD_AR_BRATE(_LCDBLINKRATE); // all other flags set as zero
      vfnLCD_Write_Msg("1235");

}
Example #2
0
void vfnLCD_Init(void)
{

   

     SIM_SCGC5 |= SIM_SCGC5_SLCD_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK;
     
     //* configure pins for LCD operation    
  PORTC_PCR20 = 0x00000000;     //VLL2
  PORTC_PCR21 = 0x00000000;     //VLL1
  PORTC_PCR22 = 0x00000000;     //VCAP2
  PORTC_PCR23 = 0x00000000;     //VCAP1

     
     
     // Enable IRCLK 
     MCG_C1  = MCG_C1_IRCLKEN_MASK | MCG_C1_IREFSTEN_MASK;
     MCG_C2 &= ~MCG_C2_IRCS_MASK ;  //0 32KHZ internal reference clock; 1= 4MHz irc


     vfnLCD_interrupt_init();       
     
     LCD_GCR = 0x0;
     LCD_AR  = 0x0;

 //    lcd_pinmux(0); 
     
/* LCD configurartion according to */     
      LCD_GCR =  (   LCD_GCR_RVEN_MASK*_LCDRVEN  
                   | LCD_GCR_RVTRIM(_LCDRVTRIM)    //0-15
                   | LCD_GCR_CPSEL_MASK*_LCDCPSEL 
                   | LCD_GCR_LADJ(_LCDLOADADJUST)     //0-3*/
                   | LCD_GCR_VSUPPLY_MASK*_LCDSUPPLY  //0-1*/
                   |!LCD_GCR_FDCIEN_MASK
                   | LCD_GCR_ALTDIV(_LCDALTDIV)  //0-3
                   |!LCD_GCR_LCDDOZE_MASK  
                   |!LCD_GCR_LCDSTP_MASK
                   |!LCD_GCR_LCDEN_MASK    //WILL BE ENABLE ON SUBSEQUENT STEP
                   | LCD_GCR_SOURCE_MASK*_LCDCLKSOURCE
                   | LCD_GCR_ALTSOURCE_MASK*_LCDALRCLKSOURCE  
                   | LCD_GCR_LCLK(_LCDLCK)   //0-7
                   | LCD_GCR_DUTY(_LCDDUTY)   //0-7
                 );    
     
      lcd_alternate_mode = LCD_NORMAL_MODE;          //Message will be written to default backplanes  if = 4
     
      vfnEnablePins();         // Enable LCD pins and Configure BackPlanes
 
      
      LCD_GCR |= LCD_GCR_LCDEN_MASK;
   /*   LCD_GCR |= LCD_GCR_LCDIEN_MASK;    // Enable interrupts */
      
      
   /* Configure LCD Auxiliar Register*/   
      LCD_AR  = LCD_AR_BRATE(_LCDBLINKRATE); // all other flags set as zero
     // print_slcd_registers();
      
     
      
     
  }