/* ===================================================================*/
LDD_TDeviceData* FTM_Init(LDD_TUserData *UserDataPtr)
{
/* Allocate device structure */
FTM_TDeviceData *DeviceDataPrv;
/* {MQXLite RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
/* Interrupt vector(s) allocation */
/* {MQXLite RTOS Adapter} Save old and set new interrupt vector (function handler and ISR parameter) */
/* Note: Exception handler for interrupt is not saved, because it is not modified */
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrData = _int_get_isr_data(LDD_ivIndex_INT_LPTimer);
DeviceDataPrv->SavedISRSettings_TUInterrupt.isrFunction = _int_install_isr(LDD_ivIndex_INT_LPTimer, FTM_Interrupt, DeviceDataPrv);
/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=1,TIE=0,TPS=0,TPP=0,TFC=0,TMS=0,TEN=0 */
LPTMR0_CSR = (LPTMR_CSR_TCF_MASK | LPTMR_CSR_TPS(0x00)); /* Clear control register */
/* LPTMR0_CMR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COMPARE=0x1387 */
LPTMR0_CMR = LPTMR_CMR_COMPARE(0x1387); /* Set up compare register */
/* LPTMR0_PSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,PRESCALE=1,PBYP=0,PCS=0 */
LPTMR0_PSR = (LPTMR_PSR_PRESCALE(0x01) | LPTMR_PSR_PCS(0x00)); /* Set up prescaler register */
/* NVICIP58: PRI58=0x70 */
NVICIP58 = NVIC_IP_PRI58(0x70);
/* NVICISER1: SETENA|=0x04000000 */
NVICISER1 |= NVIC_ISER_SETENA(0x04000000);
/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=0,TIE=1,TPS=0,TPP=0,TFC=0,TMS=0,TEN=1 */
LPTMR0_CSR = (LPTMR_CSR_TIE_MASK | LPTMR_CSR_TPS(0x00) | LPTMR_CSR_TEN_MASK); /* Set up control register */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_FTM_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the device data structure */
}
ER lptmr_pulse_capture_init(PIN pin)
{
SIM_SCGC5 |= SIM_SCGC5_LPTIMER_MASK; /*使能LPT模块时钟*/
lptmr_registers_clear();
switch (pin)
{
case PTA19:
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK; /*打开 PORTA 时钟*/
PORTA_PCR19 = PORT_PCR_MUX(0x6); /*在PTA19上使用 ALT6*/
LPTMR0_CSR = LPTMR_CSR_TPS(0x01); /*设置LPT使用选择的引脚*/
break;
case PTC5:
SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK; /*打开 PORTC 时钟*/
PORTC_PCR5 = PORT_PCR_MUX(0x4); /*在PTC5上使用 ALT4*/
LPTMR0_CSR = LPTMR_CSR_TPS(0x02); /*设置LPT使用选择的引脚*/
break;
default:
return E_OBJ;
}
LPTMR0_PSR |= LPTMR_PSR_PBYP_MASK; /*设定PBYP为1即每捕捉到一次上升沿计数器累加一次*/
LPTMR0_CMR = LPTMR_CMR_COMPARE(LPTMR_PULSE_COMPARE); /*设置比较值*/
LPTMR0_CSR |= LPTMR_CSR_TMS_MASK; /*进入脉冲累加模式,上升沿捕捉*/
LPTMR0_CSR |= LPTMR_CSR_TEN_MASK; /*开启 LPT模块*/
return E_OK;
}
/*---------------------------------------------------------------------------*/
void
rtimer_arch_init(void)
{
#if RTIMER_CONF_USE_LPTMR
/* SIM_SCGC5: LPTMR=1 */
SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK;
LPTMR0_CSR = (LPTMR_CSR_TCF_MASK | LPTMR_CSR_TPS(0x00) | LPTMR_CSR_TFC_MASK); /* Clear control register */
LPTMR0_CMR = LPTMR_CMR_COMPARE(LPTMR_CMR_COMPARE_MASK); /* Set up compare register */
LPTMR0_PSR = LPTMR_PSR_PRESCALE(0x00) |
LPTMR_PSR_PBYP_MASK |
LPTMR_PSR_PCS(0x01); /* Set up prescaler register */
LPTMR0_CSR = (LPTMR_CSR_TPS(0x00) | LPTMR_CSR_TEN_MASK); /* Set up control register */
#else
/* SIM_SCGC6: TPM0=1 */
SIM_SCGC6 |= SIM_SCGC6_TPM0_MASK;
TPM0_SC = (TPM_SC_CMOD(0x00) | TPM_SC_PS(0x00)); /* Clear status and control register */
TPM0_CNT = TPM_CNT_COUNT(0x00); /* Reset counter register */
TPM0_C1SC = 0x00U; /* Clear channel status and control register */
TPM0_C2SC = 0x00U; /* Clear channel status and control register */
TPM0_C3SC = 0x00U; /* Clear channel status and control register */
TPM0_C4SC = 0x00U; /* Clear channel status and control register */
TPM0_C5SC = 0x00U; /* Clear channel status and control register */
TPM0_MOD = TPM_MOD_MOD(0xFFFF); /* Set up modulo register */
TPM0_C0SC = (TPM_CnSC_CHIE_MASK | TPM_CnSC_MSA_MASK); /* Set up channel status and control register */
TPM0_C0V = TPM_CnV_VAL(0x00); /* Set up channel value register */
TPM0_SC = (TPM_SC_CMOD(0x01) | TPM_SC_PS(0x05)); /* Set up status and control register */
#endif /* RTIMER_CONF_USE_LPTMR */
PRINTF("rtimer_arch_init done\n");
}
/**
* @brief 初始化配置LPTM模块处于脉冲计数模式
* @code
* //设置LPTM工作在脉冲计数模式，计数上限是0xFFFE
* LPTMR_PC_InitTypeDef LPTMR_PC_InitStruct1; //申请一个结构变量
* LPTMR_PC_InitStruct1.timeInMs = 500; //设置计时时间是500ms
* LPTMR_TC_Init(&LPTMR_TC_InitStruct1);
* @endcode
* @param LPTMR_PC_InitTypeDef: 工作配置结构体
* @arg counterOverflowValue :计数器计数上限，极限为0xFFFF
* @arg inputSource :脉冲源选择 kLPTMR_PC_InputSource_CMP0-CMP0作为脉冲计数时钟源 kLPTMR_PC_InputSource_ALT1-外部引脚LPTMR_ALT1作为外部计数时钟源 kLPTMR_PC_InputSource_ALT2-外部引脚LPTMR_ALT2作为外部计数时钟源
* @arg pinPolarity :脉冲计数极性选择 kLPTMR_PC_PinPolarity_RigsingEdge 上升沿计数 kLPTMR_PC_PinPolarity_FallingEdge 下降沿计数
* @retval None
*/
void LPTMR_PC_Init(LPTMR_PC_InitTypeDef* LPTMR_PC_InitStruct)
{
/* open clock gate */
*(uint32_t*)SIM_LPTMRClockGateTable[0].addr |= SIM_LPTMRClockGateTable[0].mask;
LPTMR0->CSR = 0x00;
LPTMR0->PSR = 0x00;
LPTMR0->CMR = 0x00;
/* disable module first */
LPTMR0->CSR &= ~LPTMR_CSR_TEN_MASK;
/* free counter will reset whenever compare register is writtened. */
LPTMR0->CSR &= ~LPTMR_CSR_TFC_MASK;
/* timer counter mode */
LPTMR0->CSR |= LPTMR_CSR_TMS_MASK;
/* bypass the glitch filter, which mean we use 1KHZ LPO directly */
LPTMR0->PSR = LPTMR_PSR_PCS(1)| LPTMR_PSR_PBYP_MASK;
/* set CMR(compare register) */
LPTMR0->CMR = LPTMR_CMR_COMPARE(LPTMR_PC_InitStruct->counterOverflowValue);
/* input source */
switch(LPTMR_PC_InitStruct->inputSource)
{
case kLPTMR_PC_InputSource_CMP0:
LPTMR0->CSR |= LPTMR_CSR_TPS(0);
break;
case kLPTMR_PC_InputSource_ALT1:
LPTMR0->CSR |= LPTMR_CSR_TPS(1);
break;
case kLPTMR_PC_InputSource_ALT2:
LPTMR0->CSR |= LPTMR_CSR_TPS(2);
break;
default:
break;
}
/* pin polarity */
switch(LPTMR_PC_InitStruct->pinPolarity)
{
case kLPTMR_PC_PinPolarity_RigsingEdge:
LPTMR0->CSR &= ~LPTMR_CSR_TPP_MASK;
break;
case kLPTMR_PC_PinPolarity_FallingEdge:
LPTMR0->CSR |= LPTMR_CSR_TPP_MASK;
break;
default:
break;
}
/* enable moudle */
LPTMR0->CSR |= LPTMR_CSR_TEN_MASK;
}
/*-----------------------------------------------------------*/
void vPortInitTickTimer(void) {
#if configUSE_TICKLESS_IDLE == 1
{
#if TICK_NOF_BITS==32
xMaximumPossibleSuppressedTicks = 0xffffffffUL/TIMER_COUNTS_FOR_ONE_TICK; /* 32bit timer register */
#elif TICK_NOF_BITS==24
xMaximumPossibleSuppressedTicks = 0xffffffUL/TIMER_COUNTS_FOR_ONE_TICK; /* 24bit timer register */
#elif TICK_NOF_BITS==16
xMaximumPossibleSuppressedTicks = 0xffffUL/TIMER_COUNTS_FOR_ONE_TICK; /* 16bit timer register */
#elif TICK_NOF_BITS==8
xMaximumPossibleSuppressedTicks = 0xffUL/TIMER_COUNTS_FOR_ONE_TICK; /* 8bit timer register */
#else
error "unknown configuration!"
#endif
#if configSYSTICK_USE_LOW_POWER_TIMER
ulStoppedTimerCompensation = configSTOPPED_TIMER_COMPENSATION/(configCPU_CLOCK_HZ/configSYSTICK_LOW_POWER_TIMER_CLOCK_HZ);
#else
ulStoppedTimerCompensation = configSTOPPED_TIMER_COMPENSATION/(configCPU_CLOCK_HZ/configSYSTICK_CLOCK_HZ);
#endif
}
#endif /* configUSE_TICKLESS_IDLE */
#if configSYSTICK_USE_LOW_POWER_TIMER
SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK; /* enable clock: SIM_SCGC5: LPTMR=1 */
/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=1,TIE=0,TPS=0,TPP=0,TFC=0,TMS=0,TEN=0 */
LPTMR0_CSR = (LPTMR_CSR_TCF_MASK | LPTMR_CSR_TPS(0x00)); /* Clear control register */
/* LPTMR0_PSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,PRESCALE=0,PBYP=1,PCS=1 */
LPTMR0_PSR = LPTMR_PSR_PRESCALE(0x00) | /* prescaler value */
LPTMR_PSR_PBYP_MASK | /* prescaler bypass */
LPTMR_PSR_PCS(0x01); /* Clock source */
/*
* PBYP PCS
* ERCLK32 1 10
* LPO_1kHz 1 01
* ERCLK 0 00
* IRCLK 1 00
*/
*(portNVIC_SYSPRI7) |= portNVIC_LP_TIMER_PRI; /* set priority of low power timer interrupt */
/* NVIC_ISER: SETENA|=0x10000000 */
NVIC_ISER |= NVIC_ISER_SETENA(0x10000000); /* 0xE000E100 <= 0x10000000 */
/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=0,TIE=0,TPS=0,TPP=0,TFC=0,TMS=0,TEN=1 */
LPTMR0_CSR = (LPTMR_CSR_TPS(0x00) | LPTMR_CSR_TEN_MASK); /* Set up control register */
#else /* use normal SysTick Counter */
*(portNVIC_SYSPRI3) |= portNVIC_SYSTICK_PRI; /* set priority of SysTick interrupt */
#endif
/* Configure timer to interrupt at the requested rate. */
SET_TICK_DURATION(TIMER_COUNTS_FOR_ONE_TICK-1UL);
RESET_TICK_COUNTER_VAL();
ENABLE_TICK_COUNTER();
}
/*******************************************************************************
*
* PROCEDURE NAME:
* lptmr_init -
*
*******************************************************************************/
void lptmr_init(int count, int clock_source)
{
SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK;
LPTMR0_PSR = ( LPTMR_PSR_PRESCALE(0) // 0000 is div 2
| LPTMR_PSR_PBYP_MASK // LPO feeds directly to LPT
| LPTMR_PSR_PCS(clock_source)) ; // use the choice of clock
if (clock_source== 0)
printf("\n LPTMR Clock source is the MCGIRCLK \n\r");
if (clock_source== 1)
printf("\n LPTMR Clock source is the LPOCLK \n\r");
if (clock_source== 2)
printf("\n LPTMR Clock source is the ERCLK32 \n\r");
if (clock_source== 3)
printf("\n LPTMR Clock source is the OSCERCLK \n\r");
LPTMR0_CMR = LPTMR_CMR_COMPARE(count); //Set compare value
LPTMR0_CSR =( LPTMR_CSR_TCF_MASK // Clear any pending interrupt
| LPTMR_CSR_TIE_MASK // LPT interrupt enabled
| LPTMR_CSR_TPS(0) //TMR pin select
|!LPTMR_CSR_TPP_MASK //TMR Pin polarity
|!LPTMR_CSR_TFC_MASK // Timer Free running counter is reset whenever TMR counter equals compare
|!LPTMR_CSR_TMS_MASK //LPTMR0 as Timer
);
LPTMR0_CSR |= LPTMR_CSR_TEN_MASK; //Turn on LPT and start counting
}
/*!
* brief Ungates the LPTMR clock and configures the peripheral for a basic operation.
*
* note This API should be called at the beginning of the application using the LPTMR driver.
*
* param base LPTMR peripheral base address
* param config A pointer to the LPTMR configuration structure.
*/
void LPTMR_Init(LPTMR_Type *base, const lptmr_config_t *config)
{
assert(config);
#if defined(LPTMR_CLOCKS)
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
uint32_t instance = LPTMR_GetInstance(base);
/* Ungate the LPTMR clock*/
CLOCK_EnableClock(s_lptmrClocks[instance]);
#if defined(LPTMR_PERIPH_CLOCKS)
CLOCK_EnableClock(s_lptmrPeriphClocks[instance]);
#endif
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
#endif /* LPTMR_CLOCKS */
/* Configure the timers operation mode and input pin setup */
base->CSR = (LPTMR_CSR_TMS(config->timerMode) | LPTMR_CSR_TFC(config->enableFreeRunning) |
LPTMR_CSR_TPP(config->pinPolarity) | LPTMR_CSR_TPS(config->pinSelect));
/* Configure the prescale value and clock source */
base->PSR = (LPTMR_PSR_PRESCALE(config->value) | LPTMR_PSR_PBYP(config->bypassPrescaler) |
LPTMR_PSR_PCS(config->prescalerClockSource));
}
/* ===================================================================*/
LDD_TDeviceData* TU1_Init(LDD_TUserData *UserDataPtr)
{
TU1_TDeviceData *DeviceDataPrv;
if (PE_LDD_DeviceDataList[PE_LDD_COMPONENT_TU1_ID] == NULL) {
/* Allocate device structure */
/* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
DeviceDataPrv->InitCntr = 1U; /* First initialization */
}
else {
/* Memory is already allocated */
DeviceDataPrv = (TU1_TDeviceDataPtr) PE_LDD_DeviceDataList[PE_LDD_COMPONENT_TU1_ID];
DeviceDataPrv->UserDataPtr = UserDataPtr; /* Store the RTOS device structure */
DeviceDataPrv->InitCntr++; /* Increment counter of initialization */
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the device data structure */
}
/* Interrupt vector(s) allocation */
/* {Default RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */
INT_LPTimer__DEFAULT_RTOS_ISRPARAM = DeviceDataPrv;
/* SIM_SCGC5: LPTMR=1 */
SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK;
/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=1,TIE=0,TPS=0,TPP=0,TFC=0,TMS=0,TEN=0 */
LPTMR0_CSR = (LPTMR_CSR_TCF_MASK | LPTMR_CSR_TPS(0x00)); /* Clear control register */
/* LPTMR0_CMR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COMPARE=0xFFFF */
LPTMR0_CMR = LPTMR_CMR_COMPARE(0xFFFF); /* Set up compare register */
/* LPTMR0_PSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,PRESCALE=0,PBYP=1,PCS=0 */
LPTMR0_PSR = LPTMR_PSR_PRESCALE(0x00) |
LPTMR_PSR_PBYP_MASK |
LPTMR_PSR_PCS(0x00); /* Set up prescaler register */
/* NVIC_IPR7: PRI_28=0x80 */
NVIC_IPR7 = (uint32_t)((NVIC_IPR7 & (uint32_t)~(uint32_t)(
NVIC_IP_PRI_28(0x7F)
)) | (uint32_t)(
NVIC_IP_PRI_28(0x80)
));
/* NVIC_ISER: SETENA|=0x10000000 */
NVIC_ISER |= NVIC_ISER_SETENA(0x10000000);
/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=0,TIE=1,TPS=0,TPP=0,TFC=0,TMS=0,TEN=1 */
LPTMR0_CSR = (LPTMR_CSR_TIE_MASK | LPTMR_CSR_TPS(0x00) | LPTMR_CSR_TEN_MASK); /* Set up control register */
/* Registration of the device structure */
PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_TU1_ID,DeviceDataPrv);
return ((LDD_TDeviceData *)DeviceDataPrv); /* Return pointer to the device data structure */
}
/*FUNCTION**********************************************************************
*
* Function Name : LPTMR_HAL_SetTimerWorkingMode
* Description : Config the LPTMR working mode.
*
*END**************************************************************************/
void LPTMR_HAL_SetTimerWorkingMode(LPTMR_Type * base, lptmr_working_mode_user_config_t timerMode)
{
uint32_t csr;
csr = LPTMR_RD_CSR(base);
csr &= ~(LPTMR_CSR_TCF_MASK | LPTMR_CSR_TMS_MASK | LPTMR_CSR_TFC_MASK
| LPTMR_CSR_TPP_MASK | LPTMR_CSR_TPS_MASK);
csr |= LPTMR_CSR_TMS(timerMode.timerModeSelect)
| LPTMR_CSR_TFC(timerMode.freeRunningEnable)
| LPTMR_CSR_TPP(timerMode.pinPolarity)
| LPTMR_CSR_TPS(timerMode.pinSelect);
LPTMR_WR_CSR(base, csr);
}
void LPTMR_Init(LPTMR_Type *base, const lptmr_config_t *config)
{
assert(config);
/* Ungate the LPTMR clock*/
CLOCK_EnableClock(s_lptmrClocks[LPTMR_GetInstance(base)]);
/* Configure the timers operation mode and input pin setup */
base->CSR = (LPTMR_CSR_TMS(config->timerMode) | LPTMR_CSR_TFC(config->enableFreeRunning) |
LPTMR_CSR_TPP(config->pinPolarity) | LPTMR_CSR_TPS(config->pinSelect));
/* Configure the prescale value and clock source */
base->PSR = (LPTMR_PSR_PRESCALE(config->value) | LPTMR_PSR_PBYP(config->bypassPrescaler) |
LPTMR_PSR_PCS(config->prescalerClockSource));
}
/*************************************************************************
* 野火嵌入式开发工作室
*
* 函数名称：lptmr_counter_init
* 功能说明：LPT累加捕捉
* 参数说明：LPT0_ALTn 输入管脚号 ，只能是 LPT0_ALT1、LPT0_ALT2
* count 产生中断的累加计数值
* PrescaleValue 延时滤波
* LPT_CFG 触发方式
* 函数返回：无
* 修改时间：2012-3-14
* 备 注：
*************************************************************************/
void lptmr_counter_init(LPT0_ALTn altn,u16 count,u8 PrescaleValue,LPT_CFG cfg)
{
if(PrescaleValue > 0x0f)PrescaleValue=0x0f;
//设置输入管脚
if(altn==LPT0_ALT1)
{
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK; //打开 PORTA 时钟
PORTA_PCR19=PORT_PCR_MUX(0x6); //在PTA19上使用 ALT6
}
else if(altn==LPT0_ALT2)
{
SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK; //使能 PORTC 时钟
PORTC_PCR5=PORT_PCR_MUX(0x4); //在PTC5上使用 ALT4
}
else //不可能发生事件
{
assert_failed(__FILE__, __LINE__); //设置管脚有误？
}
/* 开启模块时钟 */
SIM_SCGC5|=SIM_SCGC5_LPTIMER_MASK; //使能LPT模块时钟
/* 清状态寄存器 */
LPTMR0_CSR=0x00; //先关了LPT，这样才能设置时钟分频等
/* 设置累加计数值 */
LPTMR_CMR_REG(LPTMR0_BASE_PTR) = LPTMR_CMR_COMPARE(count); //设置比较值
/* 时钟选择 */
LPTMR_PSR_REG(LPTMR0_BASE_PTR) = LPTMR_PSR_PCS(0x1) | LPTMR_PSR_PBYP_MASK | LPTMR_PSR_PRESCALE(PrescaleValue); //使用 LPO clock 且 bypass glitch filter
// 开启和配置脉冲滤波器：2^n个时钟上升沿才识别
/* 管脚设置、使能中断 */
LPTMR_CSR_REG(LPTMR0_BASE_PTR) = LPTMR_CSR_TPS(altn)| LPTMR_CSR_TMS_MASK | ( cfg ==LPT_Falling ? LPTMR_CSR_TPP_MASK : 0 ) | LPTMR_CSR_TEN_MASK | LPTMR_CSR_TIE_MASK ;
// 选择输入管脚 选择脉冲计数 下降沿 上升沿 使能LPT
// TFC = 0，即计数值等于比较值时，计数值复位
enable_irq(LPTMR_irq); //开引脚的IRQ中断
}
/*
* Counts pulses found on LPTMR0_ALT1 and LPTMR0_ALT2.
* LPTMR0_ALT3 not supported on TWR-K60N512 or TWR-K40X256
*
* LPTMR0_ALT1 is pin PORTA19 (ALT6)
* On TWR-K40X256, PORT19 is connected to XTAL and thus should not be
* driven by an external source, as it will conflict with the crystal clock
* on the board.
* On TWR-K60N512, PORTA19 is conected to pin 18 on J15
*
* LPTMR0_ALT2 is pin PORTC5 (ALT4).
* On TWR-K40X256, PORTC5 is connected to pin 18 on J15
* On TWR-K60N512, PORTC5 is conected A70 on TWR-ELEV
*
*
*
*/
void lptmr_pulse_counter(char pin_select)
{
unsigned int compare_value=1000;
char input;
printf("\n\n****************************\n");
printf("LPTMR Pulse Counting Example on LPTMR_ALT%d\n\n",pin_select);
//Reset LPTMR module
lptmr_clear_registers();
//Set up GPIO
if(pin_select==LPTMR_ALT1)
{
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK; //Turn on PORTA clock
PORTA_PCR19=PORT_PCR_MUX(0x6); //Use ALT6 on PTA19
printf("Testing ALT1 pin on PORTA19\n");
printf("\tTWR-K40X256: ALT1 is connected to XTAL and should not be driven\n");
printf("\tTWR-K60N512: ALT1 is conected to pin 18 on J15\n");
}
else if(pin_select==LPTMR_ALT2)
{
SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK; //Turn on PORTC clock
PORTC_PCR5=PORT_PCR_MUX(0x4); //Use ALT4 on PTC5
printf("Testing ALT2 pin on PORTC5\n");
printf("\tTWR-K40X256: ALT2 is connected to pin 18 on J15\n");
printf("\tTWR-K60N512: ALT2 is conected A70 on TWR-ELEV\n");
}
else
{
printf("Invalid pin selected\n");
printf("****************************\n");
return;
}
/* Test requires external hardware. Need to confirm if want to run test or not */
printf("\nThis test requires a function generator, or another way of producing a pulse signal on the pin specified above. ");
printf("Please connect that device to the specified pin (Except if using ALT1 on the TWR-K40X256)\n\n");
printf("If you would like to continue with this example, press \"y\". To skip press any other key\n");
input=in_char(); //wait for keyboard press
printf("\n");
if(input!='y' && input!='Y')
{
printf("Exiting LPTMR Pulse Counting Example on LPTMR_ALT%d\n",pin_select);
printf("****************************\n");
return;
}
LPTMR0_PSR=LPTMR_PSR_PCS(0x1)|LPTMR_PSR_PBYP_MASK; //Use LPO clock but bypass glitch filter
LPTMR0_CMR=LPTMR_CMR_COMPARE(compare_value); //Set compare value
LPTMR0_CSR=LPTMR_CSR_TPS(pin_select)|LPTMR_CSR_TMS_MASK; //Set LPT to use the pin selected, and put in pulse count mode, on rising edge (default)
printf("Press any key to start pulse counter\n");
in_char(); //wait for keyboard press
LPTMR0_CSR|=LPTMR_CSR_TEN_MASK; //Turn on LPT
//Wait for compare flag to be set
while((LPTMR0_CSR&LPTMR_CSR_TCF_MASK)==0)
{
//This may not get proper counter data if the CNR is read at the same time it is incremented
printf("Current value of pulse count register CNR is %d\n",LPTMR0_CNR);
}
printf("Detected %d pulses on LPTMR_ALT%d\n",compare_value,pin_select);
printf("End of Pulse Counting Example\n");
printf("****************************\n");
}
void CIO::startInt()
{
// Initialise the DAC
SIM_SCGC2 |= SIM_SCGC2_DAC0;
DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 3.3V VDDA is DACREF_2
// Initialise ADC0
SIM_SCGC6 |= SIM_SCGC6_ADC0;
ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
ADC0_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
ADC0_SC2 = ADC_SC2_REFSEL(0) | ADC_SC2_ADTRG; // Voltage ref external, hardware trigger
ADC0_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
ADC0_SC3 |= ADC_SC3_CAL;
while (ADC0_SC3 & ADC_SC3_CAL) // Wait for calibration
;
uint16_t sum0 = ADC0_CLPS + ADC0_CLP4 + ADC0_CLP3 + // Plus side gain
ADC0_CLP2 + ADC0_CLP1 + ADC0_CLP0;
sum0 = (sum0 / 2U) | 0x8000U;
ADC0_PG = sum0;
ADC0_SC1A = ADC_SC1_AIEN | PIN_ADC; // Enable ADC interrupt, use A0
NVIC_ENABLE_IRQ(IRQ_ADC0);
#if defined(SEND_RSSI_DATA)
// Initialise ADC1
SIM_SCGC3 |= SIM_SCGC3_ADC1;
ADC1_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
ADC1_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
ADC1_SC2 = ADC_SC2_REFSEL(0); // Voltage ref external, software trigger
ADC1_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
ADC1_SC3 |= ADC_SC3_CAL;
while (ADC1_SC3 & ADC_SC3_CAL) // Wait for calibration
;
uint16_t sum1 = ADC1_CLPS + ADC1_CLP4 + ADC1_CLP3 + // Plus side gain
ADC1_CLP2 + ADC1_CLP1 + ADC1_CLP0;
sum1 = (sum1 / 2U) | 0x8000U;
ADC1_PG = sum1;
#endif
#if defined(EXTERNAL_OSC)
// Set ADC0 to trigger from the LPTMR at 24 kHz
SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | // Enable ADC0 alternate trigger
SIM_SOPT7_ADC0TRGSEL(14); // Trigger ADC0 by LPTMR0
CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
SIM_SCGC5 |= SIM_SCGC5_LPTIMER; // Enable Low Power Timer Access
LPTMR0_CSR = 0; // Disable
LPTMR0_PSR = LPTMR_PSR_PBYP; // Bypass prescaler/filter
LPTMR0_CMR = (EXTERNAL_OSC / 24000) - 1; // Frequency divided by CMR + 1
LPTMR0_CSR = LPTMR_CSR_TPS(2) | // Pin: 0=CMP0, 1=xtal, 2=pin13
LPTMR_CSR_TMS; // Mode Select, 0=timer, 1=counter
LPTMR0_CSR |= LPTMR_CSR_TEN; // Enable
#else
// Setup PDB for ADC0 at 24 kHz
SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock
PDB0_MOD = (F_BUS / 24000) - 1; // Timer period - 1
PDB0_IDLY = 0; // Interrupt delay
PDB0_CH0C1 = PDB_CHnC1_TOS | PDB_CHnC1_EN; // Enable pre-trigger for ADC0
PDB0_SC = PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | // SW trigger, enable interrupts, continuous mode
PDB_SC_PDBIE | PDB_SC_CONT | PDB_SC_LDOK; // No prescaling
PDB0_SC |= PDB_SC_SWTRIG; // Software trigger (reset and restart counter)
#endif
digitalWrite(PIN_PTT, m_pttInvert ? HIGH : LOW);
digitalWrite(PIN_COSLED, LOW);
digitalWrite(PIN_LED, HIGH);
}
