//----------------------------------------------------------------------
// Initializes VEX
// It must be called before using VEX for translation to Valgrind IR
//----------------------------------------------------------------------
void
translate_init ()
{
static int initialized = 0;
if (initialized)
return;
initialized = 1;
//
// Initialize VEX
//
VexControl vc;
vc.iropt_verbosity = 0;
//vc.iropt_level = 0; // No optimization by default
vc.iropt_level = 2;
vc.iropt_precise_memory_exns = False;
vc.iropt_unroll_thresh = 0;
vc.guest_max_insns = 1; // By default, we translate 1 instruction at a time
vc.guest_chase_thresh = 0;
LibVEX_Init (&failure_exit, &log_bytes, 0, // Debug level
False, // Valgrind support
&vc);
LibVEX_default_VexArchInfo (&vai);
// Setup the translation args
vta.arch_guest = VexArch_INVALID; // to be assigned later
//vta.arch_guest = VexArchARM;
//vta.arch_guest = VexArchX86; // Source arch
vta.archinfo_guest = vai;
// FIXME: detect this one automatically
#ifdef AMD64
vta.arch_host = VexArchAMD64;
#else
vta.arch_host = VexArchX86; // Target arch
#endif
vta.archinfo_host = vai;
vta.guest_bytes = NULL; // Set in translate_insns
vta.guest_bytes_addr = 0; // Set in translate_insns
vta.callback_opaque = NULL; // Used by chase_into_ok, but never actually called
vta.chase_into_ok = chase_into_ok; // Always returns false
vta.preamble_function = NULL;
vta.guest_extents = &vge;
#ifdef AMD64
vta.host_bytes = NULL; // Buffer for storing the output binary
vta.host_bytes_size = 0;
vta.host_bytes_used = NULL;
#else
vta.host_bytes = tmpbuf; // Buffer for storing the output binary
vta.host_bytes_size = TMPBUF_SIZE;
vta.host_bytes_used = &tmpbuf_used;
#endif
vta.instrument1 = instrument1; // Callback we defined to help us save the IR
vta.instrument2 = NULL;
vta.do_self_check = False;
vta.traceflags = 0; // Debug verbosity
vta.dispatch = dispatch; // Not used
}
void
init_sli(void)
{
VexControl vcon;
std::set_terminate(__gnu_cxx::__verbose_terminate_handler);
vexInitHeap();
LibVEX_default_VexControl(&vcon);
vcon.iropt_level = 0;
vcon.iropt_unroll_thresh = 0;
vcon.guest_chase_thresh = 0;
//vcon.guest_max_insns = 1;
LibVEX_Init(failure_exit, log_bytes, 0, 0, &vcon);
signal(SIGUSR1, handle_sigusr1);
initialise_timers();
initialise_profiling();
on_exit(exitfunc, NULL);
}
int main(int argc, char **argv)
{
const int multiarch = argc > 1 ? atoi(argv[1]) : 0;
// 0 means: do not do multiarch
// > 0 means: do multiarch
// > VexArch_INVALID means: do multiarch, only and specifically
// with the host arch equal to multiarch
// (ugly interface, but hey, that is for testing only special cases only).
const int endness_may_differ = argc > 2 ? atoi(argv[2]) : 0;
const int wordsize_may_differ = argc > 3 ? atoi(argv[3]) : 0;
// Note: if multiarch > VexArch_INVALID, then endness_may_differ
// and wordsize_may_differ are ignored.
// So, here are examples of usage:
// * run only host == guest:
// ./libvexmultiarch_test
// ./libvex_test
// * run all combinations (this will abort very soon :):
// ./libvexmultiarch_test 1 1 1
// * run all combinations that are supposed to work by default :
// ./libvexmultiarch_test 1 0 0
// * run a specific host arch (e.g. 1028 i.e. VexArchARM64)
// ./libvexmultiarch_test 1028
// * show how a single arch VEX lib reports its failure when host != guest
// ./libvex_test 1 0 0
VexArch guest_arch;
VexEndness guest_endness;
VexControl vcon;
VexGuestExtents vge;
VexTranslateArgs vta;
VexTranslateResult vtr;
UChar host_bytes[10000];
Int host_bytes_used;
LibVEX_default_VexControl(&vcon);
LibVEX_Init (failure_exit, log_bytes, 3, &vcon);
get_guest_arch (&guest_arch);
guest_endness = arch_endness (guest_arch);
LibVEX_default_VexArchInfo(&vta.archinfo_guest);
LibVEX_default_VexArchInfo(&vta.archinfo_host);
LibVEX_default_VexAbiInfo (&vta.abiinfo_both);
// Use some values that makes AMD64 happy.
vta.abiinfo_both.guest_stack_redzone_size = 128;
// Prepare first for a translation where guest == host
// We will translate the get_guest_arch function
vta.arch_guest = guest_arch;
vta.archinfo_guest.endness = guest_endness;
vta.archinfo_guest.hwcaps = arch_hwcaps (vta.arch_guest);
vta.arch_host = guest_arch;
vta.archinfo_host.endness = guest_endness;
vta.archinfo_host.hwcaps = arch_hwcaps (vta.arch_host);
vta.callback_opaque = NULL;
vta.guest_bytes = (UChar*) get_guest_arch;
vta.guest_bytes_addr = (Addr) get_guest_arch;
vta.chase_into_ok = return_false;
vta.guest_extents = &vge;
vta.host_bytes = host_bytes;
vta.host_bytes_size = sizeof host_bytes;
vta.host_bytes_used = &host_bytes_used;
vta.instrument1 = NULL;
vta.instrument2 = NULL;
vta.finaltidy = NULL;
vta.needs_self_check = return_0;
vta.preamble_function = NULL;
vta.traceflags = 0xFFFFFFFF;
vta.sigill_diag = False;
vta.addProfInc = False;
vta.disp_cp_chain_me_to_slowEP = failure_dispcalled;
vta.disp_cp_chain_me_to_fastEP = failure_dispcalled;
vta.disp_cp_xindir = failure_dispcalled;
vta.disp_cp_xassisted = failure_dispcalled;
show_vta("host == guest", &vta);
vtr = LibVEX_Translate ( &vta );
if (vtr.status != VexTransOK)
return 1;
// Now, try various combinations, if told to do so:
// host != guest,
// endness(host) != endness(guest) (not well supported)
// wordsize (host) != wordsize (guest) (not well supported)
// The not well supported combinations are not run, unless requested
// explicitely via command line arguments.
if (multiarch) {
VexArch va;
for (va = VexArchX86; va <= VexArchTILEGX; va++) {
vta.arch_host = va;
vta.archinfo_host.endness = arch_endness (vta.arch_host);
vta.archinfo_host.hwcaps = arch_hwcaps (vta.arch_host);
if (arch_endness(va) != arch_endness(guest_arch)
&& !endness_may_differ
&& multiarch != va) {
show_vta("skipped (endness differs)", &vta);
continue;
}
if (mode64(va) != mode64(guest_arch)
&& !wordsize_may_differ
&& multiarch != va) {
show_vta("skipped (word size differs)", &vta);
continue;
}
if (multiarch > VexArch_INVALID
&& multiarch != va) {
show_vta("skipped (!= specific requested arch)", &vta);
continue;
}
show_vta ("doing", &vta);
vtr = LibVEX_Translate ( &vta );
if (vtr.status != VexTransOK)
return 1;
}
}
printf ("//// libvex testing normal exit\n");
return 0;
}
//----------------------------------------------------------------------
// Initializes VEX
// It must be called before using VEX for translation to Valgrind IR
//----------------------------------------------------------------------
void vex_init()
{
static int initialized = 0;
debug("Initializing VEX.\n");
if (initialized || vex_initdone)
{
debug("VEX already initialized.\n");
return;
}
initialized = 1;
//
// Initialize VEX
//
LibVEX_default_VexControl(&vc);
vc.iropt_verbosity = 0;
vc.iropt_level = 0; // No optimization by default
//vc.iropt_level = 2;
//vc.iropt_precise_memory_exns = False;
vc.iropt_unroll_thresh = 0;
vc.guest_max_insns = 1; // By default, we vex 1 instruction at a time
vc.guest_chase_thresh = 0;
debug("Calling LibVEX_Init()....\n");
LibVEX_Init(&failure_exit,
&log_bytes,
0, // Debug level
&vc );
debug("LibVEX_Init() done....\n");
LibVEX_default_VexArchInfo(&vai_guest);
LibVEX_default_VexArchInfo(&vai_host);
LibVEX_default_VexAbiInfo(&vbi);
vai_host.endness = VexEndnessLE; // TODO: Don't assume this
// various settings to make stuff work
// ... former is set to 'unspecified', but gets set in vex_inst for archs which care
// ... the latter two are for dealing with gs and fs in VEX
vbi.guest_stack_redzone_size = 0;
vbi.guest_amd64_assume_fs_is_const = True;
vbi.guest_amd64_assume_gs_is_const = True;
//------------------------------------
// options for instruction translation
//
// Architecture info
//
vta.arch_guest = VexArch_INVALID; // to be assigned later
vta.arch_host = VexArch_INVALID; // to be assigned later
//
// The actual stuff to vex
//
vta.guest_bytes = NULL; // Set in vex_insts
vta.guest_bytes_addr = 0; // Set in vex_insts
//
// callbacks
//
vta.callback_opaque = NULL; // Used by chase_into_ok, but never actually called
vta.chase_into_ok = chase_into_ok; // Always returns false
vta.preamble_function = NULL;
vta.instrument1 = instrument1; // Callback we defined to help us save the IR
vta.instrument2 = NULL;
vta.finaltidy = NULL;
vta.needs_self_check = needs_self_check;
#if 0
vta.dispatch_assisted = (void *)dispatch; // Not used
vta.dispatch_unassisted = (void *)dispatch; // Not used
#else
vta.disp_cp_chain_me_to_slowEP = (void *)dispatch; // Not used
vta.disp_cp_chain_me_to_fastEP = (void *)dispatch; // Not used
vta.disp_cp_xindir = (void *)dispatch; // Not used
vta.disp_cp_xassisted = (void *)dispatch; // Not used
#endif
vta.guest_extents = &vge;
vta.host_bytes = NULL; // Buffer for storing the output binary
vta.host_bytes_size = 0;
vta.host_bytes_used = NULL;
// doesn't exist? vta.do_self_check = False;
vta.traceflags = 0; // Debug verbosity
//vta.traceflags = -1; // Debug verbosity
}
//----------------------------------------------------------------------
// Initializes VEX
// It must be called before using VEX for translation to Valgrind IR
//----------------------------------------------------------------------
void translate_init()
{
static int initialized = 0;
if (initialized)
{
return;
}
initialized = 1;
// Initialize VEX
VexControl vc;
vc.iropt_verbosity = 0;
vc.iropt_level = 2;
vc.iropt_register_updates_default = VexRegUpdSpAtMemAccess;
vc.iropt_unroll_thresh = 0;
vc.guest_max_insns = 1; // By default, we translate 1 instruction at a time
vc.guest_chase_thresh = 0;
vc.guest_chase_cond = 0;
LibVEX_Init(&failure_exit,
&log_bytes,
0, // Debug level
&vc);
LibVEX_default_VexArchInfo(&vai);
// FIXME: determinate endianess by specified guest arch
vai.endness = VexEndnessLE;
// Setup the translation args
vta.arch_guest = VexArch_INVALID; // to be assigned later
vta.archinfo_guest = vai;
//
// FIXME: detect this one automatically
//
#ifdef AMD64
vta.arch_host = VexArchAMD64;
#else
vta.arch_host = VexArchX86; // Target arch
#endif
vta.archinfo_host = vai;
vta.guest_bytes = NULL; // Set in translate_insns
vta.guest_bytes_addr = 0; // Set in translate_insns
vta.callback_opaque = NULL; // Used by chase_into_ok, but never actually called
vta.chase_into_ok = chase_into_ok; // Always returns false
vta.preamble_function = NULL;
vta.guest_extents = &vge;
#ifdef AMD64
vta.host_bytes = NULL; // Buffer for storing the output binary
vta.host_bytes_size = 0;
vta.host_bytes_used = NULL;
#else
vta.host_bytes = tmpbuf; // Buffer for storing the output binary
vta.host_bytes_size = TMPBUF_SIZE;
vta.host_bytes_used = &tmpbuf_used;
#endif
vta.instrument1 = instrument1; // Callback we defined to help us save the IR
vta.instrument2 = NULL;
vta.traceflags = VEX_TRACE_INST; // Debug verbosity
vta.disp_cp_chain_me_to_slowEP = dispatch; // Not used
vta.disp_cp_chain_me_to_fastEP = dispatch; // Not used
vta.disp_cp_xindir = dispatch; // Not used
vta.disp_cp_xassisted = dispatch; // Not used
vta.needs_self_check = needs_self_check; // Not used
}
