C++ (Cpp) MACRO_NAND_CTL_CLRALE Examples

Example #1

File: ppchameleonevb.c Project: 12rafael/jellytimekernel

static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd,
				     unsigned int ctrl)
{
	struct nand_chip *chip = mtd->priv;

	if (ctrl & NAND_CTRL_CHANGE) {
#error Missing headerfiles. No way to fix this. -tglx
		switch (cmd) {
		case NAND_CTL_SETCLE:
			MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND1_PADDR);
			break;
		case NAND_CTL_CLRCLE:
			MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND1_PADDR);
			break;
		case NAND_CTL_SETALE:
			MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND1_PADDR);
			break;
		case NAND_CTL_CLRALE:
			MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND1_PADDR);
			break;
		case NAND_CTL_SETNCE:
			MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND1_PADDR);
			break;
		case NAND_CTL_CLRNCE:
			MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND1_PADDR);
			break;
		}
	}
	if (cmd != NAND_CMD_NONE)
		writeb(cmd, chip->IO_ADDR_W);
}

Example #2

File: nand.c Project: 380121850/u-boot-mini2440

/*
 * hardware specific access to control-lines
 * function borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c)
 */
static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd)
{
	struct nand_chip *this = mtdinfo->priv;
	ulong base = (ulong) this->IO_ADDR_W;

	switch(cmd) {
	case NAND_CTL_SETCLE:
		MACRO_NAND_CTL_SETCLE((unsigned long)base);
		break;
	case NAND_CTL_CLRCLE:
		MACRO_NAND_CTL_CLRCLE((unsigned long)base);
		break;
	case NAND_CTL_SETALE:
		MACRO_NAND_CTL_SETALE((unsigned long)base);
		break;
	case NAND_CTL_CLRALE:
		MACRO_NAND_CTL_CLRALE((unsigned long)base);
		break;
	case NAND_CTL_SETNCE:
		MACRO_NAND_ENABLE_CE((unsigned long)base);
		break;
	case NAND_CTL_CLRNCE:
		MACRO_NAND_DISABLE_CE((unsigned long)base);
		break;
	}
}

Example #3

static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd,
				     unsigned int ctrl)
{
	struct nand_chip *chip = mtdinfo->priv;

	if (ctrl & NAND_CTRL_CHANGE) {
		if (ctrl & NAND_CLE)
			MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND1_PADDR);
		else
			MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND1_PADDR);

		if (ctrl & NAND_ALE)
			MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND1_PADDR);
		else
			MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND1_PADDR);

		if (ctrl & NAND_NCE)
			MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND1_PADDR);
		else
			MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND1_PADDR);
	}
	if (cmd != NAND_CMD_NONE)
		writeb(cmd, chip->IO_ADDR_W);
}

Example #4

File: ppchameleonevb.c Project: nighthawk149/fvs318g-cfw

static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd)
{
	switch(cmd) {

	case NAND_CTL_SETCLE:
        	MACRO_NAND_CTL_SETCLE((unsigned long)CFG_NAND1_PADDR);
		break;
	case NAND_CTL_CLRCLE:
        	MACRO_NAND_CTL_CLRCLE((unsigned long)CFG_NAND1_PADDR);
		break;
	case NAND_CTL_SETALE:
        	MACRO_NAND_CTL_SETALE((unsigned long)CFG_NAND1_PADDR);
		break;
	case NAND_CTL_CLRALE:
        	MACRO_NAND_CTL_CLRALE((unsigned long)CFG_NAND1_PADDR);
		break;
	case NAND_CTL_SETNCE:
        	MACRO_NAND_ENABLE_CE((unsigned long)CFG_NAND1_PADDR);
		break;
	case NAND_CTL_CLRNCE:
        	MACRO_NAND_DISABLE_CE((unsigned long)CFG_NAND1_PADDR);
		break;
	}
}