Example #1
0
#include <linux/irq.h>
#include <plat/devs.h>

#include "exynos3_pmm.h"

#define MALI_GP_IRQ		EXYNOS3_IRQ_GP_3D
#define MALI_PP0_IRQ		EXYNOS3_IRQ_PP0_3D
#define MALI_PP1_IRQ		EXYNOS3_IRQ_PP1_3D
#define MALI_GP_MMU_IRQ		EXYNOS3_IRQ_GPMMU_3D
#define MALI_PP0_MMU_IRQ	EXYNOS3_IRQ_PPMMU0_3D
#define MALI_PP1_MMU_IRQ	EXYNOS3_IRQ_PPMMU1_3D

static struct resource mali_gpu_resources[] = {
	MALI_GPU_RESOURCES_MALI400_MP2(0x13000000,
						MALI_GP_IRQ, MALI_GP_MMU_IRQ,
						MALI_PP0_IRQ, MALI_PP0_MMU_IRQ,
						MALI_PP1_IRQ, MALI_PP1_MMU_IRQ)
};

static struct mali_gpu_device_data mali_gpu_data = {
	.shared_mem_size = 256 * 1024 * 1024, /* 256MB */
	.fb_start = 0x40000000,
	.fb_size = 0xb1000000,
	.utilization_interval = 100, /* 100ms */
	.utilization_handler = mali_exynos_update_dvfs,
};

int mali_platform_device_register(void)
{
	int err;
static struct regulator     *mali_regulator = NULL;         /* mali g3d regulator */
static u32                       s_uwDebugFsPowerDown = 1;
static mali_bool               g_swGpuPowerState = MALI_FALSE;                  /* globle power state,1 up ;0 down*/


static struct device_node *np = NULL;

static struct resource mali_gpu_resources_m400_mp1[] =
{
    MALI_GPU_RESOURCES_MALI400_MP1(MALI_BASE_ADDR, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID)
};

static struct resource mali_gpu_resources_m400_mp2[] =
{
    MALI_GPU_RESOURCES_MALI400_MP2(MALI_BASE_ADDR, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID)
};

static struct resource mali_gpu_resources_m450_mp4[] =
{
    MALI_GPU_RESOURCES_MALI450_MP4(MALI_BASE_ADDR, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID, MALI_IRQ_ID)
};

extern mali_bool mali_gpu_class_is_mali450;
/*****************************************************************************
 function name  : mali_os_suspend
 description    : os suspend
 input vars     : void
 output vars    : NA
 return value   : void
 calls          : mali_platform_power_mode_change
#define INT_MALI_GP      (48+32)
#define INT_MALI_GP_MMU  (49+32)
#define INT_MALI_PP      (50+32)
#define INT_MALI_PP2     (58+32)
#define INT_MALI_PP3     (60+32)
#define INT_MALI_PP4     (62+32)
#define INT_MALI_PP_MMU  (51+32)
#define INT_MALI_PP2_MMU (59+32)
#define INT_MALI_PP3_MMU (61+32)
#define INT_MALI_PP4_MMU (63+32)

#ifndef CONFIG_MALI400_4_PP
static struct resource meson_mali_resources[] =
{
	MALI_GPU_RESOURCES_MALI400_MP2(0xd0060000, 
			INT_MALI_GP, INT_MALI_GP_MMU, 
			INT_MALI_PP, INT_MALI_PP_MMU, 
			INT_MALI_PP2, INT_MALI_PP2_MMU)
};
#else
static struct resource meson_mali_resources[] =
{
	MALI_GPU_RESOURCES_MALI400_MP4(0xd0060000, 
			INT_MALI_GP, INT_MALI_GP_MMU, 
			INT_MALI_PP, INT_MALI_PP_MMU, 
			INT_MALI_PP2, INT_MALI_PP2_MMU,
			INT_MALI_PP3, INT_MALI_PP3_MMU,
			INT_MALI_PP4, INT_MALI_PP4_MMU
			)
};
#endif
    MALI_GPU_RESOURCES_MALI400_MP1(
                    IO_VIRT_TO_PHYS(0xF3010000),
                    176, //MT_MFG_IRQ_GP_ID,
                    177, //MT_MFG_IRQ_GPMMU_ID ,
                    178, //MT_MFG_IRQ_PP0_ID,
                    179  //MT_MFG_IRQ_PPMMU0_ID
                )
};

static struct resource mali_gpu_resources_mp2[] =
{
    MALI_GPU_RESOURCES_MALI400_MP2(
                    IO_VIRT_TO_PHYS(0xF3010000),
                    176, //MT_MFG_IRQ_GP_ID,
                    177, //MT_MFG_IRQ_GPMMU_ID ,
                    178, //MT_MFG_IRQ_PP0_ID,
                    179, //MT_MFG_IRQ_PPMMU0_ID,
                    180, //MT_MFG_IRQ_PP1_ID,
                    181  //MT_MFG_IRQ_PPMMU1_ID
                )
};

static struct dev_pm_ops mali_gpu_device_type_pm_ops =
{
    .suspend = mali_pm_suspend,
    .resume  = mali_pm_resume, 
    .freeze  = mali_pm_suspend, 
    .thaw    = mali_pm_resume,   
    .restore = mali_pm_resume,
    
#ifdef CONFIG_PM_RUNTIME