static void apply_io_park(u8 pin_num,
enum io_park_state park_value)
{
u32 pin_strength, pin_type;
if(DONT_CARE != park_value) {
/* Change the pin mode to GPIO to be safe */
//MAP_PinModeSet(pin_num, PIN_MODE_0);
/* First apply PullUp/PullDn (or no pull) according
to the default levels specified in the user supplied
parking table */
MAP_PinConfigGet(pin_num, &pin_strength, &pin_type);
if(NO_PULL_HIZ != park_value) {
MAP_PinConfigSet(pin_num, pin_strength, park_value);
} else {
MAP_PinConfigSet(pin_num, pin_strength, PIN_TYPE_STD);
}
/* One by one HiZ all the IOs,
by writing the register that drives IOEN_N control
pin of the IOs. This register and the signal path is
always-on and hence not get lost during True-LPDS */
MAP_PinDirModeSet(pin_num, PIN_DIR_MODE_IN);
/* Once all the digital IOs has been made HiZ,
the desired default PAD levels would be held by
the weak-pulls. Input buffers would be alive
(such as auto-SPI or wake-GPIOs) and would not
have Iddq issue since pulls are present. */
}
return;
}
i32 cc_set_default(struct soc_io_park *io_park_choice,
u8 num_pins)
{
i32 loopcnt;
if(NULL == io_park_choice) {
return -1;
}
/* Park the IOs safely as specified by the application */
for(loopcnt = 0; loopcnt < num_pins; loopcnt++) {
/* Change the pin mode to default MODE 1 */
MAP_PinModeSet(io_park_choice[loopcnt].pin_num,
PIN_MODE_1);
/* Change the drive strength and pin type to default */
MAP_PinConfigSet(io_park_choice[loopcnt].pin_num,
(PIN_STRENGTH_2MA | PIN_STRENGTH_4MA),
PIN_TYPE_STD);
/* Set the PINs as input */
MAP_PinDirModeSet(io_park_choice[loopcnt].pin_num,
PIN_DIR_MODE_IN);
}
return 0;
}
STATIC void pyb_sleep_iopark (bool hibernate) {
const mp_map_t *named_map = &pin_board_pins_locals_dict.map;
for (uint i = 0; i < named_map->used; i++) {
pin_obj_t * pin = (pin_obj_t *)named_map->table[i].value;
switch (pin->pin_num) {
#ifdef DEBUG
// skip the JTAG pins
case PIN_16:
case PIN_17:
case PIN_19:
case PIN_20:
break;
#endif
default:
// enable a weak pull-up if the pin is unused
if (!pin->used) {
MAP_PinConfigSet(pin->pin_num, pin->strength, PIN_TYPE_STD_PU);
}
if (hibernate) {
// make it an input
MAP_PinDirModeSet(pin->pin_num, PIN_DIR_MODE_IN);
}
break;
}
}
// park the sflash pins
HWREG(0x4402E0E8) &= ~(0x3 << 8);
HWREG(0x4402E0E8) |= (0x2 << 8);
HWREG(0x4402E0EC) &= ~(0x3 << 8);
HWREG(0x4402E0EC) |= (0x2 << 8);
HWREG(0x4402E0F0) &= ~(0x3 << 8);
HWREG(0x4402E0F0) |= (0x2 << 8);
HWREG(0x4402E0F4) &= ~(0x3 << 8);
HWREG(0x4402E0F4) |= (0x1 << 8);
// if the board has antenna diversity, only park the antenna
// selection pins when going into hibernation
#if MICROPY_HW_ANTENNA_DIVERSITY
if (hibernate) {
#endif
// park the antenna selection pins
// (tri-stated with pull down enabled)
HWREG(0x4402E108) = 0x00000E61;
HWREG(0x4402E10C) = 0x00000E61;
#if MICROPY_HW_ANTENNA_DIVERSITY
} else {
// park the antenna selection pins
// (tri-stated without changing the pull up/down resistors)
HWREG(0x4402E108) &= ~0x000000FF;
HWREG(0x4402E108) |= 0x00000C61;
HWREG(0x4402E10C) &= ~0x000000FF;
HWREG(0x4402E10C) |= 0x00000C61;
}
#endif
}
/// Initalizes the sd card hardware driver
STATIC void pyb_sd_hw_init (pybsd_obj_t *self) {
if (self->pin_clk) {
// Configure the clock pin as output only
MAP_PinDirModeSet(((pin_obj_t *)(self->pin_clk))->pin_num, PIN_DIR_MODE_OUT);
}
// Enable SD peripheral clock
MAP_PRCMPeripheralClkEnable(PRCM_SDHOST, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
// Reset MMCHS
MAP_PRCMPeripheralReset(PRCM_SDHOST);
// Initialize MMCHS
MAP_SDHostInit(SDHOST_BASE);
// Configure the card clock
MAP_SDHostSetExpClk(SDHOST_BASE, MAP_PRCMPeripheralClockGet(PRCM_SDHOST), PYBSD_FREQUENCY_HZ);
// Set card rd/wr block len
MAP_SDHostBlockSizeSet(SDHOST_BASE, SD_SECTOR_SIZE);
self->enabled = true;
}
//****************************************************************************
//
//! Main function
//!
//! \param none
//!
//!
//! \return None.
//
//****************************************************************************
void main()
{
FIL fp;
FATFS fs;
FRESULT res;
DIR dir;
UINT Size;
//
// Initialize Board configurations
//
BoardInit();
//
// Muxing for Enabling UART_TX and UART_RX.
//
PinMuxConfig();
//
// Set the SD card clock as output pin
//
MAP_PinDirModeSet(PIN_07,PIN_DIR_MODE_OUT);
//
// Enable Pull up on data
//
MAP_PinConfigSet(PIN_06,PIN_STRENGTH_4MA, PIN_TYPE_STD_PU);
//
// Enable Pull up on CMD
//
MAP_PinConfigSet(PIN_08,PIN_STRENGTH_4MA, PIN_TYPE_STD_PU);
//
// Initialising the Terminal.
//
InitTerm();
//
// Clearing the Terminal.
//
ClearTerm();
//
// Display the Banner
//
Message("\n\n\n\r");
Message("\t\t ********************************************\n\r");
Message("\t\t CC3200 SDHost Fatfs Demo Application \n\r");
Message("\t\t ********************************************\n\r");
Message("\n\n\n\r");
//
// Enable MMCHS
//
MAP_PRCMPeripheralClkEnable(PRCM_SDHOST,PRCM_RUN_MODE_CLK);
//
// Reset MMCHS
//
MAP_PRCMPeripheralReset(PRCM_SDHOST);
//
// Configure MMCHS
//
MAP_SDHostInit(SDHOST_BASE);
//
// Configure card clock
//
MAP_SDHostSetExpClk(SDHOST_BASE,
MAP_PRCMPeripheralClockGet(PRCM_SDHOST),15000000);
f_mount(&fs,"0",1);
res = f_opendir(&dir,"/");
if( res == FR_OK)
{
Message("Opening root directory.................... [ok]\n\n\r");
Message("/\n\r");
ListDirectory(&dir);
}
else
{
Message("Opening root directory.................... [Failed]\n\n\r");
}
Message("\n\rReading user file...\n\r");
res = f_open(&fp,USERFILE,FA_READ);
if(res == FR_OK)
{
f_read(&fp,pBuffer,100,&Size);
Report("Read : %d Bytes\n\n\r",Size);
Report("%s",pBuffer);
f_close(&fp);
}
else
{
Report("Failed to open %s\n\r",USERFILE);
}
Message("\n\n\rWriting system file...\n\r");
res = f_open(&fp,SYSFILE,FA_CREATE_ALWAYS|FA_WRITE);
if(res == FR_OK)
{
f_write(&fp,SYSTEXT,sizeof(SYSTEXT),&Size);
Report("Wrote : %d Bytes",Size);
res = f_close(&fp);
}
else
{
Message("Failed to create a new file\n\r");
}
while(1)
{
}
}
