static void mcf5282_fec_initialize_hardware(struct mcf5282_enet_struct *sc) { int i; const unsigned char *hwaddr; rtems_status_code status; rtems_isr_entry old_handler; uint32_t clock_speed = bsp_get_CPU_clock_speed(); /* * Issue reset to FEC */ MCF5282_FEC_ECR = MCF5282_FEC_ECR_RESET; rtems_task_wake_after(2); MCF5282_FEC_ECR = 0; /* * Configuration of I/O ports is done outside of this function */ #if 0 imm->gpio.pbcnt |= MCF5282_GPIO_PBCNT_SET_FEC; /* Set up port b FEC pins */ #endif /* * Set our physical address */ hwaddr = sc->arpcom.ac_enaddr; MCF5282_FEC_PALR = (hwaddr[0] << 24) | (hwaddr[1] << 16) | (hwaddr[2] << 8) | (hwaddr[3] << 0); MCF5282_FEC_PAUR = (hwaddr[4] << 24) | (hwaddr[5] << 16); /* * Clear the hash table */ MCF5282_FEC_GAUR = 0; MCF5282_FEC_GALR = 0; /* * Set up receive buffer size */ MCF5282_FEC_EMRBR = 1520; /* Standard Ethernet */ /* * Allocate mbuf pointers */ sc->rxMbuf = malloc(sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT); sc->txMbuf = malloc(sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT); if (!sc->rxMbuf || !sc->txMbuf) rtems_panic("No memory for mbuf pointers"); /* * Set receiver and transmitter buffer descriptor bases */ sc->rxBdBase = mcf5282_bd_allocate(sc->rxBdCount); sc->txBdBase = mcf5282_bd_allocate(sc->txBdCount); MCF5282_FEC_ERDSR = (int)sc->rxBdBase; MCF5282_FEC_ETDSR = (int)sc->txBdBase; /* * Set up Receive Control Register: * Not promiscuous * MII mode * Full duplex * No loopback */ MCF5282_FEC_RCR = MCF5282_FEC_RCR_MAX_FL(MAX_MTU_SIZE) | MCF5282_FEC_RCR_MII_MODE; /* * Set up Transmit Control Register: * Full or half duplex * No heartbeat */ if (sc->link == link_10Half) MCF5282_FEC_TCR = 0; else MCF5282_FEC_TCR = MCF5282_FEC_TCR_FDEN; /* * Initialize statistic counters */ MCF5282_FEC_MIBC = MCF5282_FEC_MIBC_MIB_DISABLE; { vuint32 *vuip = &MCF5282_FEC_RMON_T_DROP; while (vuip <= &MCF5282_FEC_IEEE_R_OCTETS_OK) *vuip++ = 0; } MCF5282_FEC_MIBC = 0; /* * Set MII speed to <= 2.5 MHz */ i = (clock_speed + 5000000 - 1) / 5000000; MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(i); /* * Set PHYS * LED1 receive status, LED2 link status, LEDs stretched * Advertise 100 Mb/s, full-duplex, IEEE-802.3 * Turn off auto-negotiate * Clear status */ setMII(1, 20, 0x24F2); setMII(1, 4, 0x0181); setMII(1, 0, 0x0); rtems_task_wake_after(2); sc->mii_sr2 = getMII(1, 17); switch (sc->link) { case link_auto: /* * Enable speed-change, duplex-change and link-status-change interrupts * Enable auto-negotiate (start at 100/FULL) */ setMII(1, 18, 0x0072); setMII(1, 0, 0x3100); break; case link_10Half: /* * Force 10/HALF */ setMII(1, 0, 0x0); break; case link_100Full: /* * Force 100/FULL */ setMII(1, 0, 0x2100); break; } sc->mii_cr = getMII(1, 0); /* * Set up receive buffer descriptors */ for (i = 0 ; i < sc->rxBdCount ; i++) (sc->rxBdBase + i)->status = 0; /* * Set up transmit buffer descriptors */ for (i = 0 ; i < sc->txBdCount ; i++) { sc->txBdBase[i].status = 0; sc->txMbuf[i] = NULL; } sc->txBdHead = sc->txBdTail = 0; sc->txBdActiveCount = 0; /* * Set up interrupts */ status = rtems_interrupt_catch( mcf5282_fec_tx_interrupt_handler, FEC_INTC0_TX_VECTOR, &old_handler ); if (status != RTEMS_SUCCESSFUL) rtems_panic ("Can't attach MCF5282 FEC TX interrupt handler: %s\n", rtems_status_text(status)); bsp_allocate_interrupt(FEC_IRQ_LEVEL, FEC_IRQ_TX_PRIORITY); MCF5282_INTC0_ICR23 = MCF5282_INTC_ICR_IL(FEC_IRQ_LEVEL) | MCF5282_INTC_ICR_IP(FEC_IRQ_TX_PRIORITY); MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT23 | MCF5282_INTC_IMRL_MASKALL); status = rtems_interrupt_catch(mcf5282_fec_rx_interrupt_handler, FEC_INTC0_RX_VECTOR, &old_handler); if (status != RTEMS_SUCCESSFUL) rtems_panic ("Can't attach MCF5282 FEC RX interrupt handler: %s\n", rtems_status_text(status)); bsp_allocate_interrupt(FEC_IRQ_LEVEL, FEC_IRQ_RX_PRIORITY); MCF5282_INTC0_ICR27 = MCF5282_INTC_ICR_IL(FEC_IRQ_LEVEL) | MCF5282_INTC_ICR_IP(FEC_IRQ_RX_PRIORITY); MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT27 | MCF5282_INTC_IMRL_MASKALL); status = rtems_interrupt_catch(mcf5282_mii_interrupt_handler, MII_VECTOR, &old_handler); if (status != RTEMS_SUCCESSFUL) rtems_panic ("Can't attach MCF5282 FEC MII interrupt handler: %s\n", rtems_status_text(status)); MCF5282_EPORT_EPPAR &= ~MII_EPPAR; MCF5282_EPORT_EPDDR &= ~MII_EPDDR; MCF5282_EPORT_EPIER |= MII_EPIER; MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT7 | MCF5282_INTC_IMRL_MASKALL); }
/*************************************************************************** Function : IntUartInitialize Description : This initialises the internal uart hardware for all internal uarts. If the internal uart is to be interrupt driven then the interrupt vectors are hooked. ***************************************************************************/ static void IntUartInitialize(void) { unsigned int chan; struct IntUartInfoStruct *info; rtems_isr_entry old_handler; int level; for ( chan = 0; chan < MAX_UART_INFO; chan++ ) { info = &IntUartInfo[chan]; info->ttyp = NULL; info->rx_in = 0; info->rx_out = 0; info->baud = -1; info->databits = -1; info->parity = -1; info->stopbits = -1; info->hwflow = -1; info->iomode = TERMIOS_POLLED; MCF5282_UART_UACR(chan) = 0; MCF5282_UART_UIMR(chan) = 0; if ( info->iomode != TERMIOS_POLLED ) { rtems_interrupt_catch (IntUartInterruptHandler, UART_INTC0_IRQ_VECTOR(chan), &old_handler); } /* set uart default values */ IntUartSetAttributes(chan, NULL); /* unmask interrupt */ rtems_interrupt_disable(level); switch(chan) { case 0: MCF5282_INTC0_ICR13 = MCF5282_INTC_ICR_IL(UART0_IRQ_LEVEL) | MCF5282_INTC_ICR_IP(UART0_IRQ_PRIORITY); MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT13 | MCF5282_INTC_IMRL_MASKALL); break; case 1: MCF5282_INTC0_ICR14 = MCF5282_INTC_ICR_IL(UART1_IRQ_LEVEL) | MCF5282_INTC_ICR_IP(UART1_IRQ_PRIORITY); MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT14 | MCF5282_INTC_IMRL_MASKALL); break; case 2: MCF5282_INTC0_ICR15 = MCF5282_INTC_ICR_IL(UART2_IRQ_LEVEL) | MCF5282_INTC_ICR_IP(UART2_IRQ_PRIORITY); MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT15 | MCF5282_INTC_IMRL_MASKALL); break; } rtems_interrupt_enable(level); } /* of chan loop */ } /* IntUartInitialise */