void mdss_interrupts_dump(void) { u32 isr, mask; isr = MDSS_MDP_REG_READ(MDSS_MDP_REG_INTR_STATUS); mask = MDSS_MDP_REG_READ(MDSS_MDP_REG_INTR_EN); MDSS_TIMEOUT_LOG("MDSS_MDP_REG_INTR_STATUS: 0x%08X\n", isr); MDSS_TIMEOUT_LOG("MDSS_MDP_REG_INTR_EN: 0x%08X\n", mask); MDSS_TIMEOUT_LOG("global irqs disabled: %d\n", irqs_disabled()); }
void mdp3_dump_dma(void *data) { struct mdp3_dma *dma = (struct mdp3_dma *)data; u32 isr, mask; mdp3_clk_prepare(); mdp3_clk_enable(1, 0); isr = MDP3_REG_READ(MDP3_REG_INTR_STATUS); mask = MDP3_REG_READ(MDP3_REG_INTR_ENABLE); MDSS_TIMEOUT_LOG("-------- MDP3 INTERRUPT DATA ---------\n"); MDSS_TIMEOUT_LOG("MDP3_REG_INTR_STATUS: 0x%08X\n", isr); MDSS_TIMEOUT_LOG("MDP3_REG_INTR_ENABLE: 0x%08X\n", mask); MDSS_TIMEOUT_LOG("global irqs disabled: %d\n", irqs_disabled()); MDSS_TIMEOUT_LOG("------ MDP3 INTERRUPT DATA DONE ------\n"); if (dma) { MDSS_TIMEOUT_LOG("-------- MDP3 DMA DATA ---------\n"); MDSS_TIMEOUT_LOG("vsync_cnt=%u\n", dma->vsync_cnt); MDSS_TIMEOUT_LOG("------ MDP3 DMA DATA DONE ------\n"); } mdp3_clk_enable(0, 0); mdp3_clk_unprepare(); }
void mdss_dump_ctl(struct mdss_mdp_ctl *ctl) { MDSS_TIMEOUT_LOG("-------- MDP5 CTL DATA ---------\n"); MDSS_TIMEOUT_LOG("play_cnt=%u\n", ctl->play_cnt); MDSS_TIMEOUT_LOG("vsync_cnt=%u\n", ctl->vsync_cnt); MDSS_TIMEOUT_LOG("underrun_cnt=%u\n", ctl->underrun_cnt); MDSS_TIMEOUT_LOG("------ MDP5 CTL DATA DONE ------\n"); if (ctl->ctx_dump_fnc) { MDSS_TIMEOUT_LOG("-------- MDP5 CTX DATA ---------\n"); ctl->ctx_dump_fnc(ctl); MDSS_TIMEOUT_LOG("------ MDP5 CTX DATA DONE ------\n"); } }