static int mhl_tx_chip_init(struct mhl_tx_ctrl *mhl_ctrl)
{
uint8_t chip_rev_id = 0x00;
struct i2c_client *client = mhl_ctrl->i2c_handle;
unsigned long flags;
spin_lock_irqsave(&mhl_ctrl->lock, flags);
mhl_ctrl->dwnstream_hpd = 0;
mhl_ctrl->tx_powered_off = false;
spin_unlock_irqrestore(&mhl_ctrl->lock, flags);
/* Reset the TX chip */
mhl_sii_reset_pin(mhl_ctrl, 0);
msleep(20);
mhl_sii_reset_pin(mhl_ctrl, 1);
/* TX PR-guide requires a 100 ms wait here */
msleep(100);
/* Read the chip rev ID */
chip_rev_id = MHL_SII_PAGE0_RD(0x04);
pr_debug("MHL: chip rev ID read=[%x]\n", chip_rev_id);
mhl_ctrl->chip_rev_id = chip_rev_id;
/*
* Need to disable MHL discovery if
* MHL-USB handshake is implemented
*/
mhl_init_reg_settings(mhl_ctrl, true);
switch_mode(mhl_ctrl, POWER_STATE_D3, true);
return 0;
}
static void mhl_hpd_stat_isr(struct mhl_tx_ctrl *mhl_ctrl)
{
uint8_t intr_1_stat;
uint8_t cbus_stat;
struct i2c_client *client = mhl_ctrl->i2c_handle;
/* INTR STATUS 1 */
intr_1_stat = MHL_SII_PAGE0_RD(0x0071);
if (!intr_1_stat)
return;
/* Clear interrupts */
MHL_SII_PAGE0_WR(0x0071, intr_1_stat);
if (BIT6 & intr_1_stat) {
/*
* HPD status change event is pending
* Read CBUS HPD status for this info
* MSC REQ ABRT REASON
*/
cbus_stat = MHL_SII_CBUS_RD(0x0D);
if (BIT6 & cbus_stat)
mhl_drive_hpd(mhl_ctrl, HPD_UP);
}
return;
}
static int mhl_tx_chip_init(struct mhl_tx_ctrl *mhl_ctrl)
{
uint8_t chip_rev_id = 0x00;
struct i2c_client *client = mhl_ctrl->i2c_handle;
/* Reset the TX chip */
mhl_sii_reset_pin(mhl_ctrl, 0);
msleep(20);
mhl_sii_reset_pin(mhl_ctrl, 1);
/* TX PR-guide requires a 100 ms wait here */
msleep(100);
/* Read the chip rev ID */
chip_rev_id = MHL_SII_PAGE0_RD(0x04);
pr_debug("MHL: chip rev ID read=[%x]\n", chip_rev_id);
mhl_ctrl->chip_rev_id = chip_rev_id;
/*
* Need to disable MHL discovery if
* MHL-USB handshake is implemented
*/
mhl_init_reg_settings(mhl_ctrl, true);
switch_mode(mhl_ctrl, POWER_STATE_D3);
return 0;
}
static void mhl_hpd_stat_isr(struct mhl_tx_ctrl *mhl_ctrl)
{
uint8_t intr_1_stat, cbus_stat, t;
unsigned long flags;
struct i2c_client *client = mhl_ctrl->i2c_handle;
if (!is_mhl_powered(mhl_ctrl))
return;
/* INTR STATUS 1 */
intr_1_stat = MHL_SII_PAGE0_RD(0x0071);
if (!intr_1_stat)
return;
/* Clear interrupts */
MHL_SII_PAGE0_WR(0x0071, intr_1_stat);
if (BIT6 & intr_1_stat) {
/*
* HPD status change event is pending
* Read CBUS HPD status for this info
* MSC REQ ABRT REASON
*/
cbus_stat = MHL_SII_CBUS_RD(0x0D);
pr_debug("%s: cbus_stat=[0x%02x] cur_pwr=[%u]\n",
__func__, cbus_stat, mhl_ctrl->cur_state);
spin_lock_irqsave(&mhl_ctrl->lock, flags);
t = mhl_ctrl->dwnstream_hpd;
spin_unlock_irqrestore(&mhl_ctrl->lock, flags);
if (BIT6 & (cbus_stat ^ t)) {
u8 status = cbus_stat & BIT6;
mhl_drive_hpd(mhl_ctrl, status ? HPD_UP : HPD_DOWN);
if (!status) {
MHL_SII_PAGE1_MOD(0x003D, BIT0, 0x00);
spin_lock_irqsave(&mhl_ctrl->lock, flags);
mhl_ctrl->tx_powered_off = true;
spin_unlock_irqrestore(&mhl_ctrl->lock, flags);
}
spin_lock_irqsave(&mhl_ctrl->lock, flags);
mhl_ctrl->dwnstream_hpd = cbus_stat;
spin_unlock_irqrestore(&mhl_ctrl->lock, flags);
}
}
}
static void clear_all_intrs(struct i2c_client *client)
{
uint8_t regval = 0x00;
pr_debug_intr("********* exiting isr mask check ?? *************\n");
pr_debug_intr("int1 mask = %02X\n",
(int) MHL_SII_REG_NAME_RD(REG_INTR1));
pr_debug_intr("int3 mask = %02X\n",
(int) MHL_SII_PAGE0_RD(0x0077));
pr_debug_intr("int4 mask = %02X\n",
(int) MHL_SII_REG_NAME_RD(REG_INTR4));
pr_debug_intr("int5 mask = %02X\n",
(int) MHL_SII_REG_NAME_RD(REG_INTR5));
pr_debug_intr("cbus1 mask = %02X\n",
(int) MHL_SII_CBUS_RD(0x0009));
pr_debug_intr("cbus2 mask = %02X\n",
(int) MHL_SII_CBUS_RD(0x001F));
pr_debug_intr("********* end of isr mask check *************\n");
regval = MHL_SII_REG_NAME_RD(REG_INTR1);
pr_debug_intr("int1 st = %02X\n", (int)regval);
MHL_SII_REG_NAME_WR(REG_INTR1, regval);
regval = MHL_SII_REG_NAME_RD(REG_INTR2);
pr_debug_intr("int2 st = %02X\n", (int)regval);
MHL_SII_REG_NAME_WR(REG_INTR2, regval);
regval = MHL_SII_PAGE0_RD(0x0073);
pr_debug_intr("int3 st = %02X\n", (int)regval);
MHL_SII_PAGE0_WR(0x0073, regval);
regval = MHL_SII_REG_NAME_RD(REG_INTR4);
pr_debug_intr("int4 st = %02X\n", (int)regval);
MHL_SII_REG_NAME_WR(REG_INTR4, regval);
regval = MHL_SII_REG_NAME_RD(REG_INTR5);
pr_debug_intr("int5 st = %02X\n", (int)regval);
MHL_SII_REG_NAME_WR(REG_INTR5, regval);
regval = MHL_SII_CBUS_RD(0x0008);
pr_debug_intr("cbusInt st = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x0008, regval);
regval = MHL_SII_CBUS_RD(0x001E);
pr_debug_intr("CBUS intR_2: %d\n", (int)regval);
MHL_SII_CBUS_WR(0x001E, regval);
regval = MHL_SII_CBUS_RD(0x00A0);
pr_debug_intr("A0 int set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00A0, regval);
regval = MHL_SII_CBUS_RD(0x00A1);
pr_debug_intr("A1 int set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00A1, regval);
regval = MHL_SII_CBUS_RD(0x00A2);
pr_debug_intr("A2 int set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00A2, regval);
regval = MHL_SII_CBUS_RD(0x00A3);
pr_debug_intr("A3 int set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00A3, regval);
regval = MHL_SII_CBUS_RD(0x00B0);
pr_debug_intr("B0 st set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00B0, regval);
regval = MHL_SII_CBUS_RD(0x00B1);
pr_debug_intr("B1 st set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00B1, regval);
regval = MHL_SII_CBUS_RD(0x00B2);
pr_debug_intr("B2 st set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00B2, regval);
regval = MHL_SII_CBUS_RD(0x00B3);
pr_debug_intr("B3 st set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00B3, regval);
regval = MHL_SII_CBUS_RD(0x00E0);
pr_debug_intr("E0 st set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00E0, regval);
regval = MHL_SII_CBUS_RD(0x00E1);
pr_debug_intr("E1 st set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00E1, regval);
regval = MHL_SII_CBUS_RD(0x00E2);
pr_debug_intr("E2 st set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00E2, regval);
regval = MHL_SII_CBUS_RD(0x00E3);
pr_debug_intr("E3 st set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00E3, regval);
regval = MHL_SII_CBUS_RD(0x00F0);
pr_debug_intr("F0 int set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00F0, regval);
regval = MHL_SII_CBUS_RD(0x00F1);
pr_debug_intr("F1 int set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00F1, regval);
regval = MHL_SII_CBUS_RD(0x00F2);
pr_debug_intr("F2 int set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00F2, regval);
regval = MHL_SII_CBUS_RD(0x00F3);
pr_debug_intr("F3 int set = %02X\n", (int)regval);
MHL_SII_CBUS_WR(0x00F3, regval);
pr_debug_intr("********* end of exiting in isr *************\n");
}
