void
dbau1550_init(void)
{
uint16_t whoami;
uint32_t sysclk;
uint32_t pinfunc;
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1550)
panic("dbau1550: CPU not Au1550");
/* check the whoami register for a match */
whoami = GET16(DBAU1550_WHOAMI);
if (DBAU1550_WHOAMI_BOARD(whoami) != DBAU1550_WHOAMI_DBAU1550_REV1)
panic("dbau1550: WHOAMI (%x) not DBAu1550!", whoami);
printf("DBAu1550 (cabernet), CPLDv%d, ",
DBAU1550_WHOAMI_CPLD(whoami));
if (DBAU1550_WHOAMI_DAUGHTER(whoami) != 0xf)
printf("daughtercard 0x%x\n",
DBAU1550_WHOAMI_DAUGHTER(whoami));
else
printf("no daughtercard\n");
/* leave console and clocks alone -- YAMON should have got it right! */
/*
* Initialize PSC clocks.
*
* PSC0 is SPI. Use 48MHz FREQ1.
* PSC1 is AC97.
* PSC2 is SMBus, and must be 48MHz. (Configured by YAMON)
* PSC3 is I2S.
*
* FREQ2 is 48MHz for USBH/USBD.
*/
sysclk = GET32(SYS_CLKSRC);
sysclk &= ~(SCS_MP0(7) | SCS_DP0 | SCS_CP0);
sysclk |= SCS_MP0(3);
PUT32(SYS_CLKSRC, sysclk);
/*
* Configure pin function for PSC devices.
*/
pinfunc = GET32(SYS_PINFUNC);
/* configure PSC0 SYNC1 */
pinfunc |= SPF_S0;
/* configure PSC2 for SMBus (YAMON default) */
pinfunc &= ~SPF_PSC2_MASK;
pinfunc |= SPF_PSC2_SMBUS;
/* configure PSC3 for I2S (YAMON default) */
pinfunc &= ~SPF_PSC3_MASK;
pinfunc |= SPF_PSC3_I2S;
PUT32(SYS_PINFUNC, pinfunc);
}
bool
au1000_match(struct au_chipdep **cpp)
{
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) == MIPS_AU1000) {
*cpp = &au1000_chipdep;
return true;
}
return false;
}
bool
au1500_match(struct au_chipdep **cpp)
{
if (MIPS_PRID_COPTS(cpu_id) == MIPS_AU1500) {
*cpp = &au1500_chipdep;
return true;
}
return false;
}
void
mtx1_init(void)
{
if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1500)
panic("mtx-1: CPU not an AU1500!");
/*
* If we had any kind of identification registers, we could
* print them here. Apparently the MTX-1 doesn't have that
* kind of info.
*/
/* leave console and clocks alone -- YAMON should have got it right! */
}