static DECLFW(MMC1_write)
{
int n=(A>>13)-4;
//FCEU_DispMessage("%016x",0,timestampbase+timestamp);
// FCEU_printf("$%04x:$%02x, $%04x\n",A,V,X.PC);
//DumpMem("out",0xe000,0xffff);
/* The MMC1 is busy so ignore the write. */
/* As of version FCE Ultra 0.81, the timestamp is only
increased before each instruction is executed(in other words
precision isn't that great), but this should still work to
deal with 2 writes in a row from a single RMW instruction.
*/
if((timestampbase+timestamp)<(lreset+2))
return;
// FCEU_printf("Write %04x:%02x\n",A,V);
if(V&0x80)
{
DRegs[0]|=0xC;
BufferShift=Buffer=0;
MMC1PRG();
lreset=timestampbase+timestamp;
return;
}
Buffer|=(V&1)<<(BufferShift++);
if(BufferShift==5)
{
DRegs[n] = Buffer;
BufferShift = Buffer = 0;
switch(n)
{
case 0:
MMC1MIRROR();
MMC1CHR();
MMC1PRG();
break;
case 1:
MMC1CHR();
MMC1PRG();
break;
case 2:
MMC1CHR();
break;
case 3:
MMC1PRG();
break;
}
}
}
static int StateAction(StateMem *sm, int load, int data_only)
{
//uint32 NWCIRQCount;
//uint8 NWCRec;
SFORMAT StateRegs[] =
{
SFARRAY(WRAM, WRAM_Size),
SFARRAY(CHRRAM, 8192),
SFARRAY(DRegs, 4),
SFVAR(lreset),
SFVAR(Buffer),
SFVAR(BufferShift),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAPR");
if(load)
{
MMC1MIRROR();
MMC1CHR();
MMC1PRG();
lreset=0; /* timestamp(base) is not stored in save states. */
}
return(ret);
}
static void MMC1DBG_SetRegister(const unsigned int id, uint32 value)
{
switch(id)
{
case MMC1_GSREG_CONTROL:
DRegs[0] = value;
break;
case MMC1_GSREG_CHRBANK0:
DRegs[1] = value;
break;
case MMC1_GSREG_CHRBANK1:
DRegs[2] = value;
break;
case MMC1_GSREG_PRGBANK:
DRegs[3] = value;
break;
case MMC1_GSREG_BUFFER:
Buffer = value;
break;
case MMC1_GSREG_BUFFERSHIFT:
BufferShift = value % 5;
break;
}
MMC1MIRROR();
MMC1CHR();
MMC1PRG();
}
static void MMC1_Restore(int version)
{
MMC1MIRROR();
MMC1CHR();
MMC1PRG();
lreset=0; /* timestamp(base) is not stored in save states. */
}
static void MMC1CMReset(void)
{
int i;
for(i=0;i<4;i++)
DRegs[i]=0;
Buffer = BufferShift = 0;
DRegs[0]=0x1F;
DRegs[1]=0;
DRegs[2]=0; // Should this be something other than 0?
DRegs[3]=0;
MMC1MIRROR();
MMC1CHR();
MMC1PRG();
}
