void mvUsbRegs(int dev)
{
mvOsPrintf("\n\tUSB-%d Bridge Registers\n\n", dev);
mvOsPrintf("MV_USB_BRIDGE_CTRL_REG : 0x%X = 0x%08x\n",
MV_USB_BRIDGE_CTRL_REG(dev), MV_REG_READ(MV_USB_BRIDGE_CTRL_REG(dev)));
mvOsPrintf("MV_USB_BRIDGE_INTR_MASK_REG : 0x%X = 0x%08x\n",
MV_USB_BRIDGE_INTR_MASK_REG(dev), MV_REG_READ(MV_USB_BRIDGE_INTR_MASK_REG(dev)));
mvOsPrintf("MV_USB_BRIDGE_INTR_CAUSE_REG : 0x%X = 0x%08x\n",
MV_USB_BRIDGE_INTR_CAUSE_REG(dev), MV_REG_READ(MV_USB_BRIDGE_INTR_CAUSE_REG(dev)));
mvOsPrintf("MV_USB_BRIDGE_ERROR_ADDR_REG : 0x%X = 0x%08x\n",
MV_USB_BRIDGE_ERROR_ADDR_REG(dev), MV_REG_READ(MV_USB_BRIDGE_ERROR_ADDR_REG(dev)));
mvOsPrintf("\n\tUSB-%d PHY Registers\n\n", dev);
mvOsPrintf("MV_USB_PHY_POWER_CTRL_REG : 0x%X = 0x%08x\n",
MV_USB_PHY_POWER_CTRL_REG(dev), MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev)));
mvOsPrintf("MV_USB_PHY_TX_CTRL_REG : 0x%X = 0x%08x\n",
MV_USB_PHY_TX_CTRL_REG(dev), MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev)));
mvOsPrintf("MV_USB_PHY_RX_CTRL_REG : 0x%X = 0x%08x\n",
MV_USB_PHY_RX_CTRL_REG(dev), MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev)));
mvOsPrintf("MV_USB_PHY_IVREF_CTRL_REG : 0x%X = 0x%08x\n",
MV_USB_PHY_IVREF_CTRL_REG(dev), MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev)));
mvOsPrintf("\n");
}
/* USB Phy init (change from defaults) for 150nm chips:
* - 645xx, 646xx
* - 51xx, 52xx
* - 6082
*/
static void mvUsbPhyInit(int dev)
{
MV_U32 regVal;
/* GL# USB-9 */
/******* USB 2.0 Power Control Register 0x400 *******/
regVal = MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev));
/* Bits 7:6 (BG_VSEL) = 0x1 */
regVal &= ~(0x3 << 6);
regVal |= (0x1 << 6);
MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev), regVal);
/******* USB PHY PLL Control Register 0x410 *******/
regVal = MV_REG_READ(MV_USB_PHY_PLL_CTRL_REG(dev));
/* bit[21] (VCOCAL_ START) */
regVal |= (0x1 << 21);
MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal);
/* Wait 500 usec */
mvOsUDelay(500);
regVal &= ~(0x1 << 21);
MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/* GL# USB-1 */
/******* USB PHY Tx Control Register Register 0x420 *******/
regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev));
if ((usbHalData.ctrlModel == MV_5181_DEV_ID) && (usbHalData.ctrlRev <= MV_5181_A1_REV)) {
/* For OrionI A1/A0 rev: Bit[21] = 0 (TXDATA_BLOCK_EN = 0). */
regVal &= ~(1 << 21);
} else {
regVal |= (1 << 21);
}
/* Force Auto calibration */
/* Bit[13] = 0x1, (REG_EXT_RCAL_EN = 0x1) */
regVal |= (1 << 13);
/* Bits[2:0] (TxAmp)
* 64560, 64660, 6082, 5181, 5182, etc = 0x4
* 5281 = 0x3
*/
if (usbHalData.ctrlModel == MV_5281_DEV_ID) {
regVal &= ~(0x7 << 0);
regVal |= (0x3 << 0);
} else {
regVal &= ~(0x7 << 0);
regVal |= (0x4 << 0);
}
/* Bit[6:3] (IMP_CAL)
* 64560, 64660 = 0xA
* Others = 0x8
*
*/
regVal &= ~(0xf << 3);
if ((usbHalData.ctrlModel == MV64560_DEV_ID) || (usbHalData.ctrlModel == MV64660_DEV_ID))
regVal |= (0xA << 3);
else
regVal |= (0x8 << 3);
MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
mvOsUDelay(500);
/* GL# USB-3 GL# USB-9 */
/******* USB PHY Rx Control Register 0x430 *******/
regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev));
/* bit[8:9] - (DISCON_THRESHOLD ). */
/* 88F5181-A0/A1/B0 = 11, 88F5281-A0 = 10, all other 00 */
/* 64660-A0 = 10 */
regVal &= ~(0x3 << 8);
if ((usbHalData.ctrlModel == MV_5181_DEV_ID) && (usbHalData.ctrlRev <= MV_5181_B0_REV))
regVal |= (0x3 << 8);
else if (usbHalData.ctrlModel == MV64660_DEV_ID)
regVal |= (0x2 << 8);
/* bit[21] = 0 (CDR_FASTLOCK_EN = 0). */
regVal &= ~(1 << 21);
/* bit[27:26] = 00 ( EDGE_DET_SEL = 00). */
regVal &= ~(0x3 << 26);
/* Bits[31:30] = RXDATA_BLOCK_LENGHT = 0x3 */
regVal |= (0x3 << 30);
/* Bits 7:4 (SQ_THRESH)
* 64560, 64660 = 0x1
* 5181, 5182, 5281, 6082, etc = 0x0
*/
regVal &= ~(0xf << 4);
if ((usbHalData.ctrlModel == MV64560_DEV_ID) || (usbHalData.ctrlModel == MV64660_DEV_ID))
regVal |= (0x1 << 4);
else
regVal |= (0x3 << 4);
MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
/* GL# USB-3 GL# USB-9 */
/******* USB PHY IVREF Control Register 0x440 *******/
regVal = MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev));
/*Bits[1:0] = 0x2 (PLLVDD12 = 0x2) */
regVal &= ~(0x3 << 0);
regVal |= (0x2 << 0);
/* Bits 5:4 (RXVDD) = 0x3; */
regVal &= ~(0x3 << 4);
regVal |= (0x3 << 4);
/* <VPLLCAL> bits[17:16] = 0x1 */
if ((usbHalData.ctrlModel == MV64560_DEV_ID) || (usbHalData.ctrlModel == MV64660_DEV_ID)) {
regVal &= ~(0x3 << 16);
regVal |= (0x1 << 16);
}
/* <ISAMPLE_SEL> bits[19:18] = 0x2 */
regVal &= ~(0x3 << 18);
regVal |= (0x2 << 18);
/* <SAMPLER_CTRL> bit[20] = 0x0 */
regVal &= ~(0x1 << 20);
/* <ICHGPBUF_SEL> bit[21] = 0x1 */
regVal |= (0x1 << 21);
MV_REG_WRITE(MV_USB_PHY_IVREF_CTRL_REG(dev), regVal);
/***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
regVal = MV_REG_READ(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev));
/* bit[15] = 0 (REG_FIFO_SQ_RST = 0). */
regVal &= ~(1 << 15);
/* <REG_FIFO_OVUF_SEL> bit[17] = 0x1 */
if ((usbHalData.ctrlModel == MV64560_DEV_ID) || (usbHalData.ctrlModel == MV64660_DEV_ID))
regVal |= (1 << 17);
MV_REG_WRITE(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev), regVal);
}
/* USB Phy init (change from defaults) specific for 90nm (6183 and later) */
static void mvUsbPhy90nmInit(int dev)
{
MV_U32 regVal;
/******* USB 2.0 Power Control Register 0x400 *******/
regVal = MV_REG_READ(MV_USB_PHY_POWER_CTRL_REG(dev));
/* Bits 7:6 (BG_VSEL) = 0x0 */
regVal &= ~(0x3 << 6);
MV_REG_WRITE(MV_USB_PHY_POWER_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY PLL Control Register 0x410 *******/
regVal = MV_REG_READ(MV_USB_PHY_PLL_CTRL_REG(dev));
/* bit[21] (VCOCAL_ START) */
regVal |= (0x1 << 21);
MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal);
/* Wait 500 usec */
mvOsUDelay(500);
regVal &= ~(0x1 << 21);
MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY Tx Control Register Register 0x420 *******/
regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev));
/* bit[21] (TX_BLK_EN) = 0 for B0 only */
if ((usbHalData.ctrlModel == MV_6183_DEV_ID))
regVal &= ~(0x1 << 21);
/* Force Auto calibration */
/* Bit[13] = 0x1, (REG_EXT_RCAL_EN = 0x1) */
regVal |= (0x1 << 13);
/* bit[11] (LOWVDD_EN) = 1 */
regVal |= (0x1 << 11);
/* Bit[6:3] (IMP_CAL) = 0x8 for A0 and B0 */
/* Bit[6:3] (IMP_CAL) = 0xf for A1 */
regVal &= ~(0xf << 3);
regVal |= (0x8 << 3);
if ((usbHalData.ctrlModel == MV_6183_DEV_ID)) {
regVal &= ~(0x7);
regVal |= (0x4);
}
MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
/* Wait 500 usec */
mvOsUDelay(500);
/*-------------------------------------------------*/
/******* USB PHY Rx Control Register 0x430 *******/
regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev));
/* bits[3:2] LPF_COEF = 0x0 */
regVal &= ~(0x3 << 2);
/* bits[7:4] SQ_THRESH = 0x0 */
/* bits[7:4] SQ_THRESH = 0x3 for A1 and above */
regVal &= ~(0xf << 4);
/* bits[16:15] REG_SQ_LENGTH = 0x1 */
regVal &= ~(0x3 << 15);
regVal |= (0x1 << 15);
/* bit[21] CDR_FASTLOCK_EN = 0x0 */
regVal &= ~(0x1 << 21);
/* bits[27:26] EDGE_DET_SEL = 0x0 */
regVal &= ~(0x3 << 26);
MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY IVREF Control Register 0x440 *******/
regVal = MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev));
/* bits[7:6] RXVDD18 = 0x0 */
regVal &= ~(0x3 << 6);
/* bits[11] SQ_CM_SEL = 0x1 for 6183 B0 only */
if ((usbHalData.ctrlModel == MV_6183_DEV_ID))
regVal |= (0x1 << 11);
/* bit[24] REG_TEST_SUSPENDM = 0x1 */
regVal |= (0x1 << 24);
MV_REG_WRITE(MV_USB_PHY_IVREF_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
regVal = MV_REG_READ(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev));
/* bit[15] REG_FIFO_SQ_RST = 0x0 */
regVal &= ~(0x1 << 15);
MV_REG_WRITE(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev), regVal);
/*-------------------------------------------------*/
}
/* USB Phy init (change from defaults) specific for 65nm (78XX0 and 6281) */
static void mvUsbPhy65nmInit(int dev)
{
MV_U32 regVal;
/******* USB PHY PLL Control Register 0x410 *******/
regVal = MV_REG_READ(MV_USB_PHY_PLL_CTRL_REG(dev));
/* bit[14:12] (ICP) = 6 */
regVal &= ~(0x7 << 12);
regVal |= (0x6 << 12);
/* bit[12] (KVCO_EXT) = 1 */
regVal |= (0x1 << 22);
MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY Tx Control Register Register 0x420 *******/
regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev));
/* bit[11] (LOWVDD_EN) = 1 */
regVal |= (0x1 << 11);
/* bit[12] (REG_RCAL_START) = 1 */
regVal |= (0x1 << 12);
/* bit[21] (TX_BLOCK_EN) = 0 */
regVal &= ~(0x1 << 21);
/* bit[31] (HS_STRESS_CTRL) = 0 */
regVal &= ~(0x1 << 31);
MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
/* Force impedance auto calibrate */
/* bit[12] (REG_RCAL_START) = 0 */
regVal &= ~(0x1 << 12);
MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY Rx Control Register 0x430 *******/
regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev));
/* bits[3:2] LPL_COEF = 0x0 (1/8) */
regVal &= ~(0x3 << 2);
/* bits[7:4] SQ_THRESH = 0x7 */
regVal &= ~(0xf << 4);
regVal |= (0x7 << 4);
/* bits[16:15] REG_SQ_LENGTH = 0x1 */
regVal &= ~(0x3 << 15);
regVal |= (0x1 << 15);
/* bit[21] CDR_FASTLOCK_EN = 0x0 */
regVal &= ~(0x1 << 21);
/* bits[27:26] EDGE_DET = 0x0 (1 Tran) */
regVal &= ~(0x3 << 26);
MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY IVREF Control Register 0x440 *******/
regVal = MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev));
/* bits[9:8] TXVDD12 = 0x3 */
regVal &= ~(0x3 << 8);
regVal |= (0x3 << 8);
MV_REG_WRITE(MV_USB_PHY_IVREF_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
regVal = MV_REG_READ(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev));
/* bit[15] REG_FIFO_SQ_RST = 0x0 */
regVal &= ~(0x1 << 15);
MV_REG_WRITE(MV_USB_PHY_TEST_GROUP_CTRL_REG_0(dev), regVal);
/*-------------------------------------------------*/
}
/* USB Phy init (change from defaults) specific for 65nm (78100 78200 A0 and later) */
static void mvUsbPhy65nmNewInit(int dev)
{
MV_U32 regVal;
if ((usbHalData.ctrlModel == MV_6281_DEV_ID) ||
(usbHalData.ctrlModel == MV_6280_DEV_ID) ||
(usbHalData.ctrlModel == MV_6282_DEV_ID) ||
(usbHalData.ctrlModel == MV_6192_DEV_ID) ||
(usbHalData.ctrlModel == MV_6190_DEV_ID) ||
(usbHalData.ctrlModel == MV_6180_DEV_ID)) {
/******* USB PHY ANA Grp Config reg 0x1007c *******/
regVal = MV_REG_READ(0x1007c);
/* bit[4:3] should be '01' */
regVal &= ~(0x3 << 3);
regVal |= (0x1 << 3);
MV_REG_WRITE(0x1007c, regVal);
}
/******* USB PHY PLL Control Register 0x410 *******/
regVal = MV_REG_READ(MV_USB_PHY_PLL_CTRL_REG(dev));
/* bit[21] (VCOCAL_ START) */
regVal |= (0x1 << 21);
MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal);
/* Wait 100 usec */
mvOsUDelay(100);
regVal &= ~(0x1 << 21);
MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY Tx Control Register Register 0x420 *******/
regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev));
/* Force impedance auto calibrate */
/* bit[12] (REG_RCAL_START) = 1 */
regVal |= (0x1 << 12);
MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
/* Wait 100 usec */
mvOsUDelay(100);
/* bit[12] (REG_RCAL_START) = 0 */
regVal &= ~(0x1 << 12);
MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
/* bit[16:14] (IMPCAL_VTH) = 101 */
if (usbHalData.ctrlModel == MV_6280_DEV_ID) {
regVal &= ~(0x7 << 14);
regVal |= (0x5 << 14);
}
/* bits[2:0] (TX_AMP) = 0x4 */
regVal &= ~(0x7 << 0);
if ((usbHalData.ctrlModel == MV_78100_DEV_ID ||
usbHalData.ctrlModel == MV_78200_DEV_ID ||
usbHalData.ctrlModel == MV_76100_DEV_ID ||
usbHalData.ctrlModel == MV_6321_DEV_ID ||
usbHalData.ctrlModel == MV_6322_DEV_ID ||
usbHalData.ctrlModel == MV_6323_DEV_ID) && usbHalData.ctrlRev == MV_78XX0_A0_REV)
regVal |= (0x4 << 0);
else
regVal |= (0x3 << 0);
MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY Rx Control Register 0x430 *******/
regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev));
/* bits[3:2] LPF_COEF = 0x1 */
regVal &= ~(0x3 << 2);
regVal |= (0x1 << 2);
/* bits[7:4] SQ_THRESH = 0x8 */
regVal &= ~(0xf << 4);
if (usbHalData.ctrlModel == MV_6282_DEV_ID)
regVal |= (0xc << 4);
else
regVal |= (0x8 << 4);
MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY IVREF Control Register 0x440 *******/
regVal = MV_REG_READ(MV_USB_PHY_IVREF_CTRL_REG(dev));
/* bits[9:8] TxVdd */
regVal &= ~(0x3 << 8);
if (usbHalData.ctrlModel == MV_6281_DEV_ID ||
usbHalData.ctrlModel == MV_6280_DEV_ID ||
usbHalData.ctrlModel == MV_6282_DEV_ID ||
usbHalData.ctrlModel == MV_6192_DEV_ID ||
usbHalData.ctrlModel == MV_6190_DEV_ID ||
usbHalData.ctrlModel == MV_6180_DEV_ID)
regVal |= (0x3 << 8);
else
regVal |= (0x1 << 8);
MV_REG_WRITE(MV_USB_PHY_IVREF_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
/* Nothing to change */
}
/* USB Phy init (change from defaults) specific for 65nm (78100 78200 A0 and later) */
static void mvUsbPhy65nmNewInit(int dev)
{
MV_U32 regVal;
if((mvCtrlModelGet() == MV_6281_DEV_ID) ||
(mvCtrlModelGet() == MV_6192_DEV_ID) ||
(mvCtrlModelGet() == MV_6190_DEV_ID) ||
(mvCtrlModelGet() == MV_6180_DEV_ID))
{
/******* USB PHY ANA Grp Config reg 0x1007c *******/
regVal = MV_REG_READ(0x1007c);
/* bit[4:3] should be '01' */
regVal &= ~(0x3 << 3);
regVal |= (0x1 << 3);
MV_REG_WRITE(0x1007c, regVal);
}
/******* USB PHY PLL Control Register 0x410 *******/
regVal = MV_REG_READ(MV_USB_PHY_PLL_CTRL_REG(dev));
/* bit[21] (VCOCAL_ START) */
regVal |= (0x1 << 21);
MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal);
/* Wait 100 usec */
mvOsUDelay(100);
regVal &= ~(0x1 << 21);
MV_REG_WRITE(MV_USB_PHY_PLL_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY Tx Control Register Register 0x420 *******/
regVal = MV_REG_READ(MV_USB_PHY_TX_CTRL_REG(dev));
/* Force impedance auto calibrate */
/* bit[12] (REG_RCAL_START) = 1 */
regVal |= (0x1 << 12);
MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
/* Wait 100 usec */
mvOsUDelay(100);
/* bit[12] (REG_RCAL_START) = 0 */
regVal &= ~(0x1 << 12);
MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
/* bits[2:0] (TX_AMP) = 0x4 */
regVal &= ~(0x7 << 0);
regVal |= (0x4 << 0);
MV_REG_WRITE(MV_USB_PHY_TX_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY Rx Control Register 0x430 *******/
regVal = MV_REG_READ(MV_USB_PHY_RX_CTRL_REG(dev));
/* bits[7:4] SQ_THRESH = 0x8 */
regVal &= ~(0xf << 4);
regVal |= (0x8 << 4);
MV_REG_WRITE(MV_USB_PHY_RX_CTRL_REG(dev), regVal);
/*-------------------------------------------------*/
/******* USB PHY IVREF Control Register 0x440 *******/
/* Nothing to change */
/*-------------------------------------------------*/
/***** USB PHY TEST GROUP CONTROL Register: 0x450 *****/
/* Nothing to change */
}
