UINT8 pic16c62x_device::GET_REGFILE(offs_t addr) /* Read from internal memory */ { UINT8 data; if (addr == 0) { /* Indirect addressing */ addr = (FSR & m_picRAMmask); } switch(addr) { case 0x00: /* Not an actual register, so return 0 */ case 0x80: data = 0; break; case 0x02: case 0x03: case 0x0b: case 0x82: case 0x83: case 0x8b: data = M_RDRAM(addr & 0x7f); break; case 0x84: case 0x04: data = (FSR | (UINT8)(~m_picRAMmask)); break; case 0x05: data = P_IN(0); data &= m_TRISA; data |= ((UINT8)(~m_TRISA) & PORTA); data &= 0x1f; /* 5-bit port (only lower 5 bits used) */ break; case 0x06: data = P_IN(1); data &= m_TRISB; data |= ((UINT8)(~m_TRISB) & PORTB); break; case 0x8a: case 0x0a: data = m_PCLATH; break; case 0x81: data = m_OPTION; break; case 0x85: data = m_TRISA; break; case 0x86: data = m_TRISB; break; default: data = M_RDRAM(addr); break; } return data; }
INLINE void getdata(UINT8 shift,UINT8 signext) { GET_MEM_ADDR(DMA_DP); R.ALU.d = (UINT16)M_RDRAM(memaccess); if (signext) R.ALU.d = (INT16)R.ALU.d; R.ALU.d <<= shift; if (R.opcode.b.l & 0x80) { UPDATE_AR(); UPDATE_ARP(); } }
INLINE UINT8 GET_REGFILE(offs_t addr) /* Read from internal memory */ { UINT8 data; if ((picmodel == 0x16C57) || (picmodel == 0x16C58)) { addr |= (R.FSR & 0x60); /* FSR used for banking */ } if ((addr & 0x10) == 0) addr &= 0x0f; switch(addr) { case 00: addr = (R.FSR & picRAMmask); if (addr == 0) { data = 0; break; } if ((addr & 0x10) == 0) addr &= 0x0f; data = M_RDRAM(addr); /* Indirect address */ break; case 04: data = (R.FSR | (~picRAMmask)); break; case 05: data = P_IN(0); data &= R.TRISA; data |= (~R.TRISA & R.PORTA); data &= 0xf; /* 4-bit port (only lower 4 bits used) */ break; case 06: data = P_IN(1); data &= R.TRISB; data |= (~R.TRISB & R.PORTB); break; case 07: if ((picmodel == 0x16C55) || (picmodel == 0x16C57)) { data = P_IN(2); data &= R.TRISC; data |= (~R.TRISC & R.PORTC); } else { /* PIC16C54, PIC16C56, PIC16C58 */ data = M_RDRAM(addr); } break; default: data = M_RDRAM(addr); break; } return data; }
void tms32010_device::getdata(UINT8 shift,UINT8 signext) { if (m_opcode.b.l & 0x80) m_memaccess = IND; else m_memaccess = DMA_DP; m_ALU.d = (UINT16)M_RDRAM(m_memaccess); if (signext) m_ALU.d = (INT16)m_ALU.d; m_ALU.d <<= shift; if (m_opcode.b.l & 0x80) { UPDATE_AR(); UPDATE_ARP(); } }
void tms32010_device::getdata(uint8_t shift,uint8_t signext) { if (m_opcode.b.l & 0x80) m_memaccess = IND; else m_memaccess = DMA_DP; m_ALU.d = (uint16_t)M_RDRAM(m_memaccess); if (signext) m_ALU.d = (int16_t)m_ALU.d; m_ALU.d <<= shift; if (m_opcode.b.l & 0x80) { UPDATE_AR(); UPDATE_ARP(); } }
INLINE void getdata(tms32010_state *cpustate, UINT8 shift,UINT8 signext) { if (cpustate->opcode.b.l & 0x80) cpustate->memaccess = IND; else cpustate->memaccess = DMA_DP; cpustate->ALU.d = (UINT16)M_RDRAM(cpustate->memaccess); if (signext) cpustate->ALU.d = (INT16)cpustate->ALU.d; cpustate->ALU.d <<= shift; if (cpustate->opcode.b.l & 0x80) { UPDATE_AR(cpustate); UPDATE_ARP(cpustate); } }
INLINE void getdata_lar(void) { if (opcode_minor & 0x80) memaccess = ind; else memaccess = dma; R.ALU = M_RDRAM(memaccess); if (opcode_minor & 0x80) { if ((opcode_minor & 0x20) || (opcode_minor & 0x10)) { if ((opcode_major & 1) != ARP) { UINT16 tmpAR = R.AR[ARP]; if (opcode_minor & 0x20) tmpAR++ ; if (opcode_minor & 0x10) tmpAR-- ; R.AR[ARP] = (R.AR[ARP] & 0xfe00) | (tmpAR & 0x01ff); } } if (~opcode_minor & 0x08) { if (opcode_minor & 1) SET(ARP_REG); else CLR(ARP_REG); } } }
INLINE void getdata(UINT8 shift,UINT8 signext) { if (opcode_minor & 0x80) memaccess = ind; else memaccess = dma; R.ALU = M_RDRAM(memaccess); if ((signext) && (R.ALU & 0x8000)) R.ALU |= 0xffff0000; else R.ALU &= 0x0000ffff; R.ALU <<= shift; if (opcode_minor & 0x80) { if ((opcode_minor & 0x20) || (opcode_minor & 0x10)) { UINT16 tmpAR = R.AR[ARP]; if (opcode_minor & 0x20) tmpAR++ ; if (opcode_minor & 0x10) tmpAR-- ; R.AR[ARP] = (R.AR[ARP] & 0xfe00) | (tmpAR & 0x01ff); } if (~opcode_minor & 0x08) { if (opcode_minor & 1) SET(ARP_REG); else CLR(ARP_REG); } } }