/*-------------------------------------------------------------------*/
void Map45_Sram( WORD wAddr, BYTE byData )
{
if(wAddr == 0x6000)
{
Map45_Regs[Map45_Regs[5]] = byData;
Map45_Regs[5]= (Map45_Regs[5]+1) & 0x03;
Map45_Set_CPU_Bank4((BYTE)Map45_Prg0);
Map45_Set_CPU_Bank5((BYTE)Map45_Prg1);
Map45_Set_CPU_Bank6((BYTE)Map45_Prg2);
Map45_Set_CPU_Bank7((BYTE)Map45_Prg3);
Map45_Set_PPU_Banks();
}
}
void Map45_Sram( word wAddr, byte byData )
{
if(wAddr == 0x6000)
{
Map45_Regs[Map45_Regs[5]] = byData;
Map45_Regs[5]= (Map45_Regs[5]+1) & 0x03;
Map45_Set_CPU_Bank4((byte)Map45_Prg0);
Map45_Set_CPU_Bank5((byte)Map45_Prg1);
Map45_Set_CPU_Bank6((byte)Map45_Prg2);
Map45_Set_CPU_Bank7((byte)Map45_Prg3);
Map45_Set_PPU_Banks();
}
}
/*-------------------------------------------------------------------*/
void Map45_Write( WORD wAddr, BYTE byData )
{
DWORD swap;
switch(wAddr & 0xE001)
{
case 0x8000:
if((byData & 0x40) != (Map45_Regs[6] & 0x40))
{
swap = Map45_Prg0; Map45_Prg0 = Map45_Prg2; Map45_Prg2 = swap;
swap = Map45_P[0]; Map45_P[0] = Map45_P[2]; Map45_P[2] = swap;
ROMBANK0 = ROMPAGE( Map45_P[0] % ( NesHeader.byRomSize << 1) );
ROMBANK2 = ROMPAGE( Map45_P[2] % ( NesHeader.byRomSize << 1) );
}
if (NesHeader.byRomSize > 0)
{
if((byData & 0x80) != (Map45_Regs[6] & 0x80))
{
swap = Map45_Chr4; Map45_Chr4 = Map45_Chr0; Map45_Chr0 = swap;
swap = Map45_Chr5; Map45_Chr5 = Map45_Chr1; Map45_Chr1 = swap;
swap = Map45_Chr6; Map45_Chr6 = Map45_Chr2; Map45_Chr2 = swap;
swap = Map45_Chr7; Map45_Chr7 = Map45_Chr3; Map45_Chr3 = swap;
swap = Map45_C[4]; Map45_C[4] = Map45_C[0]; Map45_C[0] = swap;
swap = Map45_C[5]; Map45_C[5] = Map45_C[1]; Map45_C[1] = swap;
swap = Map45_C[6]; Map45_C[6] = Map45_C[2]; Map45_C[2] = swap;
swap = Map45_C[7]; Map45_C[7] = Map45_C[3]; Map45_C[3] = swap;
PPUBANK[ 0 ] = VROMPAGE( Map45_C[0] % ( NesHeader.byVRomSize << 3 ) );
PPUBANK[ 1 ] = VROMPAGE( Map45_C[1] % ( NesHeader.byVRomSize << 3 ) );
PPUBANK[ 2 ] = VROMPAGE( Map45_C[2] % ( NesHeader.byVRomSize << 3 ) );
PPUBANK[ 3 ] = VROMPAGE( Map45_C[3] % ( NesHeader.byVRomSize << 3 ) );
PPUBANK[ 4 ] = VROMPAGE( Map45_C[4] % ( NesHeader.byVRomSize << 3 ) );
PPUBANK[ 5 ] = VROMPAGE( Map45_C[5] % ( NesHeader.byVRomSize << 3 ) );
PPUBANK[ 6 ] = VROMPAGE( Map45_C[6] % ( NesHeader.byVRomSize << 3 ) );
PPUBANK[ 7 ] = VROMPAGE( Map45_C[7] % ( NesHeader.byVRomSize << 3 ) );
InfoNES_SetupChr();
}
}
Map45_Regs[6] = byData;
break;
case 0x8001:
switch(Map45_Regs[6] & 0x07)
{
case 0x00:
Map45_Chr0 = (byData & 0xFE)+0;
Map45_Chr1 = (byData & 0xFE)+1;
Map45_Set_PPU_Banks();
break;
case 0x01:
Map45_Chr2 = (byData & 0xFE)+0;
Map45_Chr3 = (byData & 0xFE)+1;
Map45_Set_PPU_Banks();
break;
case 0x02:
Map45_Chr4 = byData;
Map45_Set_PPU_Banks();
break;
case 0x03:
Map45_Chr5 = byData;
Map45_Set_PPU_Banks();
break;
case 0x04:
Map45_Chr6 = byData;
Map45_Set_PPU_Banks();
break;
case 0x05:
Map45_Chr7 = byData;
Map45_Set_PPU_Banks();
break;
case 0x06:
if(Map45_Regs[6] & 0x40)
{
Map45_Prg2 = byData & 0x3F;
Map45_Set_CPU_Bank6(byData);
}
else
{
Map45_Prg0 = byData & 0x3F;
Map45_Set_CPU_Bank4(byData);
}
break;
case 0x07:
Map45_Prg1 = byData & 0x3F;
Map45_Set_CPU_Bank5(byData);
break;
}
break;
case 0xA000:
if ( byData & 0x01 )
{
InfoNES_Mirroring( 0 );
} else {
InfoNES_Mirroring( 1 );
}
break;
case 0xC000:
Map45_IRQ_Cnt = byData;
break;
case 0xC001:
Map45_IRQ_Latch = byData;
break;
case 0xE000:
Map45_IRQ_Enable = 0;
break;
case 0xE001:
Map45_IRQ_Enable = 1;
break;
}
}
void Map45_Write( word wAddr, byte byData )
{
dword swap;
switch(wAddr & 0xE001)
{
case 0x8000:
if((byData & 0x40) != (Map45_Regs[6] & 0x40))
{
swap = Map45_Prg0; Map45_Prg0 = Map45_Prg2; Map45_Prg2 = swap;
swap = Map45_P[0]; Map45_P[0] = Map45_P[2]; Map45_P[2] = swap;
W.ROMBANK0 = ROMPAGE( Map45_P[0] % ( S.NesHeader.ROMSize << 1) );
W.ROMBANK2 = ROMPAGE( Map45_P[2] % ( S.NesHeader.ROMSize << 1) );
}
if (S.NesHeader.ROMSize > 0)
{
if((byData & 0x80) != (Map45_Regs[6] & 0x80))
{
swap = Map45_Chr4; Map45_Chr4 = Map45_Chr0; Map45_Chr0 = swap;
swap = Map45_Chr5; Map45_Chr5 = Map45_Chr1; Map45_Chr1 = swap;
swap = Map45_Chr6; Map45_Chr6 = Map45_Chr2; Map45_Chr2 = swap;
swap = Map45_Chr7; Map45_Chr7 = Map45_Chr3; Map45_Chr3 = swap;
swap = Map45_C[4]; Map45_C[4] = Map45_C[0]; Map45_C[0] = swap;
swap = Map45_C[5]; Map45_C[5] = Map45_C[1]; Map45_C[1] = swap;
swap = Map45_C[6]; Map45_C[6] = Map45_C[2]; Map45_C[2] = swap;
swap = Map45_C[7]; Map45_C[7] = Map45_C[3]; Map45_C[3] = swap;
W.PPUBANK[ 0 ] = VROMPAGE( Map45_C[0] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 1 ] = VROMPAGE( Map45_C[1] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 2 ] = VROMPAGE( Map45_C[2] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 3 ] = VROMPAGE( Map45_C[3] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 4 ] = VROMPAGE( Map45_C[4] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 5 ] = VROMPAGE( Map45_C[5] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 6 ] = VROMPAGE( Map45_C[6] % ( S.NesHeader.VROMSize << 3 ) );
W.PPUBANK[ 7 ] = VROMPAGE( Map45_C[7] % ( S.NesHeader.VROMSize << 3 ) );
NESCore_Develop_Character_Data();
}
}
Map45_Regs[6] = byData;
break;
case 0x8001:
switch(Map45_Regs[6] & 0x07)
{
case 0x00:
Map45_Chr0 = (byData & 0xFE)+0;
Map45_Chr1 = (byData & 0xFE)+1;
Map45_Set_PPU_Banks();
break;
case 0x01:
Map45_Chr2 = (byData & 0xFE)+0;
Map45_Chr3 = (byData & 0xFE)+1;
Map45_Set_PPU_Banks();
break;
case 0x02:
Map45_Chr4 = byData;
Map45_Set_PPU_Banks();
break;
case 0x03:
Map45_Chr5 = byData;
Map45_Set_PPU_Banks();
break;
case 0x04:
Map45_Chr6 = byData;
Map45_Set_PPU_Banks();
break;
case 0x05:
Map45_Chr7 = byData;
Map45_Set_PPU_Banks();
break;
case 0x06:
if(Map45_Regs[6] & 0x40)
{
Map45_Prg2 = byData & 0x3F;
Map45_Set_CPU_Bank6(byData);
}
else
{
Map45_Prg0 = byData & 0x3F;
Map45_Set_CPU_Bank4(byData);
}
break;
case 0x07:
Map45_Prg1 = byData & 0x3F;
Map45_Set_CPU_Bank5(byData);
break;
}
break;
case 0xA000:
if ( byData & 0x01 )
{
NESCore_Mirroring( 0 );
} else {
NESCore_Mirroring( 1 );
}
break;
case 0xC000:
Map45_IRQ_Cnt = byData;
break;
case 0xC001:
Map45_IRQ_Latch = byData;
break;
case 0xE000:
Map45_IRQ_Enable = 0;
break;
case 0xE001:
Map45_IRQ_Enable = 1;
break;
}
}
