Example #1
0
void mov_mem8_al(){
	unsigned short tmp;
	ip++;
	MemRead16(CS,ip,&tmp);
	ip++;
	MemWrite8(CurrentSegment,tmp,gregs8[AL]);
}
Example #2
0
static void PutAddressSpaceBytes(const char *name, uint32 Address, uint32 Length, uint32 Granularity, bool hl, const uint8 *Buffer)
{
 if(!strcmp(name, "cpu"))
 {
  while(Length--)
  {
   int32 dummy_ts = 0;

   MemWrite8(dummy_ts, Address, *Buffer);

   Address++;
   Buffer++;
  }
 }
 else if(!strncmp(name, "vsuwd", 5))
 {
  const unsigned int which = name[5] - '0';

  while(Length--)
  {
   VB_VSU->PokeWave(which, Address, *Buffer);

   Address++;
   Buffer++;
  }
 }
}
Example #3
0
UINT32 opTASI(void)
{
	UINT8 appb;
	modAdd=PC + 1;
	modDim=0;

	/* Load the address of the operand */
	amLength1=ReadAMAddress();

	/* Load UINT8 from the address */
	if (amFlag)
		appb=(UINT8)v60.reg[amOut&0x1F];
	else
		appb=MemRead8(amOut);

	/* Set the flags for SUB appb,FF */
	SUBB(appb, 0xff);

	/* Write FF in the operand */
	if (amFlag)
		SETREG8(v60.reg[amOut&0x1F], 0xFF);
	else
		MemWrite8(amOut,0xFF);

	return amLength1 + 1;
}
Example #4
0
static UINT32 am3DisplacementIndirect32(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)), modWriteValW);
		break;
	}

	return 5;
}
Example #5
0
static UINT32 am3PCDisplacementIndexed16(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(PC + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		MemWrite16(PC + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F] * 2, modWriteValH);
		break;
	case 2:
		MemWrite32(PC + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F] * 4, modWriteValW);
		break;
	}

	return 4;
}
Example #6
0
static UINT32 am3DisplacementIndexed8(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		MemWrite16(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F] * 2, modWriteValH);
		break;
	case 2:
		MemWrite32(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F] * 4, modWriteValW);
		break;
	}

	return 3;
}
Example #7
0
static UINT32 am3Displacement16(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1), modWriteValB);
		break;
	case 1:
		MemWrite16(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1), modWriteValH);
		break;
	case 2:
		MemWrite32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1), modWriteValW);
		break;
	}

	return 3;
}
Example #8
0
static UINT32 am3RegisterIndirectIndexed(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(v60.reg[modVal2&0x1F] + v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		MemWrite16(v60.reg[modVal2&0x1F] + v60.reg[modVal&0x1F] * 2, modWriteValH);
		break;
	case 2:
		MemWrite32(v60.reg[modVal2&0x1F] + v60.reg[modVal&0x1F] * 4, modWriteValW);
		break;
	}

	return 2;
}
Example #9
0
static UINT32 am3PCDisplacementIndirect8(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(PC + (INT8)OpRead8(modAdd+1)), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(PC + (INT8)OpRead8(modAdd+1)), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(PC + (INT8)OpRead8(modAdd+1)), modWriteValW);
		break;
	}

	return 2;
}
Example #10
0
static UINT32 am3DirectAddressDeferredIndexed(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValW);
		break;
	}

	return 6;
}
Example #11
0
static UINT32 am3PCDoubleDisplacement32(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(PC + OpRead32(modAdd+1)) + OpRead32(modAdd+5), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(PC + OpRead32(modAdd+1)) + OpRead32(modAdd+5), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(PC + OpRead32(modAdd+1)) + OpRead32(modAdd+5), modWriteValW);
		break;
	}

	return 9;
}
Example #12
0
static UINT32 am3DirectAddressDeferred(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(OpRead32(modAdd+1)), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(OpRead32(modAdd+1)), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(OpRead32(modAdd+1)), modWriteValW);
		break;
	}

	return 5;
}
Example #13
0
static UINT32 am3PCDoubleDisplacement16(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(PC + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(PC + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(PC + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3), modWriteValW);
		break;
	}

	return 5;
}
Example #14
0
static UINT32 am3DoubleDisplacement8(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2), modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2), modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2), modWriteValW);
		break;
	}

	return 3;
}
Example #15
0
static UINT32 am3PCDisplacementIndirectIndexed32(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		MemWrite16(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F] * 2, modWriteValH);
		break;
	case 2:
		MemWrite32(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F] * 4, modWriteValW);
		break;
	}

	return 6;
}
Example #16
0
static UINT32 am3Autodecrement(void)
{
	switch (modDim)
	{
	case 0:
		v60.reg[modVal&0x1F] -= 1;
		MemWrite8(v60.reg[modVal&0x1F], modWriteValB);
		break;
	case 1:
		v60.reg[modVal&0x1F] -= 2;
		MemWrite16(v60.reg[modVal&0x1F], modWriteValH);
		break;
	case 2:
		v60.reg[modVal&0x1F] -= 4;
		MemWrite32(v60.reg[modVal&0x1F], modWriteValW);
		break;
	}

	return 1;
}
Example #17
0
static UINT32 am3Autoincrement(void)
{
	switch (modDim)
	{
	case 0:
		MemWrite8(v60.reg[modVal&0x1F], modWriteValB);
		v60.reg[modVal&0x1F] += 1;
		break;
	case 1:
		MemWrite16(v60.reg[modVal&0x1F], modWriteValH);
		v60.reg[modVal&0x1F] += 2;
		break;
	case 2:
		MemWrite32(v60.reg[modVal&0x1F], modWriteValW);
		v60.reg[modVal&0x1F] += 4;
		break;
	}

	return 1;
}
Example #18
0
UINT32 opDECB(void) /* TRUSTED */
{
	UINT8 appb;
	modAdd=PC+1;
	modDim=0;

	amLength1=ReadAMAddress();

	if (amFlag)
		appb=(UINT8)v60.reg[amOut];
	else
		appb=MemRead8(amOut);

	SUBB(appb, 1);

	if (amFlag)
		SETREG8(v60.reg[amOut], appb);
	else
		MemWrite8(amOut, appb);

	return amLength1+1;
}