/* opc8 dispu5 r */ \
{NAME, 1, OPC, 24, BRANCH_NEQ_INS, {{regr,16}, {d5,20}}}
BRANCH_NEQ_INST ("beq0b", 0xB0),
BRANCH_NEQ_INST ("bne0b", 0xB1),
BRANCH_NEQ_INST ("beq0w", 0xB2),
BRANCH_NEQ_INST ("bne0w", 0xB3),
BRANCH_NEQ_INST ("beq0d", 0xB4),
BRANCH_NEQ_INST ("bne0d", 0xB5),
/* Create instruction with no operands. */
#define NO_OP_INST(NAME, OPC) \
/* opc16 */ \
{NAME, 1, OPC, 16, 0, {{0, 0}}}
NO_OP_INST ("nop", 0x3002),
NO_OP_INST ("retx", 0x3003),
NO_OP_INST ("di", 0x3004),
NO_OP_INST ("ei", 0x3005),
NO_OP_INST ("wait", 0x3006),
NO_OP_INST ("eiwait", 0x3007),
/* Create a 'Compare & Branch' instruction. */
#define CMPBR_INST(NAME, OPC1, OPC2, C4) \
/* opc12 r r c4 disps9 */ \
{NAME, 2, ((0x300+OPC1)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{regr,16}, {regr,12}, {d9,0}}}, \
/* opc12 r r c4 disps25 */ \
{NAME, 3, ((0x310+OPC1)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{regr,16}, {regr,12}, {d25,0}}}, \
/* opc12 i4cst4 r c4 disps9 */ \
{NAME, 2, ((0x300+OPC2)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{cst4,16}, {regr,12}, {d9,0}}}, \
/* opc12 i4cst4 r c4 disps25 */ \
{NAME, 3, OPC2+1, 12, LD_STOR_INS, {{uimm4,4}, {rpbase_disps20,16}}}, \
/* opcNN iN rrp (Rindex)disps20(RPbase) */ \
{NAME, 3, OPC2+2, 12, LD_STOR_INS, {{uimm4,4}, {rpindex_disps20,16}}}
ST_REG_INST ("storb", 0x00134, 0xFE, 0xC8, 0x319, 0x65, rpbase_disps4, regr),
ST_IMM_INST ("storb", 0x81, 0x00120, 0x42, 0x218),
ST_REG_INST ("stord", 0x00138, 0xEE, 0xC7, 0x31A, 0x66, rpbase_dispe4, regp),
ST_REG_INST ("storw", 0x0013C, 0xDE, 0xC9, 0x31B, 0x67, rpbase_dispe4, regr),
ST_IMM_INST ("storw", 0xC1, 0x00130, 0x62, 0x318),
/* Create instruction with no operands. */
#define NO_OP_INST(NAME, OPC) \
/* opc16 */ \
{NAME, 1, OPC, 16, 0, {{0, 0}}}
NO_OP_INST ("cinv[i]", 0x000A),
NO_OP_INST ("cinv[i,u]", 0x000B),
NO_OP_INST ("cinv[d]", 0x000C),
NO_OP_INST ("cinv[d,u]", 0x000D),
NO_OP_INST ("cinv[d,i]", 0x000E),
NO_OP_INST ("cinv[d,i,u]", 0x000F),
NO_OP_INST ("nop", 0x2C00),
NO_OP_INST ("retx", 0x0003),
NO_OP_INST ("di", 0x0004),
NO_OP_INST ("ei", 0x0005),
NO_OP_INST ("wait", 0x0006),
NO_OP_INST ("eiwait", 0x0007),
{NULL, 0, 0, 0, 0, {{0, 0}}}
};
