Example #1
0
static void
nv04_hwctx_init(struct gl_context *ctx)
{
	struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
	struct nouveau_pushbuf *push = context_push(ctx);
	struct nv04_fifo *fifo = hw->chan->data;

	BEGIN_NV04(push, NV01_SUBC(SURF, OBJECT), 1);
	PUSH_DATA (push, hw->surf3d->handle);
	BEGIN_NV04(push, NV04_SF3D(DMA_NOTIFY), 3);
	PUSH_DATA (push, hw->ntfy->handle);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->vram);

	BEGIN_NV04(push, NV01_SUBC(3D, OBJECT), 1);
	PUSH_DATA (push, hw->eng3d->handle);
	BEGIN_NV04(push, NV04_TTRI(DMA_NOTIFY), 4);
	PUSH_DATA (push, hw->ntfy->handle);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->gart);
	PUSH_DATA (push, hw->surf3d->handle);

	BEGIN_NV04(push, NV01_SUBC(3D, OBJECT), 1);
	PUSH_DATA (push, hw->eng3dm->handle);
	BEGIN_NV04(push, NV04_MTRI(DMA_NOTIFY), 4);
	PUSH_DATA (push, hw->ntfy->handle);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->gart);
	PUSH_DATA (push, hw->surf3d->handle);

	PUSH_KICK (push);
}
static Bool
NVAccelInitImagePattern(ScrnInfoPtr pScrn)
{
	NVPtr pNv = NVPTR(pScrn);
	struct nouveau_channel *chan = pNv->chan;

	if (!pNv->NvImagePattern) {
		if (nouveau_grobj_alloc(chan, NvImagePattern,
					NV04_PATTERN_CLASS,
					&pNv->NvImagePattern))
			return FALSE;
	}

	BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1);
	OUT_RING  (chan, pNv->NvImagePattern->handle);
	BEGIN_NV04(chan, NV01_PATT(DMA_NOTIFY), 1);
	OUT_RING  (chan, chan->nullobj->handle);
	BEGIN_NV04(chan, NV01_PATT(MONOCHROME_FORMAT), 3);
#if X_BYTE_ORDER == X_BIG_ENDIAN
	OUT_RING  (chan, NV01_PATTERN_MONOCHROME_FORMAT_LE);
#else
	OUT_RING  (chan, NV01_PATTERN_MONOCHROME_FORMAT_CGA6);
#endif
	OUT_RING  (chan, NV01_PATTERN_MONOCHROME_SHAPE_8X8);
	OUT_RING  (chan, NV04_PATTERN_PATTERN_SELECT_MONO);

	return TRUE;
}
/* FLAGS_ROP_AND, DmaFB, DmaFB, 0 */
static Bool
NVAccelInitContextSurfaces(ScrnInfoPtr pScrn)
{
	NVPtr pNv = NVPTR(pScrn);
	struct nouveau_channel *chan = pNv->chan;
	uint32_t class;

	class = (pNv->Architecture >= NV_ARCH_10) ? NV10_SURFACE_2D_CLASS :
						    NV04_SURFACE_2D_CLASS;

	if (!pNv->NvContextSurfaces) {
		if (nouveau_grobj_alloc(chan, NvContextSurfaces, class,
					&pNv->NvContextSurfaces))
			return FALSE;
	}

	BEGIN_NV04(chan, NV01_SUBC(SF2D, OBJECT), 1);
	OUT_RING  (chan, pNv->NvContextSurfaces->handle);
	BEGIN_NV04(chan, NV04_SF2D(DMA_NOTIFY), 1);
	OUT_RING  (chan, chan->nullobj->handle);
	BEGIN_NV04(chan, NV04_SF2D(DMA_IMAGE_SOURCE), 2);
	OUT_RING  (chan, pNv->chan->vram->handle);
	OUT_RING  (chan, pNv->chan->vram->handle);

	return TRUE;
}
Example #4
0
struct nouveau_object *
nv04_context_engine(struct gl_context *ctx)
{
	struct nv04_context *nctx = to_nv04_context(ctx);
	struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
	struct nouveau_pushbuf *push = context_push(ctx);
	struct nouveau_object *fahrenheit;

	if ((ctx->Texture.Unit[0]._ReallyEnabled &&
	     texunit_needs_combiners(&ctx->Texture.Unit[0])) ||
	    ctx->Texture.Unit[1]._ReallyEnabled ||
	    ctx->Stencil.Enabled ||
	    !(ctx->Color.ColorMask[0][RCOMP] &&
	      ctx->Color.ColorMask[0][GCOMP] &&
	      ctx->Color.ColorMask[0][BCOMP] &&
	      ctx->Color.ColorMask[0][ACOMP]))
		fahrenheit = hw->eng3dm;
	else
		fahrenheit = hw->eng3d;

	if (fahrenheit != nctx->eng3d) {
		BEGIN_NV04(push, NV01_SUBC(3D, OBJECT), 1);
		PUSH_DATA (push, fahrenheit->handle);
		nctx->eng3d = fahrenheit;
	}

	return fahrenheit;
}
static Bool
NVAccelInitScaledImage(ScrnInfoPtr pScrn)
{
	NVPtr pNv = NVPTR(pScrn);
	struct nouveau_channel *chan = pNv->chan;
	uint32_t class;

	switch (pNv->Architecture) {
	case NV_ARCH_04:
		class = NV04_SIFM_CLASS;
		break;
	case NV_ARCH_10:
	case NV_ARCH_20:
	case NV_ARCH_30:
		class = NV10_SIFM_CLASS;
		break;
	case NV_ARCH_40:
	default:
		class = NV40_SIFM_CLASS;
		break;
	}

	if (!pNv->NvScaledImage) {
		if (nouveau_grobj_alloc(chan, NvScaledImage, class,
					&pNv->NvScaledImage))
			return FALSE;
	}

	BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1);
	OUT_RING  (chan, pNv->NvScaledImage->handle);
	BEGIN_NV04(chan, NV03_SIFM(DMA_NOTIFY), 7);
	OUT_RING  (chan, pNv->notify0->handle);
	OUT_RING  (chan, pNv->chan->vram->handle);
	OUT_RING  (chan, chan->nullobj->handle);
	OUT_RING  (chan, chan->nullobj->handle);
	OUT_RING  (chan, pNv->NvContextBeta1->handle);
	OUT_RING  (chan, pNv->NvContextBeta4->handle);
	OUT_RING  (chan, pNv->NvContextSurfaces->handle);
	if (pNv->Architecture>=NV_ARCH_10) {
		BEGIN_NV04(chan, NV05_SIFM(COLOR_CONVERSION), 1);
		OUT_RING  (chan, NV05_SIFM_COLOR_CONVERSION_DITHER);
	}
	BEGIN_NV04(chan, NV03_SIFM(OPERATION), 1);
	OUT_RING  (chan, NV03_SIFM_OPERATION_SRCCOPY);

	return TRUE;
}
static Bool
NVAccelInitContextBeta4(ScrnInfoPtr pScrn)
{
	NVPtr pNv = NVPTR(pScrn);
	struct nouveau_channel *chan = pNv->chan;
	
	if (!pNv->NvContextBeta4) {
		if (nouveau_grobj_alloc(chan, NvContextBeta4, 0x72,
					&pNv->NvContextBeta4))
			return FALSE;
	}

	BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1);
	OUT_RING  (chan, pNv->NvContextBeta4->handle);
	BEGIN_NV04(chan, NV04_BETA4(BETA_FACTOR), 1); /*RGBA factor*/
	OUT_RING  (chan, 0xffff0000);
	return TRUE;
}
/* FLAGS_ROP_AND, DmaFB, DmaFB, 0 */
static Bool
NVAccelInitContextBeta1(ScrnInfoPtr pScrn)
{
	NVPtr pNv = NVPTR(pScrn);
	struct nouveau_channel *chan = pNv->chan;

	if (!pNv->NvContextBeta1) {
		if (nouveau_grobj_alloc(chan, NvContextBeta1, 0x12,
					&pNv->NvContextBeta1))
			return FALSE;
	}

	BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1);
	OUT_RING  (chan, pNv->NvContextBeta1->handle);
	BEGIN_NV04(chan, NV01_BETA(BETA_1D31), 1); /*alpha factor*/
	OUT_RING  (chan, 0xff << 23);

	return TRUE;
}
static Bool
NVAccelInitClipRectangle(ScrnInfoPtr pScrn)
{
	NVPtr pNv = NVPTR(pScrn);
	struct nouveau_channel *chan = pNv->chan;

	if (!pNv->NvClipRectangle) {
		if (nouveau_grobj_alloc(pNv->chan, NvClipRectangle,
					NV01_CLIP_CLASS,
					&pNv->NvClipRectangle))
			return FALSE;
	}

	BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1);
	OUT_RING  (chan, pNv->NvClipRectangle->handle);
	BEGIN_NV04(chan, NV01_CLIP(DMA_NOTIFY), 1);
	OUT_RING  (chan, chan->nullobj->handle);

	return TRUE;
}
static Bool
NVAccelInitRasterOp(ScrnInfoPtr pScrn)
{
	NVPtr pNv = NVPTR(pScrn);
	struct nouveau_channel *chan = pNv->chan;

	if (!pNv->NvRop) {
		if (nouveau_grobj_alloc(chan, NvRop, NV03_ROP_CLASS,
					&pNv->NvRop))
			return FALSE;
	}

	BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1);
	OUT_RING  (chan, pNv->NvRop->handle);
	BEGIN_NV04(chan, NV01_ROP(DMA_NOTIFY), 1);
	OUT_RING  (chan, chan->nullobj->handle);

	pNv->currentRop = ~0;
	return TRUE;
}
static Bool
NVAccelInitImageBlit(ScrnInfoPtr pScrn)
{
	NVPtr pNv = NVPTR(pScrn);
	struct nouveau_channel *chan = pNv->chan;
	uint32_t class;

	class = (pNv->dev->chipset >= 0x11) ? NV15_BLIT_CLASS : NV04_BLIT_CLASS;

	if (!pNv->NvImageBlit) {
		if (nouveau_grobj_alloc(chan, NvImageBlit, class,
					&pNv->NvImageBlit))
			return FALSE;
	}

	BEGIN_NV04(chan, NV01_SUBC(BLIT, OBJECT), 1);
	OUT_RING  (chan, pNv->NvImageBlit->handle);
	BEGIN_NV04(chan, NV01_BLIT(DMA_NOTIFY), 1);
	OUT_RING  (chan, pNv->notify0->handle);
	BEGIN_NV04(chan, NV01_BLIT(COLOR_KEY), 1);
	OUT_RING  (chan, chan->nullobj->handle);
	BEGIN_NV04(chan, NV04_BLIT(SURFACES), 1);
	OUT_RING  (chan, pNv->NvContextSurfaces->handle);
	BEGIN_NV04(chan, NV01_BLIT(CLIP), 3);
	OUT_RING  (chan, chan->nullobj->handle);
	OUT_RING  (chan, pNv->NvImagePattern->handle);
	OUT_RING  (chan, pNv->NvRop->handle);
	BEGIN_NV04(chan, NV01_BLIT(OPERATION), 1);
	OUT_RING  (chan, NV01_BLIT_OPERATION_ROP_AND);
	if (pNv->NvImageBlit->grclass == NV15_BLIT_CLASS) {
		BEGIN_NV04(chan, NV15_BLIT(FLIP_SET_READ), 3);
		OUT_RING  (chan, 0);
		OUT_RING  (chan, 1);
		OUT_RING  (chan, 2);
	}

	return TRUE;
}
static Bool
NVAccelInitRectangle(ScrnInfoPtr pScrn)
{
	NVPtr pNv = NVPTR(pScrn);
	struct nouveau_channel *chan = pNv->chan;

	if (!pNv->NvRectangle) {
		if (nouveau_grobj_alloc(chan, NvRectangle, NV04_GDI_CLASS,
					&pNv->NvRectangle))
			return FALSE;
	}

	BEGIN_NV04(chan, NV01_SUBC(RECT, OBJECT), 1);
	OUT_RING  (chan, pNv->NvRectangle->handle);
	BEGIN_NV04(chan, NV04_RECT(DMA_NOTIFY), 1);
	OUT_RING  (chan, pNv->notify0->handle);
	BEGIN_NV04(chan, NV04_RECT(DMA_FONTS), 1);
	OUT_RING  (chan, chan->nullobj->handle);
	BEGIN_NV04(chan, NV04_RECT(SURFACE), 1);
	OUT_RING  (chan, pNv->NvContextSurfaces->handle);
	BEGIN_NV04(chan, NV04_RECT(ROP), 1);
	OUT_RING  (chan, pNv->NvRop->handle);
	BEGIN_NV04(chan, NV04_RECT(PATTERN), 1);
	OUT_RING  (chan, pNv->NvImagePattern->handle);
	BEGIN_NV04(chan, NV04_RECT(OPERATION), 1);
	OUT_RING  (chan, NV04_GDI_OPERATION_ROP_AND);
	BEGIN_NV04(chan, NV04_RECT(MONOCHROME_FORMAT), 1);
	/* XXX why putting 1 like renouveau dump, swap the text */
#if 1 || X_BYTE_ORDER == X_BIG_ENDIAN
	OUT_RING  (chan, NV04_GDI_MONOCHROME_FORMAT_LE);
#else
	OUT_RING  (chan, NV04_GDI_MONOCHROME_FORMAT_CGA6);
#endif

	return TRUE;
}
static void
nv10_hwctx_init(struct gl_context *ctx)
{
	struct nouveau_pushbuf *push = context_push(ctx);
	struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
	struct nv04_fifo *fifo = hw->chan->data;
	int i;

	BEGIN_NV04(push, NV01_SUBC(3D, OBJECT), 1);
	PUSH_DATA (push, hw->eng3d->handle);
	BEGIN_NV04(push, NV10_3D(DMA_NOTIFY), 1);
	PUSH_DATA (push, hw->ntfy->handle);

	BEGIN_NV04(push, NV10_3D(DMA_TEXTURE0), 3);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->gart);
	PUSH_DATA (push, fifo->gart);
	BEGIN_NV04(push, NV10_3D(DMA_COLOR), 2);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->vram);

	BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV10_3D(RT_HORIZ), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_HORIZ(0)), 1);
	PUSH_DATA (push, 0x7ff << 16 | 0x800);
	BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_VERT(0)), 1);
	PUSH_DATA (push, 0x7ff << 16 | 0x800);

	for (i = 1; i < 8; i++) {
		BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_HORIZ(i)), 1);
		PUSH_DATA (push, 0);
		BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_VERT(i)), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, SUBC_3D(0x290), 1);
	PUSH_DATA (push, 0x10 << 16 | 1);
	BEGIN_NV04(push, SUBC_3D(0x3f4), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
	PUSH_DATA (push, 0);

	if (context_chipset(ctx) >= 0x17) {
		BEGIN_NV04(push, NV17_3D(UNK01AC), 2);
		PUSH_DATA (push, fifo->vram);
		PUSH_DATA (push, fifo->vram);

		BEGIN_NV04(push, SUBC_3D(0xd84), 1);
		PUSH_DATA (push, 0x3);

		BEGIN_NV04(push, NV17_3D(COLOR_MASK_ENABLE), 1);
		PUSH_DATA (push, 1);
	}

	if (context_chipset(ctx) >= 0x11) {
		BEGIN_NV04(push, SUBC_3D(0x120), 3);
		PUSH_DATA (push, 0);
		PUSH_DATA (push, 1);
		PUSH_DATA (push, 2);

		BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
	PUSH_DATA (push, 0);

	/* Set state */
	BEGIN_NV04(push, NV10_3D(FOG_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(ALPHA_FUNC_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(ALPHA_FUNC_FUNC), 2);
	PUSH_DATA (push, 0x207);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(TEX_ENABLE(0)), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV10_3D(BLEND_FUNC_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(DITHER_ENABLE), 2);
	PUSH_DATA (push, 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(LINE_SMOOTH_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(VERTEX_WEIGHT_ENABLE), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(BLEND_FUNC_SRC), 4);
	PUSH_DATA (push, 1);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0x8006);
	BEGIN_NV04(push, NV10_3D(STENCIL_MASK), 8);
	PUSH_DATA (push, 0xff);
	PUSH_DATA (push, 0x207);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0xff);
	PUSH_DATA (push, 0x1e00);
	PUSH_DATA (push, 0x1e00);
	PUSH_DATA (push, 0x1e00);
	PUSH_DATA (push, 0x1d01);
	BEGIN_NV04(push, NV10_3D(NORMALIZE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(FOG_ENABLE), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(LIGHT_MODEL), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(SEPARATE_SPECULAR_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(ENABLED_LIGHTS), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(POLYGON_OFFSET_POINT_ENABLE), 3);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(DEPTH_FUNC), 1);
	PUSH_DATA (push, 0x201);
	BEGIN_NV04(push, NV10_3D(DEPTH_WRITE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(DEPTH_TEST_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(POLYGON_OFFSET_FACTOR), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(POINT_SIZE), 1);
	PUSH_DATA (push, 8);
	BEGIN_NV04(push, NV10_3D(POINT_PARAMETERS_ENABLE), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(LINE_WIDTH), 1);
	PUSH_DATA (push, 8);
	BEGIN_NV04(push, NV10_3D(LINE_SMOOTH_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(POLYGON_MODE_FRONT), 2);
	PUSH_DATA (push, 0x1b02);
	PUSH_DATA (push, 0x1b02);
	BEGIN_NV04(push, NV10_3D(CULL_FACE), 2);
	PUSH_DATA (push, 0x405);
	PUSH_DATA (push, 0x901);
	BEGIN_NV04(push, NV10_3D(POLYGON_SMOOTH_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(CULL_FACE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(TEX_GEN_MODE(0, 0)), 8);
	for (i = 0; i < 8; i++)
		PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV10_3D(TEX_MATRIX_ENABLE(0)), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(FOG_COEFF(0)), 3);
	PUSH_DATA (push, 0x3fc00000);	/* -1.50 */
	PUSH_DATA (push, 0xbdb8aa0a);	/* -0.09 */
	PUSH_DATA (push, 0);		/*  0.00 */

	BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV10_3D(FOG_MODE), 2);
	PUSH_DATA (push, 0x802);
	PUSH_DATA (push, 2);
	/* for some reason VIEW_MATRIX_ENABLE need to be 6 instead of 4 when
	 * using texturing, except when using the texture matrix
	 */
	BEGIN_NV04(push, NV10_3D(VIEW_MATRIX_ENABLE), 1);
	PUSH_DATA (push, 6);
	BEGIN_NV04(push, NV10_3D(COLOR_MASK), 1);
	PUSH_DATA (push, 0x01010101);

	/* Set vertex component */
	BEGIN_NV04(push, NV10_3D(VERTEX_COL_4F_R), 4);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	BEGIN_NV04(push, NV10_3D(VERTEX_COL2_3F_R), 3);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV10_3D(VERTEX_NOR_3F_X), 3);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATAf(push, 1.0);
	BEGIN_NV04(push, NV10_3D(VERTEX_TX0_4F_S), 4);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	BEGIN_NV04(push, NV10_3D(VERTEX_TX1_4F_S), 4);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	BEGIN_NV04(push, NV10_3D(VERTEX_FOG_1F), 1);
	PUSH_DATAf(push, 0.0);
	BEGIN_NV04(push, NV10_3D(EDGEFLAG_ENABLE), 1);
	PUSH_DATA (push, 1);

	BEGIN_NV04(push, NV10_3D(DEPTH_RANGE_NEAR), 2);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 16777216.0);

	PUSH_KICK (push);
}
static void
nv20_hwctx_init(struct gl_context *ctx)
{
	struct nouveau_pushbuf *push = context_push(ctx);
	struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
	struct nv04_fifo *fifo = hw->chan->data;
	int i;

	BEGIN_NV04(push, NV01_SUBC(3D, OBJECT), 1);
	PUSH_DATA (push, hw->eng3d->handle);
	BEGIN_NV04(push, NV20_3D(DMA_NOTIFY), 1);
	PUSH_DATA (push, hw->ntfy->handle);
	BEGIN_NV04(push, NV20_3D(DMA_TEXTURE0), 2);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->gart);
	BEGIN_NV04(push, NV20_3D(DMA_COLOR), 2);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->vram);
	BEGIN_NV04(push, NV20_3D(DMA_VTXBUF0), 2);
	PUSH_DATA (push, fifo->vram);
	PUSH_DATA (push, fifo->gart);

	BEGIN_NV04(push, NV20_3D(DMA_QUERY), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(RT_HORIZ), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_HORIZ(0)), 1);
	PUSH_DATA (push, 0xfff << 16 | 0x0);
	BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_VERT(0)), 1);
	PUSH_DATA (push, 0xfff << 16 | 0x0);

	for (i = 1; i < NV20_3D_VIEWPORT_CLIP_HORIZ__LEN; i++) {
		BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_HORIZ(i)), 1);
		PUSH_DATA (push, 0);
		BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_VERT(i)), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV20_3D(VIEWPORT_CLIP_MODE), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, SUBC_3D(0x17e0), 3);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);

	if (context_chipset(ctx) >= 0x25) {
		BEGIN_NV04(push, NV20_3D(TEX_RCOMP), 1);
		PUSH_DATA (push, NV20_3D_TEX_RCOMP_LEQUAL | 0xdb0);
	} else {
		BEGIN_NV04(push, SUBC_3D(0x1e68), 1);
		PUSH_DATA (push, 0x4b800000); /* 16777216.000000 */
		BEGIN_NV04(push, NV20_3D(TEX_RCOMP), 1);
		PUSH_DATA (push, NV20_3D_TEX_RCOMP_LEQUAL);
	}

	BEGIN_NV04(push, SUBC_3D(0x290), 1);
	PUSH_DATA (push, 0x10 << 16 | 1);
	BEGIN_NV04(push, SUBC_3D(0x9fc), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, SUBC_3D(0x1d80), 1);
	PUSH_DATA (push, 1);
	BEGIN_NV04(push, SUBC_3D(0x9f8), 1);
	PUSH_DATA (push, 4);
	BEGIN_NV04(push, SUBC_3D(0x17ec), 3);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 0.0);

	if (context_chipset(ctx) >= 0x25) {
		BEGIN_NV04(push, SUBC_3D(0x1d88), 1);
		PUSH_DATA (push, 3);

		BEGIN_NV04(push, NV25_3D(DMA_HIERZ), 1);
		PUSH_DATA (push, fifo->vram);
		BEGIN_NV04(push, NV25_3D(UNK01AC), 1);
		PUSH_DATA (push, fifo->vram);
	}

	BEGIN_NV04(push, NV20_3D(DMA_FENCE), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, SUBC_3D(0x1e98), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV04_GRAPH(3D, NOTIFY), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, SUBC_3D(0x120), 3);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 1);
	PUSH_DATA (push, 2);

	if (context_chipset(ctx) >= 0x25) {
		BEGIN_NV04(push, SUBC_3D(0x1da4), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV20_3D(RT_HORIZ), 2);
	PUSH_DATA (push, 0 << 16 | 0);
	PUSH_DATA (push, 0 << 16 | 0);

	BEGIN_NV04(push, NV20_3D(ALPHA_FUNC_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(ALPHA_FUNC_FUNC), 2);
	PUSH_DATA (push, NV20_3D_ALPHA_FUNC_FUNC_ALWAYS);
	PUSH_DATA (push, 0);

	for (i = 0; i < NV20_3D_TEX__LEN; i++) {
		BEGIN_NV04(push, NV20_3D(TEX_ENABLE(i)), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV20_3D(TEX_SHADER_OP), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(TEX_SHADER_CULL_MODE), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(RC_IN_ALPHA(0)), 4);
	PUSH_DATA (push, 0x30d410d0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(RC_OUT_RGB(0)), 4);
	PUSH_DATA (push, 0x00000c00);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(RC_ENABLE), 1);
	PUSH_DATA (push, 0x00011101);
	BEGIN_NV04(push, NV20_3D(RC_FINAL0), 2);
	PUSH_DATA (push, 0x130e0300);
	PUSH_DATA (push, 0x0c091c80);
	BEGIN_NV04(push, NV20_3D(RC_OUT_ALPHA(0)), 4);
	PUSH_DATA (push, 0x00000c00);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(RC_IN_RGB(0)), 4);
	PUSH_DATA (push, 0x20c400c0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(RC_COLOR0), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(RC_CONSTANT_COLOR0(0)), 4);
	PUSH_DATA (push, 0x035125a0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0x40002000);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(MULTISAMPLE_CONTROL), 1);
	PUSH_DATA (push, 0xffff0000);
	BEGIN_NV04(push, NV20_3D(BLEND_FUNC_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(DITHER_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(STENCIL_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(BLEND_FUNC_SRC), 4);
	PUSH_DATA (push, NV20_3D_BLEND_FUNC_SRC_ONE);
	PUSH_DATA (push, NV20_3D_BLEND_FUNC_DST_ZERO);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, NV20_3D_BLEND_EQUATION_FUNC_ADD);
	BEGIN_NV04(push, NV20_3D(STENCIL_MASK), 7);
	PUSH_DATA (push, 0xff);
	PUSH_DATA (push, NV20_3D_STENCIL_FUNC_FUNC_ALWAYS);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0xff);
	PUSH_DATA (push, NV20_3D_STENCIL_OP_FAIL_KEEP);
	PUSH_DATA (push, NV20_3D_STENCIL_OP_ZFAIL_KEEP);
	PUSH_DATA (push, NV20_3D_STENCIL_OP_ZPASS_KEEP);

	BEGIN_NV04(push, NV20_3D(COLOR_LOGIC_OP_ENABLE), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, NV20_3D_COLOR_LOGIC_OP_OP_COPY);
	BEGIN_NV04(push, SUBC_3D(0x17cc), 1);
	PUSH_DATA (push, 0);
	if (context_chipset(ctx) >= 0x25) {
		BEGIN_NV04(push, SUBC_3D(0x1d84), 1);
		PUSH_DATA (push, 1);
	}
	BEGIN_NV04(push, NV20_3D(LIGHTING_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(LIGHT_MODEL), 1);
	PUSH_DATA (push, NV20_3D_LIGHT_MODEL_VIEWER_NONLOCAL);
	BEGIN_NV04(push, NV20_3D(SEPARATE_SPECULAR_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(LIGHT_MODEL_TWO_SIDE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(ENABLED_LIGHTS), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(NORMALIZE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(POLYGON_STIPPLE_PATTERN(0)),
		   NV20_3D_POLYGON_STIPPLE_PATTERN__LEN);
	for (i = 0; i < NV20_3D_POLYGON_STIPPLE_PATTERN__LEN; i++) {
		PUSH_DATA (push, 0xffffffff);
	}

	BEGIN_NV04(push, NV20_3D(POLYGON_OFFSET_POINT_ENABLE), 3);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(DEPTH_FUNC), 1);
	PUSH_DATA (push, NV20_3D_DEPTH_FUNC_LESS);
	BEGIN_NV04(push, NV20_3D(DEPTH_WRITE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(DEPTH_TEST_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(POLYGON_OFFSET_FACTOR), 2);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	BEGIN_NV04(push, NV20_3D(DEPTH_CLAMP), 1);
	PUSH_DATA (push, 1);
	if (context_chipset(ctx) < 0x25) {
		BEGIN_NV04(push, SUBC_3D(0x1d84), 1);
		PUSH_DATA (push, 3);
	}
	BEGIN_NV04(push, NV20_3D(POINT_SIZE), 1);
	if (context_chipset(ctx) >= 0x25)
		PUSH_DATAf(push, 1.0);
	else
		PUSH_DATA (push, 8);

	if (context_chipset(ctx) >= 0x25) {
		BEGIN_NV04(push, NV20_3D(POINT_PARAMETERS_ENABLE), 1);
		PUSH_DATA (push, 0);
		BEGIN_NV04(push, SUBC_3D(0x0a1c), 1);
		PUSH_DATA (push, 0x800);
	} else {
		BEGIN_NV04(push, NV20_3D(POINT_PARAMETERS_ENABLE), 2);
		PUSH_DATA (push, 0);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV20_3D(LINE_WIDTH), 1);
	PUSH_DATA (push, 8);
	BEGIN_NV04(push, NV20_3D(LINE_SMOOTH_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(POLYGON_MODE_FRONT), 2);
	PUSH_DATA (push, NV20_3D_POLYGON_MODE_FRONT_FILL);
	PUSH_DATA (push, NV20_3D_POLYGON_MODE_BACK_FILL);
	BEGIN_NV04(push, NV20_3D(CULL_FACE), 2);
	PUSH_DATA (push, NV20_3D_CULL_FACE_BACK);
	PUSH_DATA (push, NV20_3D_FRONT_FACE_CCW);
	BEGIN_NV04(push, NV20_3D(POLYGON_SMOOTH_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(CULL_FACE_ENABLE), 1);
	PUSH_DATA (push, 0);
	BEGIN_NV04(push, NV20_3D(SHADE_MODEL), 1);
	PUSH_DATA (push, NV20_3D_SHADE_MODEL_SMOOTH);
	BEGIN_NV04(push, NV20_3D(POLYGON_STIPPLE_ENABLE), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(TEX_GEN_MODE(0,0)),
		   4 * NV20_3D_TEX_GEN_MODE__ESIZE);
	for (i=0; i < 4 * NV20_3D_TEX_GEN_MODE__LEN; i++)
		PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(FOG_COEFF(0)), 3);
	PUSH_DATAf(push, 1.5);
	PUSH_DATAf(push, -0.090168);
	PUSH_DATAf(push, 0.0);
	BEGIN_NV04(push, NV20_3D(FOG_MODE), 2);
	PUSH_DATA (push, NV20_3D_FOG_MODE_EXP_SIGNED);
	PUSH_DATA (push, NV20_3D_FOG_COORD_FOG);
	BEGIN_NV04(push, NV20_3D(FOG_ENABLE), 2);
	PUSH_DATA (push, 0);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(ENGINE), 1);
	PUSH_DATA (push, NV20_3D_ENGINE_FIXED);

	for (i = 0; i < NV20_3D_TEX_MATRIX_ENABLE__LEN; i++) {
		BEGIN_NV04(push, NV20_3D(TEX_MATRIX_ENABLE(i)), 1);
		PUSH_DATA (push, 0);
	}

	BEGIN_NV04(push, NV20_3D(VERTEX_ATTR_4F_X(1)), 4 * 15);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 1.0);
	PUSH_DATAf(push, 1.0);
	for (i = 0; i < 12; i++) {
		PUSH_DATAf(push, 0.0);
		PUSH_DATAf(push, 0.0);
		PUSH_DATAf(push, 0.0);
		PUSH_DATAf(push, 1.0);
	}

	BEGIN_NV04(push, NV20_3D(EDGEFLAG_ENABLE), 1);
	PUSH_DATA (push, 1);
	BEGIN_NV04(push, NV20_3D(COLOR_MASK), 1);
	PUSH_DATA (push, 0x00010101);
	BEGIN_NV04(push, NV20_3D(CLEAR_VALUE), 1);
	PUSH_DATA (push, 0);

	BEGIN_NV04(push, NV20_3D(DEPTH_RANGE_NEAR), 2);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 16777216.0);

	BEGIN_NV04(push, NV20_3D(VIEWPORT_TRANSLATE_X), 4);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 16777215.0);

	BEGIN_NV04(push, NV20_3D(VIEWPORT_SCALE_X), 4);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 0.0);
	PUSH_DATAf(push, 16777215.0 * 0.5);
	PUSH_DATAf(push, 65535.0);

	PUSH_KICK (push);
}
Example #14
0
static void
nv04_surface_copy_swizzle(struct gl_context *ctx,
                          struct nouveau_surface *dst,
                          struct nouveau_surface *src,
                          int dx, int dy, int sx, int sy,
                          int w, int h)
{
    struct nouveau_pushbuf_refn refs[] = {
        { src->bo, NOUVEAU_BO_RD | NOUVEAU_BO_VRAM | NOUVEAU_BO_GART },
        { dst->bo, NOUVEAU_BO_WR | NOUVEAU_BO_VRAM },
    };
    struct nouveau_pushbuf *push = context_push(ctx);
    struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
    struct nouveau_object *swzsurf = hw->swzsurf;
    struct nv04_fifo *fifo = hw->chan->data;
    /* Max width & height may not be the same on all HW, but must be POT */
    const unsigned max_w = 1024;
    const unsigned max_h = 1024;
    unsigned sub_w = w > max_w ? max_w : w;
    unsigned sub_h = h > max_h ? max_h : h;
    unsigned x, y;

    /* Swizzled surfaces must be POT  */
    assert(_mesa_is_pow_two(dst->width) &&
           _mesa_is_pow_two(dst->height));

    if (context_chipset(ctx) < 0x10) {
        BEGIN_NV04(push, NV01_SUBC(SURF, OBJECT), 1);
        PUSH_DATA (push, swzsurf->handle);
    }

    for (y = 0; y < h; y += sub_h) {
        sub_h = MIN2(sub_h, h - y);

        for (x = 0; x < w; x += sub_w) {
            sub_w = MIN2(sub_w, w - x);

            if (nouveau_pushbuf_space(push, 64, 4, 0) ||
                    nouveau_pushbuf_refn (push, refs, 2))
                return;

            BEGIN_NV04(push, NV04_SSWZ(DMA_IMAGE), 1);
            PUSH_DATA (push, fifo->vram);
            BEGIN_NV04(push, NV04_SSWZ(FORMAT), 2);
            PUSH_DATA (push, swzsurf_format(dst->format) |
                       log2i(dst->width) << 16 |
                       log2i(dst->height) << 24);
            PUSH_RELOC(push, dst->bo, dst->offset, NOUVEAU_BO_LOW, 0, 0);

            BEGIN_NV04(push, NV03_SIFM(DMA_IMAGE), 1);
            PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
            BEGIN_NV04(push, NV05_SIFM(SURFACE), 1);
            PUSH_DATA (push, swzsurf->handle);

            BEGIN_NV04(push, NV03_SIFM(COLOR_FORMAT), 8);
            PUSH_DATA (push, sifm_format(src->format));
            PUSH_DATA (push, NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY);
            PUSH_DATA (push, (y + dy) << 16 | (x + dx));
            PUSH_DATA (push, sub_h << 16 | sub_w);
            PUSH_DATA (push, (y + dy) << 16 | (x + dx));
            PUSH_DATA (push, sub_h << 16 | sub_w);
            PUSH_DATA (push, 1 << 20);
            PUSH_DATA (push, 1 << 20);

            BEGIN_NV04(push, NV03_SIFM(SIZE), 4);
            PUSH_DATA (push, align(sub_h, 2) << 16 | align(sub_w, 2));
            PUSH_DATA (push, src->pitch  |
                       NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER |
                       NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE);
            PUSH_RELOC(push, src->bo, src->offset + (y + sy) * src->pitch +
                       (x + sx) * src->cpp, NOUVEAU_BO_LOW, 0, 0);
            PUSH_DATA (push, 0);
        }
    }

    if (context_chipset(ctx) < 0x10) {
        BEGIN_NV04(push, NV01_SUBC(SURF, OBJECT), 1);
        PUSH_DATA (push, hw->surf3d->handle);
    }
}