/* FLAGS_ROP_AND, DmaFB, DmaFB, 0 */
static Bool
NVAccelInitContextSurfaces(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
struct nouveau_channel *chan = pNv->chan;
uint32_t class;
class = (pNv->Architecture >= NV_ARCH_10) ? NV10_SURFACE_2D_CLASS :
NV04_SURFACE_2D_CLASS;
if (!pNv->NvContextSurfaces) {
if (nouveau_grobj_alloc(chan, NvContextSurfaces, class,
&pNv->NvContextSurfaces))
return FALSE;
}
BEGIN_NV04(chan, NV01_SUBC(SF2D, OBJECT), 1);
OUT_RING (chan, pNv->NvContextSurfaces->handle);
BEGIN_NV04(chan, NV04_SF2D(DMA_NOTIFY), 1);
OUT_RING (chan, chan->nullobj->handle);
BEGIN_NV04(chan, NV04_SF2D(DMA_IMAGE_SOURCE), 2);
OUT_RING (chan, pNv->chan->vram->handle);
OUT_RING (chan, pNv->chan->vram->handle);
return TRUE;
}
void
nv04_surface_fill(struct gl_context *ctx,
struct nouveau_surface *dst,
unsigned mask, unsigned value,
int dx, int dy, int w, int h)
{
struct nouveau_pushbuf_refn refs[] = {
{ dst->bo, NOUVEAU_BO_WR | NOUVEAU_BO_VRAM | NOUVEAU_BO_GART },
};
struct nouveau_pushbuf *push = context_push(ctx);
struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
struct nv04_fifo *fifo = hw->chan->data;
if (nouveau_pushbuf_space(push, 64, 4, 0) ||
nouveau_pushbuf_refn (push, refs, 1))
return;
BEGIN_NV04(push, NV04_SF2D(DMA_IMAGE_SOURCE), 2);
PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
BEGIN_NV04(push, NV04_SF2D(FORMAT), 4);
PUSH_DATA (push, surf2d_format(dst->format));
PUSH_DATA (push, (dst->pitch << 16) | dst->pitch);
PUSH_RELOC(push, dst->bo, dst->offset, NOUVEAU_BO_LOW, 0, 0);
PUSH_RELOC(push, dst->bo, dst->offset, NOUVEAU_BO_LOW, 0, 0);
BEGIN_NV04(push, NV01_PATT(COLOR_FORMAT), 1);
PUSH_DATA (push, rect_format(dst->format));
BEGIN_NV04(push, NV01_PATT(MONOCHROME_COLOR1), 1);
PUSH_DATA (push, mask | ~0ll << (8 * dst->cpp));
BEGIN_NV04(push, NV04_GDI(COLOR_FORMAT), 1);
PUSH_DATA (push, rect_format(dst->format));
BEGIN_NV04(push, NV04_GDI(COLOR1_A), 1);
PUSH_DATA (push, value);
BEGIN_NV04(push, NV04_GDI(UNCLIPPED_RECTANGLE_POINT(0)), 2);
PUSH_DATA (push, (dx << 16) | dy);
PUSH_DATA (push, ( w << 16) | h);
}
static void
nv30_transfer_rect_sifm(XFER_ARGS)
{
struct nouveau_pushbuf *push = nv30->base.pushbuf;
struct nouveau_pushbuf_refn refs[] = {
{ src->bo, src->domain | NOUVEAU_BO_RD },
{ dst->bo, dst->domain | NOUVEAU_BO_WR },
};
struct nv04_fifo *fifo = push->channel->data;
unsigned si_fmt, si_arg;
unsigned ss_fmt;
switch (dst->cpp) {
case 4: ss_fmt = NV04_SURFACE_SWZ_FORMAT_COLOR_A8R8G8B8; break;
case 2: ss_fmt = NV04_SURFACE_SWZ_FORMAT_COLOR_R5G6B5; break;
default:
ss_fmt = NV04_SURFACE_SWZ_FORMAT_COLOR_Y8;
break;
}
switch (src->cpp) {
case 4: si_fmt = NV03_SIFM_COLOR_FORMAT_A8R8G8B8; break;
case 2: si_fmt = NV03_SIFM_COLOR_FORMAT_R5G6B5; break;
default:
si_fmt = NV03_SIFM_COLOR_FORMAT_AY8;
break;
}
if (filter == NEAREST) {
si_arg = NV03_SIFM_FORMAT_ORIGIN_CENTER;
si_arg |= NV03_SIFM_FORMAT_FILTER_POINT_SAMPLE;
} else {
si_arg = NV03_SIFM_FORMAT_ORIGIN_CORNER;
si_arg |= NV03_SIFM_FORMAT_FILTER_BILINEAR;
}
if (nouveau_pushbuf_space(push, 32, 6, 0) ||
nouveau_pushbuf_refn (push, refs, 2))
return;
if (dst->pitch) {
BEGIN_NV04(push, NV04_SF2D(DMA_IMAGE_SOURCE), 2);
PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
BEGIN_NV04(push, NV04_SF2D(FORMAT), 4);
PUSH_DATA (push, ss_fmt);
PUSH_DATA (push, dst->pitch << 16 | dst->pitch);
PUSH_RELOC(push, dst->bo, dst->offset, NOUVEAU_BO_LOW, 0, 0);
PUSH_RELOC(push, dst->bo, dst->offset, NOUVEAU_BO_LOW, 0, 0);
BEGIN_NV04(push, NV05_SIFM(SURFACE), 1);
PUSH_DATA (push, nv30->screen->surf2d->handle);
} else {
BEGIN_NV04(push, NV04_SSWZ(DMA_IMAGE), 1);
PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
BEGIN_NV04(push, NV04_SSWZ(FORMAT), 2);
PUSH_DATA (push, ss_fmt | (util_logbase2(dst->w) << 16) |
(util_logbase2(dst->h) << 24));
PUSH_RELOC(push, dst->bo, dst->offset, NOUVEAU_BO_LOW, 0, 0);
BEGIN_NV04(push, NV05_SIFM(SURFACE), 1);
PUSH_DATA (push, nv30->screen->swzsurf->handle);
}
BEGIN_NV04(push, NV03_SIFM(DMA_IMAGE), 1);
PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
BEGIN_NV04(push, NV03_SIFM(COLOR_FORMAT), 8);
PUSH_DATA (push, si_fmt);
PUSH_DATA (push, NV03_SIFM_OPERATION_SRCCOPY);
PUSH_DATA (push, ( dst->y0 << 16) | dst->x0);
PUSH_DATA (push, ((dst->y1 - dst->y0) << 16) | (dst->x1 - dst->x0));
PUSH_DATA (push, ( dst->y0 << 16) | dst->x0);
PUSH_DATA (push, ((dst->y1 - dst->y0) << 16) | (dst->x1 - dst->x0));
PUSH_DATA (push, ((src->x1 - src->x0) << 20) / (dst->x1 - dst->x0));
PUSH_DATA (push, ((src->y1 - src->y0) << 20) / (dst->y1 - dst->y0));
BEGIN_NV04(push, NV03_SIFM(SIZE), 4);
PUSH_DATA (push, align(src->h, 2) << 16 | align(src->w, 2));
PUSH_DATA (push, src->pitch | si_arg);
PUSH_RELOC(push, src->bo, src->offset, NOUVEAU_BO_LOW, 0, 0);
PUSH_DATA (push, (src->y0 << 20) | src->x0 << 4);
}
