static void nvc0_graph_load_microcode() { int i; const uint32_t val260 = NV_RD32(0x260); printf("micro code loading...\n"); NV_WR32(0x260, val260 & ~1); #ifdef USE_BLOB_UCODE printf("use blob_ucode^\n"); /* load HUB microcode */ NV_WR32(0x4091c0, 0x01000000); for (i = 0; i< sizeof(nvc0_grhub_data) /4; i++){ NV_WR32(0x4091c4,((uint32_t *)nvc0_grhub_data)[i]); } NV_WR32(0x409180,0x01000000); for (i = 0; i< sizeof(nvc0_grhub_code) /4; i++){ if ((i & 0x3f) == 0){ NV_WR32(0x409188, i>>6); } //NV_WR32(NVC0_CTXCTL_FUC_CODE_DATA, x); NV_WR32(0x409184,((uint32_t *)nvc0_grhub_code)[i]); }
static int nvidia_bl_update_status(struct backlight_device *bd) { struct nvidia_par *par = bl_get_data(bd); u32 tmp_pcrt, tmp_pmc, fpcontrol; int level; if (!par->FlatPanel) return 0; if (bd->props.power != FB_BLANK_UNBLANK || bd->props.fb_blank != FB_BLANK_UNBLANK) level = 0; else level = bd->props.brightness; tmp_pmc = NV_RD32(par->PMC, 0x10F0) & 0x0000FFFF; tmp_pcrt = NV_RD32(par->PCRTC0, 0x081C) & 0xFFFFFFFC; fpcontrol = NV_RD32(par->PRAMDAC, 0x0848) & 0xCFFFFFCC; if (level > 0) { tmp_pcrt |= 0x1; tmp_pmc |= (1 << 31); /* backlight bit */ tmp_pmc |= nvidia_bl_get_level_brightness(par, level) << 16; fpcontrol |= par->fpSyncs; } else fpcontrol |= 0x20000022; NV_WR32(par->PCRTC0, 0x081C, tmp_pcrt); NV_WR32(par->PMC, 0x10F0, tmp_pmc); NV_WR32(par->PRAMDAC, 0x848, fpcontrol); return 0; }
void nv50_graph_reset() { uint32_t enable = NV_RD32(0x200); NV_WR32(0x200, enable & ~0x1000); NV_WR32(0x200, enable | 0x1000); NV_WR32(0x400040, -1); NV_WR32(0x400040, 0); }
static Bool riva_is_connected(struct riva_par *par, Bool second) { volatile U032 __iomem *PRAMDAC = par->riva.PRAMDAC0; U032 reg52C, reg608; Bool present; if(second) PRAMDAC += 0x800; reg52C = NV_RD32(PRAMDAC, 0x052C); reg608 = NV_RD32(PRAMDAC, 0x0608); NV_WR32(PRAMDAC, 0x0608, reg608 & ~0x00010000); NV_WR32(PRAMDAC, 0x052C, reg52C & 0x0000FEEE); mdelay(1); NV_WR32(PRAMDAC, 0x052C, NV_RD32(PRAMDAC, 0x052C) | 1); NV_WR32(par->riva.PRAMDAC0, 0x0610, 0x94050140); NV_WR32(par->riva.PRAMDAC0, 0x0608, 0x00001000); mdelay(1); present = (NV_RD32(PRAMDAC, 0x0608) & (1 << 28)) ? TRUE : FALSE; NV_WR32(par->riva.PRAMDAC0, 0x0608, NV_RD32(par->riva.PRAMDAC0, 0x0608) & 0x0000EFFF); NV_WR32(PRAMDAC, 0x052C, reg52C); NV_WR32(PRAMDAC, 0x0608, reg608); return present; }
static int NVIsConnected(struct nvidia_par *par, int output) { volatile u32 __iomem *PRAMDAC = par->PRAMDAC0; u32 reg52C, reg608, dac0_reg608 = 0; int present; if (output) { dac0_reg608 = NV_RD32(PRAMDAC, 0x0608); PRAMDAC += 0x800; } reg52C = NV_RD32(PRAMDAC, 0x052C); reg608 = NV_RD32(PRAMDAC, 0x0608); NV_WR32(PRAMDAC, 0x0608, reg608 & ~0x00010000); NV_WR32(PRAMDAC, 0x052C, reg52C & 0x0000FEEE); msleep(1); NV_WR32(PRAMDAC, 0x052C, NV_RD32(PRAMDAC, 0x052C) | 1); NV_WR32(par->PRAMDAC0, 0x0610, 0x94050140); NV_WR32(par->PRAMDAC0, 0x0608, NV_RD32(par->PRAMDAC0, 0x0608) | 0x00001000); msleep(1); present = (NV_RD32(PRAMDAC, 0x0608) & (1 << 28)) ? 1 : 0; if (present) printk("nvidiafb: CRTC%i analog found\n", output); else printk("nvidiafb: CRTC%i analog not found\n", output); if (output) NV_WR32(par->PRAMDAC0, 0x0608, dac0_reg608); NV_WR32(PRAMDAC, 0x052C, reg52C); NV_WR32(PRAMDAC, 0x0608, reg608); return present; }